معرفی
Jessica Clarke is a Researcher at the Department of Computer Science and Technology, University of Cambridge, specializing in hardware-enhanced security systems. Her work focuses on the CHERI (Capability Hardware Enhanced RISC Instructions) project, bridging computer architecture, programming languages, and formal verification to address memory safety and security vulnerabilities.
Her research interests center on capability-based security architectures, formal semantics for low-level programming languages, and hardware-software co-design for memory safety. Key contributions include formal mechanized semantics for CHERI C, temporal memory safety mechanisms for heap management, and architectural contracts for safe speculation. Her work integrates formal methods with practical hardware implementations to mitigate vulnerabilities like buffer overflows and use-after-free errors.
Clarke's scientific impact is evident through high-impact publications at premier venues including ASPLOS and IEEE Security & Privacy. Her collaborative research spans multiple institutions, with consistent contributions to the CHERI project's evolution from theoretical foundations to hardware implementation.
In advising and grants, she actively participates in the CHERI research ecosystem as part of the University of Cambridge's Computer Architecture Group. Her work supports critical infrastructure security through capability-based approaches applicable to cyber-physical systems and general-purpose computing.
Clarke operates within the CHERI research team, collaborating closely with the Computer Architecture Group and Security research themes. This interdisciplinary environment combines formal verification, hardware design, and systems programming to pioneer next-generation secure computing architectures.
