Daniel Müller-Gritschneder

Daniel Müller-Gritschneder is an Adjunct Teaching Professor (Privatdozent) at the Technical University of Munich (TUM), affiliated with the Chair of Electronic Design Automation. He leads the 'Electronic System Level' research group, focusing on embedded systems, TinyML, virtual prototyping, and hardware resilience. He temporarily served as head of the Chair of Real-Time Systems (2019–2020) and holds a senior membership in IEEE.

His research spans:

• TinyML: Optimizing neural network inference for microcontrollers.
• Virtual Prototyping: Fast simulation for embedded software development (e.g., ETISS simulator).
• Runtime Verification: Hardware monitoring for safety-critical systems.
• Fault Tolerance: Cross-layer resilience against soft errors.
• Design Automation: NoC synthesis and RISC-V toolchain optimization.

His publications emphasize RISC-V-based systems, TinyML deployment, fault injection, and embedded AI. Recent works show trends toward compiler-assisted security, thermal management, and automated design-space exploration for edge devices.

Awards:

• Best Paper Award (SiPS 2019)
• Habilitation Award (Bund der Freunde der TUM, 2019)
• 2nd Best Paper (SMACD'15)
• Best Paper nominations at DAC'07, DATE'10, Analog'10, NOCS'13

He advises researchers in the Electronic System Level group and contributes to EU projects (e.g., Scale4Edge). His lab develops tools like ETISS, MLonMCU, and Seal5 for RISC-V and TinyML ecosystems.