Karakostas Vasileios is an Assistant Professor at the Department of Informatics and Telecommunications of the National and Kapodistrian University of Athens. His research focuses on computer architecture, cloud computing, and energy-efficient hardware systems. He specializes in areas such as RISC-V processors, virtual memory systems, and hardware security. Vasileios leads projects like NEUROPULS (neuromorphic secure accelerators) and Vitamin-V (RISC-V-based cloud infrastructure validation). His work emphasizes resilience analysis, performance optimization, and trustworthy development frameworks. Education and employment details are not explicitly provided in the source text, but his extensive publication record since 2011 demonstrates continuous academic engagement. Key research trends include: Memory systems optimization (e.g., TLB hierarchies, elastic translations) GPU and SoC fault tolerance analysis Cloud resource management (ACTiCLOUD, DAPHNE runtime) Open-source hardware validation (Vitamin-V project) Notable contributions include the Gem5-marvel simulator for heterogeneous architectures and BypassD for SSD access acceleration. His work bridges theoretical computer architecture with practical cloud and embedded system applications.
Manolis G.H. Katevenis is a Professor at the Department of Computer Science, University of Crete, and the founder and Head of the Computer Architecture and VLSI Systems (CARV) Laboratory at the Institute of Computer Science (ICS), Foundation for Research and Technology – Hellas (FORTH) in Heraklion, Crete, Greece. He has held academic positions since 1986 and played a pivotal role in establishing the Computer Science Department at the University of Crete. His research spans computer architecture, interconnection networks, VLSI systems, and high-performance computing, with a strong focus on scalable, low-power, manycore systems and RISC-V. He has led numerous European R&D initiatives, including serving as Coordinator of the ExaNeSt project. PhD in Computer Science, University of California, Berkeley (1983) MSc in Electrical Engineering and Computer Science, University of California, Berkeley (1980) Diploma of Electrical Engineering, National Technical University of Athens (1978) Manolis Katevenis's research focuses on advancing scalable system architectures for high-performance and big data computing. His work in computer architecture includes RISC-V, exascale computing, and manycore systems. He has made foundational contributions to interprocessor communication, particularly through remote-write, remote-DMA, and remote-enqueue mechanisms, and has pioneered innovations in interconnection networks and low-latency network interfaces. His research integrates hardware and software co-design to optimize performance, energy efficiency, and scalability in large-scale computing systems. The recent publications highlight a strong trend in exascale computing, interconnection networks, and FPGA-based prototyping of manycore systems. His work emphasizes scalable, low-power architectures, with recurring themes in congestion management, fair scheduling, crossbar design, and hardware-software integration for HPC. The articles span high-impact journals such as IEEE/ACM Transactions on Networking, IEEE Micro, and Computer Networks, reflecting sustained contributions to computer architecture and networking. ACM Doctoral Dissertation Award (1984) David J. Sakrison Memorial Prize (1983) IBM PhD Fellowship (1981–1983) Greek State Fellowship (1973–1978) Stelios Pichoridis Award for Outstanding University Teaching (2015) Member of Academia Europaea (elected 2012) Award by the Secretary General of the Region of Crete (2003) IEEE Milestone recognition for the RISC Project (2015) Manolis Katevenis has supervised over 50 graduate theses and mentored many prominent Greek computer architects, including recipients of the ACM Maurice Wilkes Award. He has served as Principal Investigator or co-PI in over 30 R&D projects with a total budget exceeding 18 million euros, including major European initiatives such as ExaNeSt (which he coordinated), EuroEXA, EcoScale, SARC, ENCORE, and multiple HiPEAC Network of Excellence projects. His leadership extends to project coordination, architectural design, FPGA prototyping, and systems software development. Katevenis founded and leads the CARV Laboratory at FORTH-ICS, a major research team with 80–100 members focused on computer architecture and VLSI systems. The lab has spun off the Distributed Computing Systems (DCS) Laboratory and is central to European exascale computing efforts, including participation in the European Processor Initiative. CARV has developed large-scale prototypes such as the 768-core ExaNeSt system and the Formic FPGA platform for manycore research.
Sotirios Xydis is an Assistant Professor in the Division of Computer Science at the School of Electrical and Computer Engineering, National Technical University of Athens (NTUA), with prior faculty appointment at Harokopion University of Athens (2020-2023). He maintains ongoing collaboration with the Institute of Communication and Computer Systems (ICCS) since 2014 and previously served as an engineer at HEDNO (2015-2018) and postdoctoral researcher at Politecnico di Milano (2011-2013). His academic credentials include: BSc in Electrical and Computer Engineering, NTUA (2005) MSc in Techno-Economic Systems, NTUA (2011) PhD in Electrical and Computer Engineering, NTUA (2011) Dr. Xydis specializes in hardware/software co-design , energy-efficient hardware acceleration , and memory management for embedded and cloud-edge systems. His research bridges low-power circuit design , heterogeneous architecture optimization , and resource management frameworks , with particular emphasis on AI workloads and serverless infrastructures. Current projects target Edge AI accelerators (CONVOLVE), disaggregated memory systems, and LLM inference optimization through hardware-aware algorithms. Analysis of his 2023-2025 publications reveals three dominant trends: (1) Energy-efficient hardware accelerators for Edge AI using approximate computing techniques, (2) Memory/resource management innovations for disaggregated serverless environments, and (3) GPU/FPGA optimization for LLM inference through dynamic frequency scaling and predictive throttling. These works consistently address the power-performance tradeoffs in heterogeneous computing systems. His scientific recognition includes: Best Paper Award, IEEE/NASA/ESA AHS (2007) Best Paper Award, ACM PARMA (2013) Best Paper Award, ACM Computing Frontiers (2020) Hipeac Award at DAC (2019, 2020) Dr. Xydis has secured over 15 European/national research grants as Principal Investigator and Technical Coordinator, focusing on hardware acceleration frameworks and energy-efficient computing. His advising encompasses graduate research in hardware design and optimization, though specific student names aren't publicly listed. Current projects include CONVOLVE for Edge AI and CollectiveHLS for collaborative hardware synthesis. He is a core member of NTUA's Microelectronics Laboratory (Microlab) and collaborates with ICCS on hardware acceleration projects. His team develops frameworks like CollectiveHLS and throttLL'eM, with active participation in DATE, DAC, and ISCA conference communities.
Marco Guarnieri is an Associate Professor at the IMDEA Software Institute in Spain, where he leads research at the intersection of security, programming languages, and computer architecture. Prior to his current position, he completed his Ph.D. in Computer Science at the Institute of Information Security at ETH Zurich in 2017. His educational background includes: PhD in Computer Science, 2017, ETH Zurich MSc in Computer Engineering, 2012, Università degli Studi di Bergamo BSc in Computer Engineering, 2010, Università degli Studi di Bergamo Dr. Guarnieri's research spans multiple security domains with particular focus on: Security at the hardware-software boundary Microarchitectural side-channel attacks and countermeasures Database security and access control Formal methods for security verification Secure compilation and information flow control His publication record shows consistent contributions to microarchitectural security, especially regarding speculative execution vulnerabilities and hardware-software leakage contracts, combining theoretical foundations with practical implementations that have advanced secure systems design. Dr. Guarnieri has received significant recognition for his research: Distinguished paper award at CCS 2024 Distinguished paper award at CCS 2023 Distinguished paper award at CCS 2022 Best paper award at S&P 2021 He actively contributes to the research community through conference organization and program committees for PLDI, POPL, and other top venues. Dr. Guarnieri maintains an active research group at IMDEA Software Institute and is currently seeking talented researchers to work on security at the hardware-software interface.
Dionysios Pneumatikatos is a Professor at the School of Electrical and Computer Engineering of the National Technical University of Athens (NTUA) since September 2019. Previously, he served as a Professor and Chair of the Department of Electronic and Computing Engineering at the Technical University of Crete (2000–2019) and is an Associate Researcher at the Foundation for Research and Technology (FORTH) since 1997. His primary affiliations include the Computing Systems Laboratory (CSLab) at NTUA and the Computer Architecture and VLSI Systems (CARV) Laboratory at FORTH. Education: B.Sc. in Computer Science, University of Crete (1989) M.Sc. and Ph.D. in Computer Science, University of Wisconsin–Madison (1991, 1995) Research Interests: Computer Architecture Reconfigurable Computing Hardware Acceleration (e.g., FPGA, RISC-V) Energy-Efficient Systems Reliable System Design Application-Specific Architectures His work focuses on heterogeneous parallel systems , bioinformatics accelerators , and virtualization frameworks for reconfigurable platforms . Recent Projects & Contributions: Coordinator of the FASTER (FP7) project Principal Investigator in EDRA (H2020), EXTRA , and dReDBox Key roles in AXIOM , DeSyRe , and VPLANET These projects explore FPGA-based HPC systems , RISC-V ecosystems , and disaggregated data center architectures . Teaching & Mentorship: Teaches courses on Computer Architecture , Parallel Processing , and Logic Design at NTUA and TU Crete Supervised multiple national/EU projects, fostering interdisciplinary research in embedded and high-performance systems Labs & Networks: Active member of the HiPEAC European Network Program Committee roles at ISCA , FPL , and DATE Led the 21st International Conference on Field-Programmable Logic and Applications (FPL)
Christos Kotselidis is an Associate Professor at the University of Manchester's School of Computer Science and serves as Chief Engineer at Pierer Innovation (previously mentioned as KTM Innovation). He leads the TornadoVM project, a groundbreaking Java Virtual Machine for heterogeneous hardware acceleration. His work bridges academia and industry, focusing on hardware/software co-design for virtual machines and embedded systems. His research spans chip design, micro-architecture, compilers, virtual machines, and garbage collection. Dr. Kotselidis has pioneered work in heterogeneous computing, particularly in accelerating Java applications on GPUs, FPGAs, and RISC-V architectures. His team's recent development of GPULlama3.java demonstrates the practical application of his research in bringing LLM inference to pure Java with GPU acceleration. His publications show a consistent focus on bridging hardware capabilities with managed runtime systems. The research trajectory reveals increasing sophistication in handling memory hierarchies, parallelism, and cross-architecture execution. His work has significant implications for high-performance computing, AI acceleration, and sustainable computing practices. Dr. Kotselidis actively contributes to the academic community as a program committee member for conferences like ISMM and as an organizer for workshops including VMIL and MoreVMs. He's also involved in EU-funded projects like AERO and DARE, which focus on European processor initiatives and software ecosystems. As project lead for TornadoVM, he mentors a research team at Manchester including Michalis Papadimitriou, Mary Xekalaki, and Thanos Stratikopoulos. His lab (Beehive Lab) develops open-source tools that are widely used in both academic and industrial settings for heterogeneous computing.
Luc Maranget is a Researcher at Inria Paris working within the Cambium project. His primary research focuses on weak memory models, concurrency, formal verification, and computer architecture. He has made significant contributions to understanding memory models in modern architectures including ARM, x86, and RISC-V. Maranget's research interests center around the formal modeling of memory consistency in modern processor architectures. He has developed theoretical frameworks for understanding relaxed memory models across multiple architectures and has created practical tools like the diy testing suite for validating memory models. His work bridges theoretical computer science with practical hardware implementation concerns, particularly in the domain of concurrent programming. His publication record shows a consistent focus on memory models and concurrency since 2016, with increasing emphasis on formal verification of hardware specifications. His research spans both theoretical aspects (operational semantics for memory models) and practical applications (testing suites, compiler implementations). Maranget teaches courses on programming shared memory multicore machines at MPRI (Master Parisien de Recherche en Informatique) and has previously taught at École polytechnique. He is also the author of H E V E A, a fast LaTeX to HTML translator, demonstrating his interest in programming language implementation. As the main developer of the diy testing suite, Maranget has created an important tool for the memory models research community. His work provides practical validation methods for theoretical models of processor behavior, making significant contributions to the verification of concurrent systems.
Vasileios Karakostas is an Assistant Professor at the Department of Informatics and Telecommunications, National and Kapodistrian University of Athens. He is a member of the Computer Architecture Lab and focuses on computer architecture, memory systems, and resource management. Previously, he was a postdoctoral researcher at the National Technical University of Athens' Computing Systems Lab. He holds a PhD in Computer Architecture from Universitat Politècnica de Catalunya and Barcelona Supercomputing Center. Education: Ph.D. in Computer Architecture, Universitat Politècnica de Catalunya (2016) M.Sc. in Computer Architecture, Networks, and Systems, UPC (2012) B.Eng. in Electrical and Computer Engineering, NTUA (2009) Research Interests: Memory systems (virtual memory, NVM) Hardware/OS interaction Resource management in data centers Parallel systems and serverless computing RISC-V architectures and cloud infrastructure Projects: Active in Horizon Europe projects Vitamin-V, Neuropuls, and REBECCA. Previously contributed to DAPHNE and ACTiCLOUD (EU H2020). Awards: 2024: Distinguished Artifact Award (ASPLOS) 2011: Best Paper Award (ICPE) Selected for IEEE Micro's Top Picks (2015, 2016) Teaching: Courses include Logic Design, Parallel Systems, and Large-scale Computing Systems at undergraduate and graduate levels. Labs/Teams: Leads research in the Computer Architecture Lab, collaborating on resilient architectures and cloud computing innovations.
Professor Dionisios Pnevmatikatos holds the position of Professor at the School of Electrical and Computer Engineering, National Technical University of Athens (NTUA), where he leads research in Computer Architecture and Reconfigurable Computing. He previously served as a Professor at the Technical University of Crete (TUC) from 2000 to 2019, directing the Microprocessor and Hardware Laboratory (MHL) and chairing the department. His academic journey includes a B.Sc. from the University of Crete (1989), M.Sc. and Ph.D. from the University of Wisconsin-Madison (1991 and 1995). Research Interests: Focuses on Computer Architecture, Reconfigurable Computing, Application Acceleration, Custom Architectures, and Hardware Acceleration of Bioinformatics Algorithms. His work spans FPGA-based systems, parallel computing, and energy-efficient designs. Key Projects: Coordinator of FASTER (EU FP7), Principal Investigator in DeSyRe, AXIOM, dRedBox, and EDRAH2020 projects. Active in EU initiatives like H2020 OPTIMA and Vitamin-V for RISC-V ecosystems. Leadership roles in conferences include SAMOS 2018 and FPL 2011 program chairs. Teaching: Courses include Computer Architecture, Digital Systems Design, and Parallel Processing Systems at NTUA. Former roles include teaching at University of Crete and TUC. Labs: Affiliated with Computing Systems Laboratory (CSLab) at NTUA and FORTH-ICS since 1997. Involved in prototyping manycore architectures and network processors.
Nektarios Kozyris is a Professor of Computer Science and former Dean of the School of Electrical and Computer Engineering at the National Technical University of Athens (NTUA). He holds a PhD and Diploma in Electrical and Computer Engineering from NTUA. His research focuses on parallel and distributed systems, computer architecture, high-performance computing, and cloud infrastructure. He has authored over 180 papers and contributed to major projects like the Okeanos public cloud and Synnefo open-source software. Kozyris has led EU initiatives such as ACTiCLOUD and EuroEXA, and advises startups like Arrikto. He is a senior member of the ACM, IEEE Computer Society, and co-founder of the Greek Free/Open Source Software Society (GFOSS). His academic roles include teaching courses on computer architecture, operating systems, and distributed systems. Awards include Best Paper Awards at IPDPS 2001 and CCGRID 2013, and Intel's recognition for research in transactional memory. He actively contributes to conferences as a PC member and co-chair, and has supervised numerous PhD students in areas like distributed systems and sparse matrix computations. Kozyris pioneered the ~okeanos cloud infrastructure and advanced storage systems like Pithos. His work on GridTorrent and XOROS demonstrates innovation in data management and peer-to-peer systems. Current research includes elastic resource provisioning, quantum machine learning, and FPGA-based acceleration. His labs at NTUA and collaborations with institutions like ICCS and IMIS drive advancements in computing systems and software engineering.
