Manolis G.H. Katevenis

Manolis G.H. Katevenis is a Professor at the Department of Computer Science, University of Crete, and the founder and Head of the Computer Architecture and VLSI Systems (CARV) Laboratory at the Institute of Computer Science (ICS), Foundation for Research and Technology – Hellas (FORTH) in Heraklion, Crete, Greece. He has held academic positions since 1986 and played a pivotal role in establishing the Computer Science Department at the University of Crete. His research spans computer architecture, interconnection networks, VLSI systems, and high-performance computing, with a strong focus on scalable, low-power, manycore systems and RISC-V. He has led numerous European R&D initiatives, including serving as Coordinator of the ExaNeSt project.

• PhD in Computer Science, University of California, Berkeley (1983)
• MSc in Electrical Engineering and Computer Science, University of California, Berkeley (1980)
• Diploma of Electrical Engineering, National Technical University of Athens (1978)

Manolis Katevenis's research focuses on advancing scalable system architectures for high-performance and big data computing. His work in computer architecture includes RISC-V, exascale computing, and manycore systems. He has made foundational contributions to interprocessor communication, particularly through remote-write, remote-DMA, and remote-enqueue mechanisms, and has pioneered innovations in interconnection networks and low-latency network interfaces. His research integrates hardware and software co-design to optimize performance, energy efficiency, and scalability in large-scale computing systems.

The recent publications highlight a strong trend in exascale computing, interconnection networks, and FPGA-based prototyping of manycore systems. His work emphasizes scalable, low-power architectures, with recurring themes in congestion management, fair scheduling, crossbar design, and hardware-software integration for HPC. The articles span high-impact journals such as IEEE/ACM Transactions on Networking, IEEE Micro, and Computer Networks, reflecting sustained contributions to computer architecture and networking.

• ACM Doctoral Dissertation Award (1984)
• David J. Sakrison Memorial Prize (1983)
• IBM PhD Fellowship (1981–1983)
• Greek State Fellowship (1973–1978)
• Stelios Pichoridis Award for Outstanding University Teaching (2015)
• Member of Academia Europaea (elected 2012)
• Award by the Secretary General of the Region of Crete (2003)
• IEEE Milestone recognition for the RISC Project (2015)

Manolis Katevenis has supervised over 50 graduate theses and mentored many prominent Greek computer architects, including recipients of the ACM Maurice Wilkes Award. He has served as Principal Investigator or co-PI in over 30 R&D projects with a total budget exceeding 18 million euros, including major European initiatives such as ExaNeSt (which he coordinated), EuroEXA, EcoScale, SARC, ENCORE, and multiple HiPEAC Network of Excellence projects. His leadership extends to project coordination, architectural design, FPGA prototyping, and systems software development.

Katevenis founded and leads the CARV Laboratory at FORTH-ICS, a major research team with 80–100 members focused on computer architecture and VLSI systems. The lab has spun off the Distributed Computing Systems (DCS) Laboratory and is central to European exascale computing efforts, including participation in the European Processor Initiative. CARV has developed large-scale prototypes such as the 768-core ExaNeSt system and the Formic FPGA platform for manycore research.