Juan Luis Aragon Alcaraz is a Full Professor in Computer Architecture at the University of Murcia (Spain), affiliated with the Faculty of Informatics and the Department of Computer Engineering and Technology. He obtained his PhD in Computer Engineering from the University of Murcia in 2003 and held a postdoctoral position as a Visiting Assistant Professor and Researcher at the University of California, Irvine. He has held visiting researcher positions at EPFL (2013) and Princeton University (2015–2022). His research focuses on computer architecture, emphasizing heterogeneous parallel systems, GPUs, memory hierarchies, and energy-efficient microarchitecture design. He has advised 7 PhD theses and co-authored over 60 publications in top-tier conferences and journals. His work includes contributions to GPU-accelerated medical imaging, energy-efficient graphics pipelines, and hardware-software co-design for parallel systems. Key research trends in his articles include optimizing GPU performance for real-time applications, energy efficiency in graphics rendering, and scalable latency tolerance in manycore systems. His patents include innovations in presbyopia correction devices leveraging GPU and FPGA technologies. Dr. Aragón has taught numerous courses in computer architecture and design, including Computer Architecture and Organization, Advanced Aspects in Multicore Architectures, and Embedded Systems Technologies. His labs and collaborations span academic-industrial partnerships, emphasizing practical applications of his theoretical contributions.










