Jonathan Balkind is an Assistant Professor in the Department of Computer Science at the University of California, Santa Barbara (UCSB). His research focuses on the intersection of computer architecture, programming languages, and operating systems, with an emphasis on pragmatic system design and open-source hardware. He leads the ArchLab at UCSB and is affiliated with the OpenPiton project, an open-source manycore research framework. Education includes a PhD and MA in Computer Science from Princeton University (adviser: Prof. David Wentzlaff), an MSci in Computing Science from the University of Glasgow (advisers: Prof. Joseph Sventek and Dr. John O'Donnell), and exchange studies at UCSB. His work has been supported by awards such as the NSF Early CAREER Award (2023) and the Open Hardware Trailblazer Fellowship (2022). Research interests span heterogeneous computing, cache-coherent systems, FPGA integration, and domain-specific architectures. Notable projects include the 25-core Piton chip, the CIFER SoC with embedded FPGA, and the DECADES manycore processor. Recent publications address fused-kernel operating systems (Stramash), control logic synthesis, and hyperloop data-center architectures. His awards reflect contributions to open-source hardware and academic mentorship, including Siebel Scholarship (2018), Gordon Y.S. Wu Fellowship (2013–2017), and multiple teaching/research recognitions. He actively collaborates with industry (e.g., Microsoft Research, ARM) and advises on open-source projects.
Laura Pozzi is a Full Professor at the Faculty of Informatics, Università della Svizzera italiana (USI), Switzerland, since 2015. She previously held positions as Associate Professor (2011–2015) and Assistant Professor (2005–2011) at USI. Prior to joining USI, she was a postdoctoral researcher at EPFL's Processor Architecture Laboratory (2001–2005), a research engineer at STMicroelectronics (2000), and an Industrial Visitor at UC Berkeley (2000). Education: MS and PhD in Computer Engineering from Politecnico di Milano, Italy (1996–2000). Her research focuses on the interaction between compiler and architecture design, particularly in embedded systems , with key areas including approximate computing , coarse-grained reconfigurable arrays (CGRAs) , high-level synthesis (HLS) , and fuzz testing . She has led projects on automated design space exploration, compiler optimizations for reconfigurable architectures, and error estimation in approximate circuits. Recent Publications span topics like SAT-based mapping for CGRAs , grammar-based fuzzing of shell interpreters , and approximate logic synthesis , reflecting her interdisciplinary work bridging hardware/software co-design and software verification. Scientific Awards: Credit Swiss Best Teaching Award IEEE DAC Best Paper Award Leadership Roles: Co-Program Chair, IEEE Symposium on Application Specific Processors (SASP) Editorial Board Member, IEEE Design and Test Students: Current: Rodrigo Otoni (Postdoc), Morteza Rezaalipour (PhD), Riccardo Felici (PhD), Cristian Tirelli (PhD) Alumni: Ilaria Scarabottolo (PhD/Postdoc), Lorenzo Ferretti (PhD/Postdoc), Georgios Zacharopoulos (PhD), Giovanni Ansaloni (PhD/Postdoc), Paolo Bonzini (PhD)
Yunseong Nam is an Adjunct Assistant Professor at the University of Maryland. His research focuses on advancing quantum computing through innovations in trapped-ion systems, quantum algorithms, and error mitigation techniques. He is particularly known for developing methods to enhance gate fidelity, optimize quantum circuits, and improve fermionic simulations for quantum chemistry applications. Research Interests: Nam’s work spans quantum hardware optimization, entangling gate implementation, and hybrid quantum-classical computing architectures. He emphasizes practical applications like materials science simulations and fault-tolerant protocols, leveraging symmetries and resource-efficient algorithms to address computational challenges. His contributions include breakthroughs in pulse engineering, SPAM error handling, and the design of robust quantum circuits. Key Research Trends: Recent articles highlight advancements in trapped-ion gate optimization (e.g., small-angle Mølmer-Sørensen gates), error mitigation strategies, and quantum circuit compilers. His work frequently intersects with experimental quantum systems, emphasizing real-world implementations over purely theoretical models. Awards & Grants: No specific awards or grants are mentioned in the provided texts. Labs & Teams: While specific lab affiliations are not detailed, his collaborations likely involve quantum computing hardware groups and theoretical teams focused on algorithm optimization.
Professor Noah Linden is a faculty member in the School of Mathematics at the University of Bristol , holding the title of Professor of Theoretical Physics. His research focuses on Quantum Information Theory , Mathematical Physics , and related areas in quantum computing and thermodynamics. He has contributed to 105 research outputs and leads projects such as Reliable and Robust Quantum Computing and Compilation and Verification of Quantum Software . Key research themes include quantum scrambling, entanglement dynamics, and applications in biophysics. His work has been cited in studies on quantum dots, qubit manipulation, and nonlocality limits. He has also contributed datasets on exciton dynamics in purple bacteria and collaborated on projects analyzing decoherence and disorder effects in photosynthetic systems. Professor Linden serves as an editor for the Journal of Physics A: Mathematical and General and maintains active collaborations across quantum information, quantum computing, and interdisciplinary physics. His research output includes foundational studies on quantum error correction, measurement theory, and computational advantages.
Andrea Guerrieri serves as an Associate Professor at the School of Engineering, University of Applied Sciences and Arts Western Switzerland Valais (HES-SO Valais-Wallis), specializing in reconfigurable computing and electronics design automation. His research has established significant industry impact through tools like DynaRapid and Dynamatic, with technology adopted by major semiconductor companies including MIPS, Intel, and AMD-Xilinx. BSc HES-SO in Industrial Systems - System-on-Chip specialization BSC HES-SO in Computer and Communication Systems - Digital Design specialization MSc HES-SO in Engineering - Embedded Hardware and Firmware specialization Professor Guerrieri's research focuses on reconfigurable computing, electronics design automation (EDA), and security, with particular emphasis on FPGA design, high-level synthesis, and post-quantum cryptography implementations. His work bridges the gap between theoretical computer architecture and practical hardware implementations, with strong applications in space technology and embedded security systems. His recent publications demonstrate increasing focus on energy-efficient implementations for space applications and quantum-resistant cryptographic systems. Analysis of his 15 most recent publications reveals a clear research trajectory toward optimizing FPGA implementations for post-quantum cryptography and space applications. His work consistently addresses the performance bottlenecks in high-level synthesis while maintaining practical applicability for industry partners like NASA, CERN, and major semiconductor companies. The recent surge in best paper awards (three in 2024 alone) reflects growing recognition of his contributions to efficient FPGA compilation techniques and cryptographic implementations. Scientific Awards: Best Paper Award at FPL 2024 Best Paper Award at HPEC 2024 Best Paper Award at ISFPGA 2020 Outstanding Short Paper Award at IEEE HPEC 2024 Outstanding TPC Member Award at DAC 2024 IEEE Senior Member (2021) Multiple Best Paper nominations (FCCM 2022, FPL 2022, HiPEAC 2022) Professor Guerrieri actively participates in international research projects including the DyReCte project (2019-2021) on dynamically reconfigurable cryptoengines for nano-satellites. He currently chairs the Onboard Computing topic for the Swiss consortium CHEESE affiliated with NASA SSERVI and collaborates extensively with industry partners including AMD-Xilinx, NVIDIA, Arm, NASA, and CERN, as well as academic institutions like ETH Zurich and University of Geneva. His current research focuses on developing next-generation EDA tools and reconfigurable computing platforms for both terrestrial and space applications. His laboratory work centers around FPGA-based prototyping and validation, with specialized facilities for space applications testing. Professor Guerrieri leads a research team that includes Andres Upegui, Quentin Berthet, Laurent Gantel, and Gabriel Da Silva Marques, focusing on practical implementations of reconfigurable architectures for security and space applications.
Umut A. Acar is a Professor at the Computer Science Department , Carnegie Mellon University , and an Amazon Scholar. His research focuses on bridging formal methods with systems , algorithms , and AI , aiming to integrate safety and performance in parallel computing. His research spans multiple domains: Quantum Computing : Developing optimization techniques for quantum circuits (e.g., Quartz , Atlas ). Self-Adjusting Computation : Advancing dynamic algorithms and incremental programming frameworks (e.g., Diderot , MPL ). Concurrency & Parallelism : Designing efficient scheduling mechanisms and disentanglement strategies. Recent publications highlight his work on parallel functional programming , quantum simulation , and cache coherence optimization . Notable awards include Best Paper (QCE 2025) , Distinguished Paper (POPL 2024) , and the Intel Award (2022) . He advises PhD students like Pengyu Liu and Mingkuan Xu , and has mentored alumni now at institutions such as NYU , Google , and Inria . His lab collaborates on projects like Diderot (AI/ML) and MPL (parallelism management).
Dr. Andrea Guerrieri is an Associate Professor at the University of Applied Sciences and Arts Valais-Wallis - School of Engineering , specializing in Reconfigurable Computing, Electronics Design Automation (EDA), and Post-Quantum Cryptography . His work focuses on accelerating FPGA compilation through tools like DynaRapid and optimizing security protocols via Dynamatic , with technologies adopted by industry leaders including Intel, AMD-Xilinx, and CERN . He holds a BSc in Industrial Systems and a MSc in Engineering from HES-SO, and teaches courses in Digital Design and Embedded Hardware. BSc HES-SO in Industrial Systems (2019) BSc HES-SO in Computer and Communication Systems (2017) MSc HES-SO in Engineering (2021) Guerrieri’s research bridges High-Level Synthesis (HLS) and Reconfigurable Architectures to enhance FPGA performance for both terrestrial and space applications . His 2025 publications highlight advancements in heterogeneous computing , energy-efficient PQC , and rapid compilation frameworks . Notably, his 2024 work on DynaRapid achieved 20× speedup in C-to-FPGA implementation. Key scientific contributions span dataflow circuit optimization , dynamic scheduling , and automated code transformations . His 2023 book Applications Enabled by FPGA-Based Technology and 2021 textbook System-on-Chip Design with Arm established foundational references in embedded systems. Awards include Best Paper at FPL 2024 , Outstanding TPC Member at DAC 2024 , and IEEE Senior Membership (2021) . 2024: Best Paper Award (FPL), Outstanding Short Paper Award (HPEC) 2023: H-Saber publication on PQC optimization 2021: IEEE Senior Member recognition As Chair of Onboard Computing for the CHEESE-NASA SSERVI consortium, he leads international collaborations with ETH Zurich, University of Geneva, California State University , and companies like NVIDIA, Arm, and NASA . His projects include the Innosuisse-funded DyReCte initiative (2019–2021) for reconfigurable cryptoengines in nanosatellites.
Stefano Markidis is a leading researcher in High-Performance Computing (HPC) and quantum computing. His work focuses on developing advanced simulation frameworks, such as the Neko framework for computational fluid dynamics, and optimizing algorithms for heterogeneous architectures. He collaborates extensively with institutions and researchers globally, contributing to fields like plasma physics, quantum systems, and machine learning applications. His research emphasizes scalability, performance optimization, and the integration of cutting-edge technologies like GPU acceleration and quantum computing. Key research interests include extreme-scale simulations, quantum algorithms, and in-situ data analysis techniques. He has published over 200 articles, with recent work addressing challenges in NISQ systems, tensor network simulations, and CUDA-based performance enhancements. His contributions span theoretical and applied domains, bridging computational methods with real-world applications in fusion energy, materials science, and space exploration. Notable collaborations include projects with Philipp Schlatter, Niclas Jansson, and the NISQ application development community. Markidis also explores hybrid frameworks combining classical and quantum computing, aiming to leverage emerging hardware for scientific breakthroughs.
Michael D. Smith is the John H. Finley, Jr. Professor of Engineering and Applied Sciences and Distinguished Service Professor at Harvard University. He previously served as Dean of the Faculty of Arts and Sciences (FAS) for 11 years, leading Harvard's largest school with a focus on undergraduate education, faculty development, and interdisciplinary research. He holds a Ph.D. from Stanford University (1993), a Master’s from Worcester Polytechnic Institute, and a Bachelor’s from Princeton University. His academic career is complemented by industry experience, including co-founding Liquid Machines (acquired by Check Point in 2010), and advisory roles with venture capital firms like 1984 Ventures and GSV Ventures. Research interests span computer science education innovation, technology’s societal impact, and hardware/software systems. He pioneered work on voltage noise mitigation in processors, cybersecurity solutions, and online education platforms like edX. Awards include the NSF Young Investigator Award (1993), Alpha Iota Teaching Prize, and W.E.B. Du Bois Medal. Currently, he advises startups and educational initiatives such as CS Forward and Kira Learning, while developing new in-person and online courses. His leadership roles include Board member at The Peddie School and former edX Board member (2012–2018).
W. Kent Fuchs is a Professor & President Emeritus at the University of Florida's Department of Electrical & Computer Engineering, part of the College of Engineering. His research focuses on dependable computer systems, testing, and failure analysis of integrated circuits. He holds a Ph.D. in Electrical Engineering from the University of Illinois (1985), an M.Div. from Trinity Evangelical Divinity School (1984), and additional degrees from the University of Illinois and Duke University. Education: Ph.D., Electrical Engineering, University of Illinois, 1985 M.Div., Trinity Evangelical Divinity School, 1984 M.S., Electrical Engineering, University of Illinois, 1982 B.S.E., Electrical Engineering & Computer Science, Duke University, 1977 His research emphasizes fault tolerance and system reliability, particularly in hardware and distributed computing environments. Recent publications explore spare allocation, fault recovery in heterogeneous systems, and compiler-assisted error handling. His work bridges theoretical foundations with practical implementations in reconfigurable arrays and wireless networks. While no formal awards are listed, his contributions to dependable computing have influenced both academic and industrial applications. His advising and grant activities are not detailed here, but his role as President Emeritus underscores his leadership in academia.
Sandro Bartolini serves as Associate Professor in the Department of Information Engineering and Mathematical Sciences at the University of Siena, Italy, where he teaches advanced courses in computer architecture and parallel programming while leading cutting-edge research in high-performance computing systems. His academic journey began with a cum laude Laurea in Computer Engineering followed by a PhD in Computer Science and Engineering from Università di Pisa. Education: PhD in Computer Science and Engineering, Università di Pisa Laurea in Computer Engineering (cum laude), Università di Pisa Research Focus: His work centers on photonic interconnects for chip multiprocessors , energy-efficient software optimization for multi-core/GPU architectures, and performance-portable parallel programming models . Current investigations span cryptographic acceleration, blockchain algorithms, and hardware/software co-design for emerging computing paradigms, with strong emphasis on practical implementations bridging theoretical advances and real-world applications. Publication Trends: Recent publications (2019-2023) reveal three dominant threads: (1) Photonic network innovations addressing energy bottlenecks in chip multiprocessors, (2) The PHAST library ecosystem enabling seamless CPU/GPU programming across domains from autonomous vehicles to UAV navigation, and (3) Hardware accelerator designs for convolutional networks and cryptographic workloads. These works consistently target performance-portability challenges in heterogeneous computing environments. Grants and Collaborations: As principal investigator for the Italian Ministry-funded PHOTONICA project, he established international research partnerships with Murcia University, Columbia University, and Hong Kong University of Science and Technology, while securing industry collaborations with STMicroelectronics, Intel Munich, IBM, and IMEC. He has also managed complex IT system deployments for Siemens Italy, RAI (Italian public broadcasting), and SpaceDys. Academic Leadership: Bartolini serves as Associate Editor for the Eurasip Journal of Embedded Computing and actively contributes to the European HiPEAC network. His research group at Siena maintains strong industry ties for technology transfer, particularly in photonic interconnect validation and parallel programming frameworks for next-generation computing systems.
Johannes Geier is a Researcher at the Chair of Design Automation at the Technical University of Munich (TUM). His work focuses on electronic design automation, fault injection simulations, and security countermeasures for RISC-V processors. University: Technical University of Munich Department: Chair of Design Automation Email: johannes.geier@tum.de Research Interests Electronic Design Automation (EDA) for analog and digital circuits Fault tolerance and reliability in RISC-V architectures Security analysis of post-quantum cryptographic systems Timing analysis and microfabrication techniques Optical Networks-on-Chip (NoC) and emerging technologies Compiler-assisted hardware security implementations Recent Research Trends Specializes in fault injection methodologies for hardware security validation Develops open-source tools like vRTLmod for RTL simulation acceleration Explores RISC-V vector extensions for post-quantum cryptography Investigates differential fault effect equivalence checks for efficiency Designs compiler-based security countermeasures against instruction skip attacks Works on concurrent multi-node XCP proxy server architectures
Martin Elsman is a full-time Professor in the Programming Languages and Theory of Computation section at the Department of Computer Science, University of Copenhagen (DIKU). He serves as head of the PLTC section and head of studies for the BSc education in Computer Science and Economics. Elsman is also an active maintainer of several software tools including the MLKit and SMLtoJs. Joined DIKU in 2012 after 4 years at SimCorp (2008-2012) and previous Associate Professorship at IT University of Copenhagen (2003-2008). Co-developer of Futhark, TAIL APL compiler, SMLtoJs, and SMLserver. Education: M.Sc. in Engineering, Technical University of Denmark Ph.D. in Computer Science, University of Copenhagen (DIKU), supervised by Mads Tofte. Research Interests: Elsman works on programming language design and implementation, with a focus on functional programming, module systems, domain-specific languages for financial contracts, region-based memory management, compilation techniques for parallelism, program optimization, and static type systems. His work spans both theoretical and applied domains, including blockchain-based financial contract execution, web technology, and GPU programming using functional languages. Publication Trends: His recent articles focus on functional programming, array programming, parallelism, and memory management. Topics include region inference, type systems for data-parallelism, program optimization techniques, and domain-specific compilation for financial and quantum computing. He frequently collaborates with Troels Henriksen and others on tools like Futhark and MLKit.
Matthew R. Guthaus is a Professor in the Electrical and Computer Engineering Department at the University of California Santa Cruz's Baskin School of Engineering. With an active research career spanning over two decades, his work focuses on VLSI design, Electronic Design Automation, and memory systems. His research interests include VLSI Design, Computer-Aided Design, Electronic Design Automation, Memory Design, Clock Distribution, Resonant Clocking, and Machine Learning for EDA. Guthaus has made significant contributions to open-source EDA tools, most notably OpenRAM, which has become an important resource for memory compiler development in academia and industry. Analysis of his recent publications (2021-2025) reveals a strategic evolution in his research, incorporating machine learning techniques into traditional EDA problems while maintaining strong foundations in circuit design. His work spans from fundamental circuit design to high-level system considerations, with particular emphasis on open-source frameworks that enable broader collaboration in the semiconductor community. Guthaus has been actively involved in national initiatives addressing semiconductor research and workforce development, as evidenced by his contributions to NSF workshops on integrated circuits. His recent publications show continued innovation in memory design, clock distribution, and the application of AI to traditional EDA challenges. His research has practical applications in low-power circuit design, high-performance computing systems, and the growing field of neuromorphic computing. The consistent publication record through 2025 demonstrates ongoing active research and leadership in the EDA community.
Alastair F. Donaldson is a Professor in the Department of Computing at Imperial College London's Faculty of Engineering, where he leads the Multicore Programming Group. He also works as a Software Engineer at Google in the Android Graphics Team. Previously, he served as Director of GraphicsFuzz, an Imperial College spinout company acquired by Google in 2018. His research spans programming languages, compilers, verification, and testing, with a particular focus on randomized and fuzz testing techniques for compilers and program analyzers. Donaldson has developed several influential testing frameworks including GraphicsFuzz, RustSmith, and GrayC, which have significantly advanced compiler testing methodologies. Analysis of his recent publications reveals a strong trend toward practical applications of compiler testing techniques across diverse domains including GPU programming, verification-aware languages, and memory models. His work increasingly incorporates continuous integration practices and focuses on addressing real-world challenges in compiler development and verification. Donaldson maintains active involvement in the programming languages research community, serving on program committees for major conferences including PLDI, POPL, ASPLOS, and SPLASH. He has contributed significantly to advancing compiler testing methodologies and has mentored numerous researchers through PLMW (Programming Languages Mentoring Workshop). He leads the Multicore Programming Group at Imperial College London, which focuses on challenges in parallel and concurrent programming. His work bridges theoretical computer science with practical software engineering challenges, particularly in the areas of compiler correctness and verification.
