Sandro Bartolini

Sandro Bartolini serves as Associate Professor in the Department of Information Engineering and Mathematical Sciences at the University of Siena, Italy, where he teaches advanced courses in computer architecture and parallel programming while leading cutting-edge research in high-performance computing systems. His academic journey began with a cum laude Laurea in Computer Engineering followed by a PhD in Computer Science and Engineering from Università di Pisa.

Education:

• PhD in Computer Science and Engineering, Università di Pisa
• Laurea in Computer Engineering (cum laude), Università di Pisa

Research Focus: His work centers on photonic interconnects for chip multiprocessors, energy-efficient software optimization for multi-core/GPU architectures, and performance-portable parallel programming models. Current investigations span cryptographic acceleration, blockchain algorithms, and hardware/software co-design for emerging computing paradigms, with strong emphasis on practical implementations bridging theoretical advances and real-world applications.

Publication Trends: Recent publications (2019-2023) reveal three dominant threads: (1) Photonic network innovations addressing energy bottlenecks in chip multiprocessors, (2) The PHAST library ecosystem enabling seamless CPU/GPU programming across domains from autonomous vehicles to UAV navigation, and (3) Hardware accelerator designs for convolutional networks and cryptographic workloads. These works consistently target performance-portability challenges in heterogeneous computing environments.

Grants and Collaborations: As principal investigator for the Italian Ministry-funded PHOTONICA project, he established international research partnerships with Murcia University, Columbia University, and Hong Kong University of Science and Technology, while securing industry collaborations with STMicroelectronics, Intel Munich, IBM, and IMEC. He has also managed complex IT system deployments for Siemens Italy, RAI (Italian public broadcasting), and SpaceDys.

Academic Leadership: Bartolini serves as Associate Editor for the Eurasip Journal of Embedded Computing and actively contributes to the European HiPEAC network. His research group at Siena maintains strong industry ties for technology transfer, particularly in photonic interconnect validation and parallel programming frameworks for next-generation computing systems.