جستجوی استاد راهنمای دانشگاهی

• Security
• Embedded Systems Security
• Cyber-Physical Systems Security
• +۱۳ مورد دیگر

Francesco Regazzoni is a Senior Researcher at the Faculty of Informatics, Università della Svizzera italiana (USI), and affiliated with the Dalle Molle Institute for Artificial Intelligence (IDSIA USI-SUPSI). His work bridges embedded systems, cybersecurity, and artificial intelligence, with a focus on securing hardware and cyber-physical systems. Research Interests: His expertise spans embedded and cyber-physical systems security, side-channel attacks, post-quantum cryptography, hardware trojans, random number generators, and the security of AI and approximate computing. He also contributes to hardware/software co-design and operating systems security. The analysis of his recent publications reveals a consistent focus on hardware and system-level security , particularly in resource-constrained environments like IoT and embedded devices. His work integrates machine learning for attack detection and applies formal methods to ensure trust in hardware. A growing emphasis is placed on securing AI systems from physical and adversarial threats. Scientific Contributions: Over 100 peer-reviewed publications One book and one patent Extensive international collaboration (Belgium, Netherlands, USA, Switzerland, Singapore) Advising and Grants: While specific advisees and grants are not listed, his leadership in funded research projects and involvement with ALaRI and IDSIA suggest active mentorship and project coordination. His work has been supported by industry (e.g., ST Microelectronics, HP), the Swiss National Foundation, and the European Union. Labs and Teams: He is part of the Graph Machine Learning Group (GMLG) at IDSIA, which evolved from the Advanced Learning and Research Institute (ALaRI). This group focuses on graph machine learning, reinforcement learning, and dynamical systems, particularly in non-stationary environments.

• Electronic Design Automation
• Fault Injection Simulation
• RISC-V Processors
• +۷ مورد دیگر

Johannes Geier is a Researcher at the Chair of Design Automation at the Technical University of Munich (TUM). His work focuses on electronic design automation, fault injection simulations, and security countermeasures for RISC-V processors. University: Technical University of Munich Department: Chair of Design Automation Email: johannes.geier@tum.de Research Interests Electronic Design Automation (EDA) for analog and digital circuits Fault tolerance and reliability in RISC-V architectures Security analysis of post-quantum cryptographic systems Timing analysis and microfabrication techniques Optical Networks-on-Chip (NoC) and emerging technologies Compiler-assisted hardware security implementations Recent Research Trends Specializes in fault injection methodologies for hardware security validation Develops open-source tools like vRTLmod for RTL simulation acceleration Explores RISC-V vector extensions for post-quantum cryptography Investigates differential fault effect equivalence checks for efficiency Designs compiler-based security countermeasures against instruction skip attacks Works on concurrent multi-node XCP proxy server architectures

Vincent Beroulleمشاهده پروفایل

استاد

• Microelectronics
• Hardware Security
• Fault Modeling
• +۴ مورد دیگر

Professor Vincent Beroulle at Grenoble Institute of Technology's Esisar campus leads the LCIS laboratory, focusing on security and safety of complex integrated circuits and systems. His work bridges fault modeling, fault injection, and security for IoT and RFID technologies. Education: Engineer Degree (INPG, 1996), Master (University of Montpellier II, 1999), Ph.D. (University of Montpellier II, 2002) Current Role: Director of LCIS Laboratory, Professor in Embedded System Security & Safety Research spans hardware security, fault injection attacks, and vulnerability analysis of embedded systems. Recent work includes clock glitch fault injection studies, lightweight ECC countermeasures for RFID, and aging effects on PUF architectures. His team explores cross-layer methodologies to enhance fault models and security protocols. Supervision includes 12 current and former PhD students tackling topics like secure RFID tags, fault injection countermeasures, and PUF-based security. Projects under ANR, PEPR Cyber, and ERASMUS+ funding drive his lab's innovation in secure embedded design.

• Hardware Security
• Side-Channel Attacks
• Cryptographic Circuits
• +۳ مورد دیگر

Darshana Jayasinghe is a Postdoctoral Research Associate at the School of Electrical and Information Engineering (EIE) , University of Sydney. He holds a PhD from the University of New South Wales (UNSW), completed in 2017, and worked as a Research Associate there until December 2022. His research focuses on hardware security, particularly side-channel analysis attacks and countermeasures. Education: PhD, University of New South Wales (2017) Research Interests include: Side-channel analysis attacks (Power Analysis, EM Attacks, Fault Injection) Countermeasures (Balancing, Random Execution, Masking) On-chip sensors for FPGA monitoring FPGA reliability under power fluctuations Publication Trends reveal expertise in: Hardware Security (15/15 articles) FPGA Vulnerabilities (10/15 articles) Cryptographic Countermeasures (12/15 articles) Sensor Development (5/15 articles)

Naghmeh Karimiمشاهده پروفایل

دانشیار

• Hardware Security
• Design-for-Trust
• Fault Tolerance
• +۹ مورد دیگر

Naghmeh Karimi is an Associate Professor in the Department of Computer Science and Electrical Engineering at the University of Maryland Baltimore County (UMBC), where she has held this position since 2023, after serving as an Assistant Professor from 2017 to 2023. She is a recipient of the NSF CAREER Award (2020) and the Best Paper Award (2019). Her research focuses on hardware security, trustworthiness, and reliability of integrated circuits, with a particular emphasis on cryptographic devices, PUF-based authentication, and aging-related vulnerabilities. She directs the SECure, REliable and Trusted Systems (SECRETS) Lab at UMBC, which explores topics including hardware security countermeasures, fault tolerance, and AI-driven security solutions. Prior to UMBC, she was affiliated with Rutgers University, New York University, Duke University, and Yale University. Her research interests span hardware security, design-for-trust, fault tolerance, AI for security, and VLSI design. Recent work emphasizes aging effects on cryptographic circuits, PUF resilience, and digital sensor-based failure detection. Her publications address challenges in side-channel attacks, fault injection, and secure IoT frameworks. Dr. Karimi’s work is supported by sponsors, and she actively mentors Ph.D. students in hardware security and reliability. Her lab offers openings for self-motivated researchers in these areas.

Patrick Robert Schaumontمشاهده پروفایل

استاد

• Hardware Security
• Cryptographic Engineering
• Tamper-Resistant Design
• +۴ مورد دیگر

Patrick Robert Schaumont is a Professor of Electrical & Computer Engineering at Worcester Polytechnic Institute (WPI), holding the Joseph Samuel S. Satin Distinguished Fellowship. He specializes in hardware security, cryptographic engineering, and tamper-resistant design. His research focuses on challenges in secure hardware/software codesign, side-channel analysis, and fault injection countermeasures. Education: BS in Electrical Engineering from Ghent University College (1988), MS in Computer Science from University of Ghent (1990), and PhD in Electrical Engineering from UCLA (2004). Research Interests: Schaumont's work spans hardware security topics such as cryptographic implementation security, embedded systems protection, and secure design methodologies. He emphasizes real-world demonstrations and student-driven innovation, with projects like the Vernam Lab at WPI. His research has produced numerous demonstrators and open-source tools, including the SCAPEgoat library for side-channel analysis. Notable Contributions: IEEE Fellow (2025), Dean's Excellence Professor, and Radboud Excellence Program Visiting Professor. He has advised over 50 students, many of whom work at leading tech companies like NVIDIA, Google, and Qualcomm. Labs & Teams: Director of the Vernam Lab, focused on advancing secure hardware and embedded systems research. Collaborates with industry and academia on topics like post-quantum cryptography and fault-resistant designs.

• Hardware Security
• Embedded Systems Security
• Physically Unclonable Functions (PUFs)
• +۷ مورد دیگر

Jean-Luc Danger is a Professor at TELECOM Paris where he currently heads the Digital Electronic Systems Research Group. He is affiliated with the Secure and Safe Hardware (SSH) Research Team within the Information Processing and Communication Laboratory (LTCI). With a career spanning over three decades in academia after 12 years in industrial research at PHILIPS and NOKIA, Professor Danger has established himself as a leading expert in hardware security and cryptographic implementations. Professor Danger received his degree in electrical engineering from SUPELEC in 1981 before embarking on his industrial career. His academic journey began in 1993 when he joined TELECOM Paris, where he has since made significant contributions to the field of hardware security. His educational background in electrical engineering provided the foundation for his later specialization in secure hardware design and analysis. Professor Danger's research primarily focuses on embedded systems security , physically unclonable functions (PUFs) , side-channel attacks and countermeasures , and fault injection techniques . His work bridges the gap between theoretical cryptography and practical hardware implementations, addressing critical security challenges in modern computing systems. His research has evolved from foundational work on cryptographic algorithms to more recent investigations into hardware Trojans, aging effects on security primitives, and automotive security systems. Professor Danger has been particularly influential in developing methodologies for analyzing and protecting against electromagnetic fault injection attacks and side-channel information leakage. His extensive publication record demonstrates a consistent focus on hardware security challenges, with recent work showing increased attention to automotive security systems, machine learning applications for intrusion detection, and reliability issues in security primitives affected by aging and process variations. The trajectory of his research shows a natural progression from pure cryptographic implementations to more holistic security approaches that consider the entire hardware stack and its vulnerabilities. Through his leadership of the Secure and Safe Hardware research team, Professor Danger has fostered a collaborative environment that bridges theoretical security research with practical hardware implementation challenges. His work has contributed significantly to the development of standardized methodologies for evaluating hardware security and has influenced both academic research and industry practices in secure hardware design.

Yu Biمشاهده پروفایل

استادیار

• Hardware Security
• Deep Learning Accelerators
• Supply-Chain Security
• +۳ مورد دیگر

Dr. Yu Bi is an Assistant Professor in the Department of Electrical, Computer and Biomedical Engineering at the University of Rhode Island. His research focuses on hardware security, supply-chain security, and deep learning hardware acceleration. He holds a Ph.D. from the University of Central Florida (2016), an M.S. from New York University (2012), and a B.S. from Xidian University (2010). His work emphasizes fault-tolerant neural network architectures, adversarial attack mitigation, and secure hardware design. Notable contributions include frameworks like SHIELDeNN and Fiji-FIN, addressing vulnerabilities in quantized neural networks and inference accelerators. His research bridges emerging transistor technologies with cybersecurity solutions. Publications highlight trends in hardware-assisted cybersecurity, adversarial machine learning defense mechanisms, and the application of entropy modeling to analyze attack impacts. Ongoing studies explore post-Moore’s Law hardware innovations and backdoor attack countermeasures in large language models.

Aurélien Francillonمشاهده پروفایل

استاد

• Cybersecurity
• Embedded Systems Security
• Software Security
• +۳ مورد دیگر

Aurélien Francillon is a full professor in the Networking and Security Department at EURECOM, France. His research focuses on embedded systems security, software security, and telecom fraud. He holds a PhD from INRIA Grenoble and previously worked as a postdoc at ETH Zurich's System Security Group. Education & Experience: PhD in Computer Science, INRIA Grenoble Postdoctoral Researcher, ETH Zurich (2013-2015) Current Position: Full Professor at EURECOM Research Interests: His work addresses critical challenges in securing embedded systems, firmware analysis, side-channel attacks, and telecom fraud. He pioneers tools like Avatar2 for firmware analysis and explores vulnerabilities in Bluetooth, TLS, and CI/CD systems. His methodologies emphasize reproducibility (BEERR framework) and automation (LibAFL QEMU). Labs & Collaborations: Collaborates with industry partners like Intel Labs, SAP Security Research, and Cisco Talos. His lab leads open-source projects including SymCC, LibAFL, and X-Ray-TLS. Advises over 20 PhD/Master students and postdocs, many now in academia and industry. Awards & Recognition: (No explicit awards listed, but extensive contributions to top-tier security conferences and open-source frameworks.) Grants & Funding: Secures funding through European Research Council grants and industry partnerships for projects on firmware security, IoT vulnerabilities, and CI/CD pipeline integrity.

Mirjana Stojilovicمشاهده پروفایل

پژوهشگر

• Field-Programmable Technology
• Electronic Design Automation (EDA)
• Hardware Security
• +۳ مورد دیگر

Mirjana Stojilovic is a researcher at EPFL's School of Computer and Communication Sciences and the Parallel Systems Architecture Laboratory (PARSA). She obtained her PhD in 2013 from the School of Electrical Engineering in Belgrade and has worked on projects like STRUCTURES (EU FP7) and ADHeS (armasuisse). Her research spans field-programmable technology, electronic design automation, and hardware security, with a focus on side-channel attacks and countermeasures in reconfigurable systems. Education: PhD in Electrical Engineering (2013), School of Electrical Engineering, Belgrade Research Areas: FPGA security, power analysis attacks, hardware acceleration, EDA optimization Her recent publications analyze vulnerabilities in shared cloud FPGAs, side-channel leakage, and routing architectures. She has supervised numerous PhD and MSc students and received awards for teaching and research. She also organizes workshops and serves on program committees for conferences like FPGA, DATE, and FPL. Scientific Awards: 2023 Best paper award nomination (DDECS) 2020 OMEGA Student Award (for supervised project) 2016 Young scientist award (ICLP), Best paper (EMC Europe) 2015 Teaching Award (EPFL) 2011 Blažo Mirčevski Young author award Committees: Program member for DATE, FPGA, FPL, and associate editor for ACM TRETS and IEEE ESL She teaches courses such as Fundamentals of Digital Systems, Computer Architecture, and Information, Computation, Communication (ICC) at EPFL.

Dina G. Mahmoudمشاهده پروفایل

استادیار

• Heterogeneous Computing
• Hardware Security
• Fault Injection Attacks
• +۳ مورد دیگر

Dina G. Mahmoud is an Assistant Professor at the Department of Computer Science and Engineering at The American University in Cairo (AUC). She earned her Ph.D. in Computer and Communication Sciences from EPFL, Lausanne, Switzerland (2019-2024), where she was a CYD Fellow and collaborated with Dr. Mirjana Stojilović and Dr. Vincent Lenders. Her academic activities include teaching Digital Design, Computer Organization, and Applied Data Structures at AUC. Ph.D. (2019-2024): School of Computer and Communication Sciences, EPFL B.Sc. (2014-2019): Electronics and Communications Engineering with minor in Mathematics, AUC Her research focuses on heterogeneous computing systems , emphasizing security and reliability at the hardware and electrical levels . She investigates fault injection attacks in FPGA systems, particularly in multitenant cloud environments, and has demonstrated the first FPGA-to-CPU fault-injection exploit. Recent publications highlight trends in FPGA security , including power-wasting attacks, hardware Trojans, undervolting exploits, and fault tolerance mechanisms. Her work bridges hardware-software co-design , cloud security , and reconfigurable computing . CYD Fellow (first doctoral recipient) Google Generation Scholarship (2022, EMEA) IC Doctoral Fellowship at EPFL She has served as Head/Teaching Assistant at EPFL for courses like Computer Architecture and Information, Calcul, Communication, and as Head Undergraduate Teaching Assistant at AUC for Digital Logic Design. She contributes to the technical program committee of IEEE Industrial Electronics Society’s ETFA conference.

• Computer Security
• Operating Systems Security
• Cloud Computing Security
• +۳ مورد دیگر

Jidong Xiao serves as a Senior Lecturer in the Department of Computer Science at Rensselaer Polytechnic Institute (RPI), where he contributes to teaching and research in system security and virtualization technologies. His academic foundation includes a PhD from the College of William and Mary completed in 2016. Education: PhD in Computer Science, College of William and Mary (2016) Dr. Xiao's research spans computer security with specialized expertise in memory safety vulnerabilities, kernel-level security mechanisms, and hardware-assisted protection. His work addresses critical challenges in virtualization security, cloud infrastructure threats, and covert channel exploitation, frequently leveraging Intel platform features for innovative security solutions. Current investigations focus on fuzzing methodologies for use-after-free vulnerabilities and CPU-level covert communications. Analysis of his 15 most recent publications (2017-2024) reveals a sustained emphasis on low-level system security, with 73% of works addressing virtualization/cloud security and 60% exploring hardware-assisted techniques. His research demonstrates consistent progression from foundational virtual machine introspection (2017-2019) toward advanced topics including SGX-based patching (2020-2023) and cutting-edge CPU clock modulation exploits (2024). Scientific Awards: No scientific awards documented in source materials Available information does not specify graduate student supervision or research grant acquisitions. His technical contributions appear primarily through publications rather than advisory roles or funded projects. Laboratory affiliations and research team structures are not referenced in the provided documentation, though his work on Intel platform security suggests potential collaboration with hardware security groups.

• Computer Architecture
• Computer Security
• Quantum Computing
• +۵ مورد دیگر

Assoc Prof Anupam Chattopadhyay is an Associate Professor in the College of Computing & Data Science at Nanyang Technological University (NTU), Singapore. He also holds a courtesy appointment in the School of Physical & Mathematical Sciences. His research focuses on computer architecture, security, design automation, and quantum computing. Anupam received his PhD from RWTH Aachen University in 2008, followed by roles at CoWare R&D and RWTH Aachen as a Junior Professor before joining NTU in 2014. Education: B.E., Jadavpur University, India MSc, ALaRI, Switzerland PhD, RWTH Aachen University, Germany Research Interests: Anupam’s work spans quantum computing, hardware security, AI security, post-quantum cryptography, and emerging technologies. His contributions include novel high-level synthesis techniques for cryptography, reliability estimation flows for embedded processors, and exploration of coarse-grained reconfigurable architectures. His research has been featured in major outlets like The Economist and Asian Scientist. Awards: Borcher's plaque (2008) for outstanding doctoral dissertation Nomination for Best IP Award (ACM/IEEE DATE 2016) Nomination for Best Paper Award (International Conference on VLSI Design 2018) Advising & Grants: Anupam leads a team of over 20 researchers, overseeing projects funded by various grants. He has advised numerous doctoral students and collaborates with institutions like Temasek Labs and the Indian Statistical Institute. Labs & Teams: His research group focuses on advanced topics in secure computing, quantum-resistant systems, and hardware-software co-design, leveraging cutting-edge tools and platforms for next-generation technologies.

Guillaume Ducمشاهده پروفایل

دانشیار

• Embedded Systems Security
• Hardware/Software Interaction
• Side-Channel Attacks
• +۳ مورد دیگر

Guillaume Duc is an Associate Professor (Maître de Conférences) at Télécom Paris , affiliated with the Information Processing and Communication Laboratory (LTCI) and the Department of Computer Science and Networks . His research focuses on embedded systems security, particularly hardware/software interaction, side-channel attacks, and resilient architectures. Education: PhD in Hardware, Software and Cryptographic Support for Secure Process Execution , École Nationale Supérieure des Télécommunications de Bretagne (2007) Master's (DEA) in CryptoPage – an architecture to run secure processes , Université de Rennes 1 (2004) Research Interests: His work spans embedded systems security , with a focus on: Hardware/Software Interaction: Exploring vulnerabilities and defenses at the intersection of hardware and software. Side-Channel Attacks: Investigating power analysis, electromagnetic attacks, and countermeasures, including organizing the DPA Contest . Resilient Architectures: Designing secure memory architectures, FPGA-based protections, and cloud-embedded system trustworthiness. Publications & Patents: He has published extensively in top-tier venues such as Journal of Cryptographic Engineering , ACSAC , and CARDIS , with recent works addressing AI-driven automotive security (2024) and system cost-optimization for security (2019). He holds multiple patents in non-intrusive fault detection and secure electronic component monitoring. Teaching & Leadership: Academic lead for the engineering program at Télécom Paris. Responsible for courses like INF107: From Logic Gates to Operating Systems and SE203: Microprocessor System Tools . Co-instructor for Rust programming modules in executive education. Labs & Teams: He leads research within the Autonomous Critical Embedded Systems (ACES) team at LTCI, collaborating on secure embedded systems for automotive and cloud applications.

• Hardware Security
• Machine Learning for Security
• VLSI Design
• +۷ مورد دیگر

Sai Manoj Pudukotai Dinakarrao is a Professor in the Department of Computer Engineering at Rochester Institute of Technology's College of Engineering. He is an active researcher with numerous publications spanning hardware security, machine learning applications, VLSI design, and IoT security. His work focuses on developing innovative solutions for security challenges in hardware and embedded systems. Dr. Dinakarrao's research interests center around hardware security, machine learning for security applications, VLSI design methodologies, and IoT security frameworks. His work has pioneered approaches to hardware Trojan detection, processing-in-memory architectures, and energy-efficient security mechanisms for resource-constrained devices. He has made significant contributions to the understanding of hardware vulnerabilities and the development of robust countermeasures. His recent publications demonstrate a clear trend toward integrating machine learning techniques with hardware security solutions, particularly focusing on processing-in-memory architectures for efficient security implementations. His work spans both theoretical foundations and practical implementations, with applications in IoT security, malware detection, and hardware verification. The research shows increasing sophistication in addressing security challenges through novel hardware-software co-design approaches. Dr. Dinakarrao has mentored numerous graduate students who have co-authored publications with him, indicating an active research group focused on cutting-edge security and hardware design topics. His collaborations span multiple institutions and research groups, demonstrating his integration within the broader academic community.