Mirjana Stojilovic

Mirjana Stojilovic is a researcher at EPFL's School of Computer and Communication Sciences and the Parallel Systems Architecture Laboratory (PARSA). She obtained her PhD in 2013 from the School of Electrical Engineering in Belgrade and has worked on projects like STRUCTURES (EU FP7) and ADHeS (armasuisse). Her research spans field-programmable technology, electronic design automation, and hardware security, with a focus on side-channel attacks and countermeasures in reconfigurable systems.

• Education: PhD in Electrical Engineering (2013), School of Electrical Engineering, Belgrade
• Research Areas: FPGA security, power analysis attacks, hardware acceleration, EDA optimization

Her recent publications analyze vulnerabilities in shared cloud FPGAs, side-channel leakage, and routing architectures. She has supervised numerous PhD and MSc students and received awards for teaching and research. She also organizes workshops and serves on program committees for conferences like FPGA, DATE, and FPL.

• Scientific Awards:
  • 2023 Best paper award nomination (DDECS)
  • 2020 OMEGA Student Award (for supervised project)
  • 2016 Young scientist award (ICLP), Best paper (EMC Europe)
  • 2015 Teaching Award (EPFL)
  • 2011 Blažo Mirčevski Young author award
• Committees: Program member for DATE, FPGA, FPL, and associate editor for ACM TRETS and IEEE ESL

She teaches courses such as Fundamentals of Digital Systems, Computer Architecture, and Information, Computation, Communication (ICC) at EPFL.