جست‌وجوی استاد و پژوهشگر

Heiner Litzمشاهده پروفایل

دانشیار

• Computer Architecture
• Computer Systems
• Hardware-Software Interface
• +۳ مورد دیگر

Heiner Litz is an Associate Professor in the Computer Science & Engineering Department at UC Santa Cruz's Baskin School of Engineering. He holds the Kumar Malavalli Endowed Chair of Storage Systems Research and serves as Director of the Center for Research in Storage Systems (CRSS). He is also a member of UCSC's Hardware Systems Collective (HSC). Litz earned his PhD from Mannheim University and previously held positions at MIT, Google, and Stanford University. His research focuses on computer architecture and systems optimization , specifically improving hardware-software interfaces for data center workloads. Key areas include microarchitectural mechanisms (branch prediction, prefetching, cache design), profile-guided optimizations, and storage/disaggregated memory systems. His work bridges compiler techniques and hardware efficiency for emerging cloud applications. Recent publications emphasize profile-guided optimization across microarchitecture layers, storage scalability, and resource allocation in distributed systems. Trends include hardware-software co-design for data centers, RDMA-based protocols, and real-time control systems. Awards & Honors: Kumar Malavalli Endowed Chair of Storage Systems Research Best Paper Award at MICRO (2022) IEEE Micro Top Picks (2019, 2023) Best Paper Awards at ICPP (2008) and ARC (2009) Advising & Grants: He currently advises 11 PhD students and has graduated 8 MS/PhD students. Research is supported by NSF, Intel, Samsung, Google, Meta, Nutanix, HPE, ARM, Marvell, Cerabyte, Western Digital, and Broadcom. Labs & Teams: Directs CRSS, focusing on storage systems innovation, and collaborates with HSC on hardware-software integration projects.

Caroline Trippelمشاهده پروفایل

استادیار

• Computer Architecture
• Hardware Security
• Formal Methods
• +۵ مورد دیگر

Caroline Trippel is an Assistant Professor in the Departments of Computer Science and Electrical Engineering at Stanford University. Her research focuses on ensuring correctness and security in computer systems through formal methods, with particular emphasis on hardware verification, memory consistency models, and mitigating vulnerabilities like Spectre/Meltdown. She previously worked at Facebook’s FAIR SysML group before joining Stanford. Education: PhD in Computer Science, Princeton University BS in Computer Engineering, Purdue University Her work has influenced the RISC-V ISA memory consistency model and produced tools like CheckMate, which automatically synthesizes hardware exploits for security verification. She explores privacy-preserving ML, ML-driven hardware optimizations (e.g., neural recommendation), and datacenter reliability. Her research has earned awards including the 2020 ACM SIGARCH Dissertation Award and NVIDIA Fellowship. Key contributions include: Formal analysis of RISC-V memory models Exploitation synthesis frameworks (CheckMate) Hardware-software contracts for security Defenses against microarchitectural side-channel attacks Current projects include: VeriCoder: LLM-enhanced RTL code verification Multi-μPATH synthesis for security validation Near-data processing (RecSSD) for recommendation systems

Sandhya Dwarkadasمشاهده پروفایل

استاد

• Parallel and distributed computing
• Computer architecture
• Compiler/Runtime-Architecture Interaction
• +۵ مورد دیگر

Sandhya Dwarkadas is the Walter N. Munster Professor and Chair of the Department of Computer Science at the University of Virginia. Her research focuses on the intersection of computer hardware and software, particularly in parallel computing, computer architecture, and compiler/runtime-architecture interaction. She holds dual roles as department chair and active researcher, balancing leadership with contributions to energy-efficient and reconfigurable computing systems. Education: B.Tech. in Electrical Engineering, Indian Institute of Technology (1986) M.S. and Ph.D. in Electrical and Computer Engineering, Rice University (1989, 1993) Research interests emphasize parallel and distributed computing architectures, with a focus on energy efficiency, cache coherence, and security in multicore systems. Recent work explores mitigating side-channel attacks via innovations like TimeCache and RollingCache. Her publications span 30+ years, addressing both foundational and applied challenges in computer systems. Awards highlight her impact: ACM and IEEE Fellowships (2018/2017), University of Rochester’s Hajim Award (2020), and AAAS Fellowship (2024). She actively mentors students through courses like CS 6190 and leads interdisciplinary projects like TriForce. Labs/Teams: Her work is anchored in the University of Virginia’s Computer Science Department, collaborating across academia and industry to advance next-generation computing systems.

• Cryptography
• Post-quantum cryptography
• Cryptographic engineering
• +۴ مورد دیگر

Peter Schwabe is a scientific director at the Max Planck Institute for Security and Privacy and holds academic positions as a part-time professor for cryptographic engineering in the Digital Security Group at Radboud University, Faculty of Science, and as an adjunct professor in the Faculty of Computer Science at Ruhr University Bochum. His career spans multiple prestigious institutions including Academia Sinica and National Taiwan University. Dr. Schwabe's research focuses on cryptography, particularly post-quantum cryptography, cryptographic engineering, and implementation security. His work addresses critical challenges in secure cryptographic implementations, side-channel resistance, and the transition to quantum-resistant algorithms. He has made significant contributions to NIST's post-quantum cryptography standardization project, particularly with CRYSTALS-Kyber which was selected for standardization in July 2022. His publication record shows a strong emphasis on practical implementations of cryptographic algorithms, formal verification of security properties, and addressing real-world security challenges. Recent work centers on verifying Kyber implementations, protecting against Spectre variants, and developing high-assurance cryptographic software. Dr. Schwabe has received significant recognition in the field, serving as an elected member of the IACR Board of Directors and participating in various steering committees including the IACR CHES and RWC Steering Committees. He also serves on advisory boards for several security-focused companies. As an advisor, he has supervised numerous PhD students working on cutting-edge cryptographic research, with recent graduates focusing on post-quantum cryptography, side-channel resistance, and formal verification of cryptographic implementations. His research group actively contributes to both theoretical advances and practical implementations in cryptography.

Hamed Nematiمشاهده پروفایل

استادیار

• Security of systems software
• Formal methods and program logics
• Interactive theorem proving
• +۲ مورد دیگر

Hamed Nemati is an Assistant Professor at the Division of Network and Systems Engineering under the School of Electrical Engineering and Computer Science at KTH Royal Institute of Technology in Stockholm, Sweden. He was previously a Visiting Assistant Professor at Stanford University and a Research Group Leader at the Helmholtz Center for Information Security (CISPA) , where he also worked as a PostDoc and Research Fellow. Education : PhD in Computer Science from KTH Royal Institute of Technology Research Interests : Security of systems software, formal methods and program logics, interactive theorem proving, machine code analysis, applied machine learning Current Projects : Systematic verification of multi-language security protocols, hardware-software co-design for Spectre mitigation, capability-based access control models Scientific Awards : WASP (Wallenberg AI, Autonomous Systems and Software Program) faculty member Teaching Activities : Formal Methods in Security (Fall 2020-2023) at CISPA/Saarland University Digital Forensics and Incident Response (EP2780) (Fall 2024) at KTH

Per Stenströmمشاهده پروفایل

استاد

• Computer Architecture
• Memory Systems Optimization
• Energy-Efficient Computing
• +۳ مورد دیگر

Professor Per Stenström is affiliated with the Department of Computer Science and Engineering at Chalmers University of Technology . His research focuses on computer architecture , memory systems optimization , and energy-efficient computing , with significant contributions to DNN accelerator design and cache management . Research Trends : His recent publications emphasize Memory compression techniques for energy efficiency Hardware-software co-design for DNN acceleration Security in microarchitectural optimizations Hybrid memory systems for near-memory computing These works span both theoretical and applied aspects of computer architecture, with a particular focus on data redundancy elimination , parallel processing , and quality-of-service constraints . His work has influenced the development of energy-aware resource management frameworks and resilient EU HPC systems , as evidenced by his long-standing contributions to the field since the early 2010s.

Michael D. Smithمشاهده پروفایل

استاد

• Computer Science
• Education Technology
• Data Security
• +۳ مورد دیگر

Michael D. Smith is the John H. Finley, Jr. Professor of Engineering and Applied Sciences and Distinguished Service Professor at Harvard University. He previously served as Dean of the Faculty of Arts and Sciences (FAS) for 11 years, leading Harvard's largest school with a focus on undergraduate education, faculty development, and interdisciplinary research. He holds a Ph.D. from Stanford University (1993), a Master’s from Worcester Polytechnic Institute, and a Bachelor’s from Princeton University. His academic career is complemented by industry experience, including co-founding Liquid Machines (acquired by Check Point in 2010), and advisory roles with venture capital firms like 1984 Ventures and GSV Ventures. Research interests span computer science education innovation, technology’s societal impact, and hardware/software systems. He pioneered work on voltage noise mitigation in processors, cybersecurity solutions, and online education platforms like edX. Awards include the NSF Young Investigator Award (1993), Alpha Iota Teaching Prize, and W.E.B. Du Bois Medal. Currently, he advises startups and educational initiatives such as CS Forward and Kira Learning, while developing new in-person and online courses. His leadership roles include Board member at The Peddie School and former edX Board member (2012–2018).

• High Performance Computing
• Performance Engineering
• Performance Modeling
• +۷ مورد دیگر

Gerhard Wellein is a Professor for High Performance Computing at the Department of Computer Science of Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU). He is the head of NHR@FAU (Erlangen National Center for High Performance Computing) and a member of the board of directors of the German NHR-Alliance. Since 2024, he has also served as a Visiting Professor for HPC at the Delft Institute of Applied Mathematics, Delft University of Technology. He holds a PhD in theoretical physics from the University of Bayreuth and has over two decades of experience in HPC education and research. Research Interests: His research focuses on performance modeling and engineering, architecture-specific code optimization, novel parallelization techniques, and the development of hardware-efficient building blocks for sparse linear algebra and stencil solvers. His work bridges computer science, applied mathematics, and computational physics, aiming to maximize efficiency on current and future HPC architectures, including exascale systems. Publication Trends: His recent publications emphasize analytical performance modeling (e.g., Roofline, oscillator models), energy efficiency, GPU optimization, and scalable linear algebra. They reflect a strong focus on both theoretical modeling and practical implementation, with applications in CFD, quantum physics, and molecular dynamics. Scientific Awards: 2011 Informatics Europe Curriculum Best Practices Award (shared with Jan Treibig and Georg Hager) for outstanding teaching contributions in HPC. Grants and Advising: He has led numerous third-party funded projects from the EU, BMBF, and DFG, including EoCoE-III, ESSEX, EXASTEEL, and ProPE. These projects focus on exascale software, performance engineering, fault tolerance, and multiscale simulation. He has mentored multiple researchers and students, contributing to the development of tools such as LIKWID, ClusterCockpit, and GEOPM. Labs and Teams: He leads the HPC research group at FAU and is deeply involved in national and international HPC initiatives. His team collaborates extensively on open-source HPC software and performance tools, fostering a strong community-driven approach to performance engineering.

David Black-Schafferمشاهده پروفایل

استاد

• Computer Architecture
• Memory Systems
• Parallel Programming
• +۴ مورد دیگر

David Black-Schaffer is a Professor at Uppsala University's Department of Information Technology, specializing in computer systems research. As of 2023, he serves as Dean of Research for the Faculty of Science and Technology. His work bridges software and hardware innovations to enhance data movement efficiency in computer systems, with applications commercialized through a startup and integrated into industry standards like OpenCL. Black-Schaffer earned his PhD in Electrical Engineering from Stanford University in 2008, focusing on many-core processor programming. His career spans roles at Apple Inc. (contributing to OpenCL standards), postdoctoral research at Uppsala University, and academic progression from assistant to full professor (2010–2017). He has held leadership roles including Head of the Division of Computer Systems (2022) and department representative on the faculty Advisory Committee for Research (2021). His research spans computer architecture, memory systems, parallel programming, and simulation techniques. Recent publications (2024–2020) explore garbage collection, cache optimization, memory contention, NUMA systems, and instruction scheduling. Key trends include software-hardware co-design for power efficiency, reuse-aware data placement, and machine learning for performance modeling. Knut & Alice Wallenberg Foundation: Wallenberg Academy Fellowship Prolongation (2020–2025), Wallenberg Academy Fellow (2016–2021) Swedish Research Council (VR): Project Grant (2019–2024), Young Researcher Grant (2015–2018), Framework Grant (2012–2017) European Research Council: ERC Starting Grant (2017–2022) Teaching Awards: Uppsala Engineering and Science Student Union Pedagogical Prize (2012), Uppsala University Pedagogical Prize (2016), Uppsala Technical Physics Students' Teaching Award (2019) Other Grants: ScalableLearning flipped classroom project (2012–2020), Arm Ltd. collaborations on memory system designs He pioneered flipped-classroom teaching through the ScalableLearning project, impacting over 80,000 students. His research is conducted in collaboration with institutions like Arm Ltd., with past contributions to Apple's OpenCL implementation and UPMARC research center.

Rob Sisonمشاهده پروفایل

پژوهشگر ارشد

• Formal Methods
• Computer Security
• Formal Verification
• +۴ مورد دیگر

Rob Sison is a Senior Research Associate at the Trustworthy Systems research group of UNSW Sydney's School of Computer Science and Engineering (CSE) and an Honorary Fellow at the University of Melbourne's School of Computing and Information Systems (CIS). They hold a PhD in Computer Science and Engineering (2020) and a Master of Information Technology (2016) from UNSW Sydney, following a five-year career as an OS-level software developer at Open Kernel Labs (later General Dynamics C4 Systems). Research Interests: Formal methods for proving absence of information flow in high-assurance systems, focusing on concurrency, secure compilation, and microarchitectural timing channels. They are broadly interested in interactive theorem proving and scaling formal verification to complex software systems. Scientific Awards: Distinguished Artifact Reviewer, OOPSLA External Review / Artifact Evaluation Committee (SPLASH 2023) Distinguished Artifact Reviewer, OOPSLA Artifact Evaluation Committee (SPLASH 2021) 2021 Australian Museum Eureka Prize for Outstanding Science in Safeguarding Australia (co-recipient) CSIRO Data61 Research Project Award (PhD top-up scholarship, 2016-2020) Supervision: Active co-supervision of PhD students at UNSW Sydney and University of Melbourne, including Pengbo Yan (University of Melbourne) and Kevin Tran (UNSW Sydney), with a focus on formal methods for information flow and concurrency. Grant involvement includes ARC DP190103743 (2020-2023). Labs & Collaborations: Works closely with the Trustworthy Systems group at UNSW Sydney and the CS Security Research group at the University of Melbourne, contributing to projects on seL4/l4v's EquivValid library and COVERN-RG logic.

John Paul Shenمشاهده پروفایل

استاد

• Modern Processor Design
• Instruction-Level Parallelism
• Dependable Computing
• +۳ مورد دیگر

John Paul Shen is a Distinguished Service Professor of Electrical and Computer Engineering at Carnegie Mellon University (CMU), based at the Silicon Valley campus. With over three decades of experience in academia and industry, he has held prominent roles including founding director of Nokia Research Center-North America Lab (2007–2012) and director of Intel’s Microarchitecture Research Lab (2000–2006). His academic career includes a tenured professorship at CMU’s ECE Department from 1990–2000 and a return to CMU in 2015 as a tenured professor. Education: Ph.D. in Electrical Engineering, University of Southern California M.S. in Electrical Engineering, University of Southern California B.S. in Electrical Engineering, University of Michigan Research Focus: Modern Processor Design: Specializes in superscalar processors, instruction-level parallelism (ILP), and microarchitecture validation tools like VMW (Visualization-Based Microarchitecture Workbench). Neuromorphic Computing: Develops energy-efficient temporal neural networks (TNNs) and CMOS implementations for sensory processing. Edge AI: Focuses on low-precision accelerators, sparsity exploitation, and real-time data analytics for edge devices. Dependable Computing: Leverages idle processor resources for error-checking and fault tolerance. Awards & Impact: Recipient of multiple teaching awards during his CMU tenure. Supervised 17 Ph.D. students and dozens of M.S. students, with notable contributions to compiler design and parallel computing. Authored two influential textbooks, including Modern Processor Design: Fundamentals of Superscalar Processors , used at Stanford. Generated over 100 patents and 200+ papers at Nokia and Intel, with a focus on mobile computing and hardware architecture innovations. Labs & Collaborations: Founded and led the Nokia Research Center-NAL, advancing mobile Internet and computing. Directed Intel’s Microarchitecture Research Lab, advancing IA32/IA64 processor designs. Current research at CMU Silicon Valley focuses on neuromorphic systems, wearable computing, and real-time data analytics.

• Cryptography
• Post-Quantum Cryptography
• Cryptographic Engineering
• +۴ مورد دیگر

Peter Schwabe is a scientific director at the Max Planck Institute for Security and Privacy (MPI-SP) and a part-time professor in the Digital Security Group at Radboud University, Nijmegen, The Netherlands. His primary research focuses on cryptographic engineering, particularly post-quantum cryptography, secure cryptographic implementations, and high-assurance systems. He holds a PhD from Eindhoven University of Technology (2011) and a Diplom in Computer Science from RWTH Aachen University (2006). His work includes leading projects like the ERC-funded EPOQUE project, which engineered post-quantum cryptographic standards. He contributed to NIST’s post-quantum cryptography standardization efforts, notably as a core developer of CRYSTALS-Kyber and CRYSTALS-Dilithium. His research spans lattice-based cryptography, code-based cryptography, and formal verification of cryptographic software. Publications highlight advancements in secure implementations against side-channel and speculative execution attacks, high-assurance cryptographic libraries (e.g., EasyCrypt), and practical post-quantum TLS protocols. Key contributions include optimizing cryptographic algorithms for embedded systems (ARM Cortex-M) and formal verification of KEMs like ML-KEM. Scientific awards include an ERC Starting Grant (2018). He advises numerous PhD students and collaborates with industry and academia on cryptographic standards and security. His labs focus on cryptographic engineering, with teams advancing both theoretical and applied aspects of post-quantum security.

• Microarchitectural Side-Channel Attacks
• System Security
• CPU Security
• +۶ مورد دیگر

Dr. Michael Schwarz is a tenured faculty member at the CISPA Helmholtz Center for Information Security in Saarbrücken, Germany, where he leads the RootSec research group. Since 2020 he has been investigating microarchitectural side-channel attacks, system security, CPU security, transient-execution vulnerabilities, and corresponding defense mechanisms. He previously served as a post-doctoral researcher (2019–2020) and PhD student (2016–2019) at Graz University of Technology, after earning two master’s degrees in computer science and software engineering with a security focus. Education PhD, Graz University of Technology, 2019 — “Software-based Side-Channel Attacks and Defenses in Restricted Environments” (Advisor: Daniel Gruss) MSc, Computer Science, Graz University of Technology MSc, Software Engineering, Graz University of Technology Research Interests Dr. Schwarz’s work centers on microarchitectural side-channel attacks and system security , spanning: CPU security and transient-execution vulnerabilities (Meltdown, Spectre, Fallout, LVI, ZombieLoad, ÆPIC Leak, CacheWarp) Detection, mitigation, and formal guarantees against microarchitectural leakage Hardware–software co-design for secure operating systems and trusted execution environments Reverse engineering of CPU internals, cache architectures, and prefetchers Browser and web-platform security, including sandbox bypasses and fingerprinting Compiler security and constant-time programming enforcement Scientific Awards & Recognition 2022 Busy Beaver Award for “Foundations of Cybersecurity II” 2021 Busy Beaver Award for “Side-Channel Attacks and Defenses” 2020 EuroSys Roger Needham PhD Award 2019 IEEE S&P Distinguished Paper Award (Spectre) 2019 NSA Best Scientific Cybersecurity Paper Competition Honorable Mention (Meltdown) 2019 Open Exploit Award (Meltdown & Spectre) 2018 CSAW Best Paper Award (Meltdown) 2018 Pwnie Awards: Best Privilege Escalation Bug & Most Innovative Research 2023 USENIX Security Noteworthy Reviewer Award 2023 WOOT Best Paper Award (CustomProcessingUnit) 2022 Pwnie Award for Best Desktop Bug (ÆPIC) 2022 AI 2000 Security & Privacy Honorable Mention 2021 CCSW Best Paper Award & CSAW Best Paper 3rd Place Advising & Collaborations Dr. Schwarz currently mentors numerous PhD students and post-docs within the RootSec group. His collaborations extend across CISPA, Graz University of Technology, and an international network visible through extensive multi-author publications at top-tier venues including USENIX Security, IEEE S&P, ACM CCS, NDSS, ESORICS, DIMVA, ASPLOS, WWW, FC, and specialized microarchitecture security conferences. Labs & Teams He heads the RootSec Research Group at CISPA, whose core mission is to uncover, analyze, and mitigate microarchitectural and system-level security threats. The group maintains close links with industry partners, open-source communities, and policy makers to ensure that research findings are rapidly translated into practical defenses deployed in modern operating systems and processors.

• Microarchitectural Attacks
• Side-Channel Attacks
• System Security
• +۳ مورد دیگر

Dr. Michael Schwarz is a tenured professor at CISPA Helmholtz Center for Information Security in Saarbrücken, Germany. His research focuses on microarchitectural side-channel attacks and system security , with notable contributions to vulnerabilities like Meltdown , Spectre , and ZombieLoad . He leads the RootSec Research Group and is a regular speaker at top-tier conferences including Black Hat and IEEE S&P. PhD in Computer Science from Graz University of Technology (2019) Two master’s degrees in Computer Science and Software Engineering His work spans CPU security , transient execution attacks , and side-channel defenses , with 15 recent publications on topics like cache timing analysis, browser sandbox breaches, and compiler-induced vulnerabilities. Awards include multiple Busy Beaver Awards , Pwnie Awards , and recognition for foundational papers like Meltdown . Collaborated with Daniel Gruss (PhD advisor) Advises on hardware-software security interactions Publications reveal a trend toward microarchitectural attack surfaces and practical exploitation frameworks , often leveraging hardware features (e.g., CPU caches, prefetchers) for security analysis. He has also contributed to secure memory allocation and browser-based fingerprinting research.

• Computer Architecture
• Compilers
• GPUs
• +۴ مورد دیگر

Antonio González Colás is a Full Professor at the Universitat Politècnica de Catalunya (UPC), affiliated with the Facultat d'Informàtica de Barcelona (FIB) and the Department of Computer Architecture. He leads the ARCO research group (Microarchitecture and Compilers) and focuses on advanced computer architecture, including GPUs, compilers, and embedded systems. In 2024, he received the ICREA Acadèmia distinction for his research on future computer systems integrating cognitive tasks and autonomous decision-making. His work emphasizes energy-efficient architectures, memory optimization, and hardware acceleration for AI and real-time applications. He holds a Doctorate in Computer Science and has over 1000+ publications, including top-tier journals and conferences. His research spans topics like GPU microarchitecture, compiler-assisted caching, DNN acceleration, and autonomous driving hardware. Major awards include the HiPEAC 2024 Paper Award and EU-funded projects under Horizon 2020. He advises numerous PhD students on topics such as point cloud processing for autonomous systems, GPU rendering optimizations, and neural network efficiency. His contributions bridge theoretical computer architecture with practical hardware-software co-design, addressing challenges in modern computing systems.