Per Stenström

Professor Per Stenström is affiliated with the Department of Computer Science and Engineering at Chalmers University of Technology. His research focuses on computer architecture, memory systems optimization, and energy-efficient computing, with significant contributions to DNN accelerator design and cache management.

Research Trends: His recent publications emphasize

• Memory compression techniques for energy efficiency
• Hardware-software co-design for DNN acceleration
• Security in microarchitectural optimizations
• Hybrid memory systems for near-memory computing

These works span both theoretical and applied aspects of computer architecture, with a particular focus on data redundancy elimination, parallel processing, and quality-of-service constraints.

His work has influenced the development of energy-aware resource management frameworks and resilient EU HPC systems, as evidenced by his long-standing contributions to the field since the early 2010s.