Vasilios Tenentes

Vasilios Tenentes is an Associate Professor at the Department of Computer Engineering and Informatics, University of Ioannina, Greece. He is affiliated with the VLSI Systems and Computer Architecture Laboratory (VCAS), where he conducts research in reliable and controllable digital systems. His academic journey includes postdoctoral research at the University of Southampton, UK (2014–2018), and a research engineer role at ARM Ltd, Cambridge (2017–2018).

His educational background includes a B.Sc. in Computer Science from the University of Piraeus (2003), and M.Sc. and Ph.D. degrees in Computer Science and Engineering from the University of Ioannina (2007, 2013). His doctoral research was funded by the 'Heraclitus 2' program and focused on embedded control architectures for testability in digital systems.

His research interests include embedded systems, hardware/software co-design, design for testability, fault modeling, and reliability in digital systems. He has contributed to projects such as PRiME (Power-efficient, Reliable, Many-core Embedded systems) and the Artemis Program on secure supply chain traceability. His work emphasizes reliability assessment for IoT applications and wear-out effects modeling in integrated circuits.

The available publication data is limited, but his work spans international journals and conferences on digital system reliability and testability. Though specific article titles and years are not fully listed, his research consistently targets energy-efficient and dependable embedded architectures.

• Member, IEEE (since 2007)
• Member, HiPEAC (since 2023)

He advises students through the university's student advisor program and is involved in supervising doctoral candidates within the VCAS lab. While no specific grants are named, his participation in EU-level research programs indicates active grant involvement. His work bridges industry collaboration (e.g., ARM, Intel, Microsoft Research via PRiME) and academic innovation.

He is a core member of the VLSI Systems and Computer Architecture Laboratory (VCAS), collaborating with faculty including Prof. George Tsiatouchas and Prof. Chrysovalantis Kavousianos, and contributing to a strong research environment in digital system design and reliability.