Chr. Kavousianos

Chr. Kavousianos is an Assistant Professor in the Department of Informatics at the University of Ioannina, Greece. He is actively engaged in research and teaching in the fields of VLSI design, testability, and low-power testing. He has been involved in major national and international research programs such as Heracleitus II, Pythagoras, and NSF-SRC (USA).

Research Interests: His research focuses on advanced techniques in built-in self-test (BIST), test data compression, scan-based testing, fault tolerance, and embedded control architectures. He explores methods to reduce test data volume, power consumption during testing, and improve defect coverage in integrated circuits.

Publication Trends: His recent publications (2004–2011) show a strong trend toward defect-aware testing, power-efficient test compression, and multicore SoC testing. He frequently collaborates with leading researchers, including Prof. Krishnendu Chakrabarty (Duke University). His work on multilevel Huffman coding and reseeding techniques has been highly influential, with one paper among the most accessed in 2004.

• Special Distinction for Excellent Academic Performance from TEE, 1996
• Doctoral Scholarship 'In Memory of Professor Maritsa', 1999
• Postdoctoral Scholarship from IKY, 2002

Advising and Grants: He has supervised multiple postdoctoral researchers, PhD candidates (e.g., Vasilis Tenentes, Emmanouil Kalligeros), and master’s students. He has led research projects such as 'Embedded Control Architectures' (Heracleitus II) and 'Design Techniques for Embedded Self-Control Circuits' (Pythagoras II). His international collaboration with Duke University included a postdoctoral research role in 2009.

Labs and Teams: He leads a research group at the University of Ioannina with postdocs, PhD students, and visiting professors, including Prof. Krishnendu Chakrabarty. His team works on cutting-edge VLSI testing and design methodologies.