Xrysovalantis Kavousianos

Xrysovalantis Kavousianos is a Professor at the Department of Computer Science & Engineering, University of Ioannina, Greece, affiliated with the School of Engineering. He holds a BSc (1996) and PhD (2000) in Computer Engineering from the University of Patras. His research focuses on digital circuit design, integrated circuit testing techniques, and fault-tolerant systems, with expertise in 3D-SoC testing, test access mechanisms, and low-power testing methodologies.

Teaching responsibilities include courses such as Digital Design I (MYY305), Digital Design II (MYY406), and H3 - 3D Systems on Chip. His work emphasizes optimizing testing infrastructure for multi-Vdd, DVFS-based, and multi-core systems, addressing challenges in thermal-aware testing, defect coverage, and energy efficiency. Recent research highlights include time-division multiplexing for 3D-SoCs, X-filling techniques for unmodeled defects, and BIST frameworks for power switches.

Publications (2013–2019) concentrate on testing optimization, statistical compression, and hardware reliability in complex systems. Collaborations involve advanced SoC architectures and reconfigurable power management solutions.