Aristides Efthymiou

Aristides Efthymiou is an Assistant Professor at the Department of Computer Engineering and Informatics, University of Ioannina. He holds a PhD from the University of Manchester (2002) and has held academic positions at the University of Edinburgh (2004–2011) and research roles at the Institute of Microelectronics, National Center for Scientific Research 'Demokritos,' and Integrated Systems Development SA. His research focuses on microarchitecture, digital systems design, and VLSI circuits.

Education:

• Bachelor's and postgraduate diploma in Computer Science, University of Crete (1993–1995)
• PhD in Computer Science, University of Manchester (2002)

Research interests include approximate computing, visible light communications (VLC), and energy-efficient circuit design. He is a member of the VLSI Systems and Computer Architecture Laboratory (VCAS), contributing to projects like the Artemis Program on supply chain traceability. His work spans over 25 international publications, emphasizing hardware optimization and signal processing in VLC systems.

Awards: None explicitly mentioned.

Lab and Team: Leads the VCAS lab, collaborating with faculty members like Professors George Tsiatouchas and Chrysovalantis Kavousianos. Supervises doctoral candidates in areas like approximate multipliers and VLC systems.