Jose Nunez-Yanez

Jose Nunez-Yanez is a Professor in hardware architectures for Machine Learning at Linköping University, affiliated with the Department of Electrical Engineering and the Division of Electronics and Computer Engineering (ELDA). He has over 20 years of experience in high-performance embedded hardware design and is associated with the Wallenberg Autonomous Systems Program (WASP).

His research focuses on energy-efficient, adaptive, and parallel hardware systems for machine learning and signal processing. Key areas include FPGA-based acceleration, run-time reconfiguration, and edge AI. He has led significant research projects with industry and academic partners such as ARM, ST Microelectronics, ESA, and Intel.

The recent publications highlight a strong trend toward hardware-aware optimization of Graph Neural Networks for edge deployment, emphasizing quantization, dynamic range analysis, and heterogeneous computing. This reflects a broader shift toward efficient deep learning on resource-constrained platforms.

• Best Paper Award, Adaptive Hardware Systems (AHS) Conference, ESA/NASA, 2014
• Best Paper Award, Adaptive Reconfigurable Computing (ARC) Conference, 2016

He has supervised 20 PhD students and served as the program director of the Advanced Microelectronics Systems Engineering (AMSE) program at the University of Bristol, significantly expanding its reach. He has secured substantial funding as Principal Investigator and Co-Investigator with partners including Sensata Systems, DSTL, Qioptiq, and Xilinx. His industry fellowships include Royal Society and Marie Curie awards.

He is a member of the Royal Society Grants Board, the EPSRC College, and the Marie Curie Alumni Association. His work bridges academia and industry, with active consultancy in FPGA optimization and lossless data compression.