معرفی
Irith Pomeranz is the Cadence Professor of Electrical and Computer Engineering at Purdue University's College of Engineering. Her research focuses on advanced testing methodologies for VLSI circuits, including functional test compaction, fault diagnosis, and built-in self-test (BIST) techniques. She is affiliated with the Department of Electrical and Computer Engineering and has contributed extensively to improving test efficiency and fault coverage in digital circuits.
Her work addresses challenges such as aging effects, transition faults, and path delay faults, with a particular emphasis on practical implementations for industrial applications. Key areas of interest include modular test sequences, configuration-based compaction, and dynamic testing strategies for in-field environments. She has developed algorithms for dual-target diagnostic testing and synchronization mechanisms for online fault detection in logic blocks.
Research Trends in her publications emphasize innovations like storage-based BIST schemes, adaptive test scheduling, and shared test data architectures. These advancements aim to reduce test data volume, improve fault coverage, and enhance reliability in modern integrated circuits. Her work often bridges theoretical foundations and practical hardware implementations.
Grants & Advising: While specific grants or student advisees are not listed, her prolific publication record indicates active involvement in research projects and graduate supervision within Purdue's ECE department.
Labs & Teams: Her contributions are likely tied to Purdue's VLSI and testing research groups, though specific lab affiliations are not detailed in the provided text.
