Naresh R Shanbhag

Prof. Naresh R. Shanbhag holds the Jack S. Kilby Professorship in Electrical and Computer Engineering at the University of Illinois Urbana-Champaign. He is affiliated with the Coordinated Science Lab and the Information Trust Institute, both part of the College of Engineering. His research focuses on energy-efficient computing architectures, in-memory computing, nanoelectronics, and secure machine learning systems. Prof. Shanbhag has pioneered work on statistical error compensation techniques and resistive crossbar-based architectures, addressing critical challenges in low-power, high-performance computing.

Education and career details are not explicitly provided in the text, but his extensive publications (313+) and honors indicate deep academic involvement. His research interests emphasize the intersection of hardware architecture and machine learning, with a focus on emerging technologies like MRAM and SRAM-based in-memory computing.

Key awards include the IEEE Fellow designation (2006) and the prestigious Semiconductor Industry Association (SIA) University Research Award (2018). His recent work explores security vulnerabilities in in-memory architectures, energy-accuracy trade-offs in resistive systems, and adversarial robustness of neural networks.

Prof. Shanbhag’s contributions span over 20 years, bridging theoretical computer science with practical hardware implementations. His lab (Coordinated Science Lab) and collaborations drive innovations in nanoscale information processing and trustworthy computing systems.