جستجوی استاد راهنمای دانشگاهی

Akhilesh Jaiswalمشاهده پروفایل

استادیار

• Device-Circuit Co-design
• Processing-in-Pixel
• In-Memory Computing
• +۴ مورد دیگر

Dr. Akhilesh Jaiswal serves as Assistant Professor of Electrical and Computer Engineering at the University of Wisconsin-Madison, where his research pioneers device-circuit co-design for next-generation computing systems. His work focuses on enabling extreme-edge intelligence through processing-in-pixel technology, in-memory computing architectures, and bio-inspired neuromorphic systems. His academic credentials include: PhD in Nano-electronics from Purdue University (2019) MS from the University of Minnesota (2014) Bachelor of Technology from Shri Guru Gobind Singhji Institute of Engineering and Technology (2011) Dr. Jaiswal's research program centers on revolutionizing edge computing through hardware innovations that integrate sensing and processing. His device-circuit co-design approach leverages alternate state variables to create energy-efficient systems for real-time applications, with particular emphasis on retina-inspired sensors and photonic memory architectures. This work bridges semiconductor physics with AI acceleration needs, targeting applications from autonomous systems to biomedical devices. Analysis of his 2023-2025 publications reveals dominant themes in photonic SRAM-based in-memory computing (40% of output), retina-inspired motion processing (30%), and secure hardware architectures (20%). His team consistently develops novel bitcell designs that enable XOR logic execution within memory arrays while maintaining compatibility with CMOS fabrication processes. Recent work shows increasing focus on biomedical applications of processing-in-pixel technology. His distinguished recognition includes: Three consecutive ISI Exploratory Research Awards (2020-2023) IEEE Brain Community Best Paper Award (2022) 27 issued US patents with multiple pending applications Nomination for USC Moore Inventor Fellowship (2022) Dr. Jaiswal actively mentors graduate researchers through ECE 790/890/990 courses while securing exploratory funding through ISI and Keston Foundation awards. His patent portfolio demonstrates exceptional translational impact, with industry game-changer classifications from USPTO. The 2022 VLSI-SoC nomination and multiple research highlights in major outlets validate his contributions to hardware security and neuromorphic vision sensors. His laboratory develops integrated hardware platforms combining magnetic tunnel junctions, photonic memory, and CMOS image sensors to create unified processing-in-sensor systems. Current projects include retina-inspired motion segmentation for event cameras and electro-optic frequency transducers for quantum computing interfaces, with strong industry collaboration through patent licensing.

Scott Hauckمشاهده پروفایل

استاد

• Reconfigurable Computing
• FPGA Architecture
• Quantum Computing Control
• +۵ مورد دیگر

Affiliation & Education Scott Hauck is a Professor at the University of Washington's Department of Electrical & Computer Engineering and an Adjunct Professor in Computer Science & Engineering. He leads the Adaptive Computing Machines and Emulators (ACME) Lab . He earned his BS in EECS from UC Berkeley (1990), and MS/PhD in CSE from the University of Washington (1992/1995). Research Focus Dr. Hauck specializes in FPGA-based reconfigurable computing with applications in: Quantum Computing: FPGA controllers for trapped-ion quantum systems enabling precise laser control and quantum state readout. Medical Imaging: Portable radiation sensors for personalized cancer therapy and PET scanner enhancements. High-Energy Physics: FPGA readout systems for ATLAS pixel detectors at CERN's Large Hadron Collider. AI Acceleration: Real-time machine learning inference for scientific applications via projects like hls4ml. His work bridges hardware innovation with computational physics, emphasizing real-time processing and low-latency systems. Publication Trends Recent research focuses on FPGA-accelerated machine learning for particle physics (e.g., transformer networks for LHC trigger systems) and quantum computing instrumentation. Earlier work established foundations in reconfigurable computing architectures and medical imaging electronics. Awards & Recognition Distinguished Teaching Award, University of Washington (2010) Advising & Funding Leads the ACME Lab with extensive funding from NSF, DARPA, NIH, DOE, and industry partners including Intel, Xilinx, and Microsoft. Mentored over 30 MS/PhD students in VLSI, reconfigurable systems, and scientific computing. Collaborations & Labs Directs the ACME Lab (EE1-307), collaborating with UW Radiology (Prof. Robert Miyaoka), UW Physics (Prof. Shih-Chieh Hsu), and Drexel University (Prof. Josh Agar). Projects include quantum control systems, LHC readout electronics, and medical sensor networks.

Naresh R. Shanbhagمشاهده پروفایل

استاد

• Energy-efficient computing
• Machine learning hardware
• In-memory computing
• +۷ مورد دیگر

Naresh R. Shanbhag is the Jack Kilby Professor in the Department of Electrical and Computer Engineering and the Coordinated Science Laboratory at the University of Illinois at Urbana-Champaign. He serves as Director of the Systems on Nanoscale Information fabriCs (SONIC) Center and held the D.J. Gandhi Distinguished Visiting Professorship at IIT Mumbai from 2015-2020. Previously, he was a visiting faculty member at National Taiwan University (2007) and Stanford University (2014). Dr. Shanbhag received his doctorate from the University of Minnesota (1993) in Electrical Engineering. From 1993 to 1995, he worked at AT&T Bell Laboratories as the lead chip architect for AT&T's 51.84 Mb/s transceiver chips over twisted-pair wiring for Asynchronous Transfer Mode (ATM)-LAN and very high-speed digital subscriber line (VDSL) chip-sets. His research focuses on the design of energy-efficient machine learning, communications, and signal processing systems on resource-constrained embedded platforms. He explores fundamental trade-offs between energy efficiency, latency and accuracy of decision-making systems implemented in nanoscale technologies, with applications to computer vision, biomedicine, automatic target recognition, and imaging. His work spans four primary focus areas: Resource-efficient Machine Learning for the Edge, In-memory Computing (IMC), Energy-efficient High Data Rate Communications, and Shannon-inspired Statistical Error Compensation (SEC). Analysis of his recent publications reveals a strong emphasis on in-memory computing architectures (SRAM, MRAM, RRAM) for machine learning acceleration. His work consistently addresses energy-accuracy trade-offs, with increasing attention to security aspects of hardware implementations and applications to MIMO signal processing and edge AI systems. His research demonstrates a progression from theoretical foundations to practical silicon implementations. 2024 Semiconductor Research Corporation Innovation Award 2018 Semiconductor Industry Association/Semiconductor Research Corporation University Researcher Award 2018 IEEE International Symposium on Circuits and Systems Best Paper Award 2006 IEEE Fellow 1996 National Science Foundation CAREER Award Professor Shanbhag has mentored over 50 graduate students who now work at leading technology companies including Qualcomm, Amazon, Nvidia, Intel, and Apple. His research has been generously supported by the National Science Foundation, DARPA, AFRL, Semiconductor Research Corporation, Texas Instruments, Sandia National Laboratories, and industry partners including IBM, GlobalFoundries, and Intel Corporation. He led the Alternative Computational Models research theme (2006-2012) and was the founding Director of the SONIC Center (2013-2017), a 5-year multi-university center funded by DARPA and SRC. Currently, he leads research themes in the SRC and DARPA funded JUMP 2.0 Program's Center for Co-Design of Cognitive Systems and the Center for Ubiquitous Connectivity, and in the NSF IUCRC Center for Advanced Semiconductor Chips with Accelerated Performance (ASAP). As Director of the Systems on Nanoscale Information fabriCs (SONIC) Center, Professor Shanbhag leads a multidisciplinary team exploring novel computing paradigms for the nanoscale era. His group has benchmarked an extensive collection of in-memory computing and digital accelerator IC designs, maintaining a publicly available IMC benchmarking repository of metrics extracted from published IC prototypes. His research philosophy integrates concepts from information theory, statistical signal processing, detection and estimation, VLSI architectures, and digital and analog integrated circuits to develop energy-efficient systems from algorithms to silicon implementations.

Edoardo Charbonمشاهده پروفایل

استاد

• Ultra High-Speed Optical Sensors
• 3D Optical Sensors
• LiDAR
• +۱۰ مورد دیگر

Edoardo Charbon is a Full Professor at École Polytechnique Fédérale de Lausanne (EPFL) in the School of Engineering, where he leads the Advanced Quantum Architecture Lab (AQUA). He also serves on the School Council STI and is Co-Director of STI-SSIQ Administration. Previously, he was a full professor and chair at Delft University of Technology from 2008 to 2016. Charbon received his Elektrotechnik Diploma from ETH Zurich, M.S. from UC San Diego, and Ph.D. from UC Berkeley, all in electrical engineering. His career spans industry experience at Cadence Design Systems and Canesta Inc. before joining EPFL in 2002. His research focuses on ultra high-speed and 3D optical sensors, with applications in LiDAR, FLIM (Fluorescence Lifetime Imaging Microscopy), PET (Positron Emission Tomography), FCS (Fluorescence Correlation Spectroscopy), and NIROT (Near-Infrared Optical Tomography). He has pioneered deep-submicron CMOS SPAD technology, which is now mass-produced and used in smartphones, telemeters, and medical diagnostics. His recent work bridges cryo-CMOS circuits for quantum computing with advanced optical sensing techniques. Analysis of his recent publications reveals a strong trend toward integrating quantum technologies with practical imaging applications. His work spans from fundamental device development (SPAD sensors, cryo-CMOS circuits) to applied systems (LiDAR engines, medical imaging devices), with increasing integration of machine learning techniques for real-time processing. 2023 IISS Pioneering Achievement Award Fellow of the IEEE Distinguished visiting scholar, W. M. Keck Institute for Space at Caltech Fellow, Kavli Institute of Nanoscience Delft Distinguished lecturer, IEEE Photonics Society Professor Charbon has authored or co-authored over 500 papers and two books, and holds 27 patents. His research has been supported by collaborations with organizations including Bosch, X-Fab, Texas Instruments, Maxim, Sony, Agilent, and the Carlyle Group. He has driven significant innovation in CMOS SPAD technology, which is now commercially deployed in various applications. He leads the Advanced Quantum Architecture Lab (AQUA) at EPFL, which focuses on the development of advanced sensor systems combining quantum technologies with conventional electronics. The lab has been instrumental in creating SPAD-based imaging systems that push the boundaries of time-resolved optical detection.

Morteza Fayaziمشاهده پروفایل

استادیار

• Electronic Design Automation (EDA)
• Machine Learning (ML) in Analog Circuit Design
• System-on-Chip (SoC) Design Automation
• +۳ مورد دیگر

Morteza Fayazi is an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Utah, with an adjunct position in the Kahlert School of Computing. His research focuses on Electronic Design Automation (EDA), applying machine learning to automate analog and mixed-signal circuit design, and developing high-performance computing systems. He holds a B.Sc. from Sharif University of Technology, and M.S.E./Ph.D. degrees from the University of Michigan. His research interests include AI-driven EDA, RF/circuit automation, and energy-efficient processors. Key achievements include the MEDAL lab’s work on terahertz radars, systolic-array processors (e.g., DAP and Versa), and open-source frameworks like FASCINET and Tablext. He has received awards such as the 2024 College of Engineering Dean’s ETR Fund and the 2017 Outstanding Undergraduate Thesis Award. Teaching responsibilities include multiple iterations of the Digital System Design course (ECE/CS 3700). His work spans over 15 peer-reviewed articles in IEEE Transactions, ACM, and top conferences like ICCAD and VLSI-SOC, emphasizing automation, efficiency, and AI integration in hardware design.

Soheil Salehiمشاهده پروفایل

استادیار

• Hardware Security
• AI-Enabled Security
• Internet of Things (IoT) Security
• +۱۵ مورد دیگر

Soheil Salehi is a tenure-track Assistant Professor in the Department of Electrical and Computer Engineering at the University of Arizona, with a joint appointment in Systems and Industrial Engineering. He is the Director of the Privacy-preserving, Intelligent, and Secure Computing (PRISM) Lab, established in August 2022. Prior to this, he was an NSF-Sponsored Computing Innovation Fellow and Postdoctoral Research Fellow at the University of California, Davis. Ph.D., Electrical and Computer Engineering, University of Central Florida, 2020 M.S., Electrical and Computer Engineering, University of Central Florida, 2016 B.S., Isfahan University of Technology, Iran, 2014 Dr. Salehi's research focuses on the intersection of hardware, AI, and security. His work spans hardware and AI-enabled security in IoT , Generative AI for hardware design and security , neuromorphic and biologically-inspired AI hardware , emerging spin-based devices , reconfigurable architectures , low-power VLSI circuits , and digital twins and mixed reality for semiconductor workforce development . He also explores the application of Generative AI in personalized education . His recent publications, spanning 2023–2025, reveal a strong trend toward integrating AI and machine learning into hardware security and design. Key themes include automated secure IC design flows , AI-driven hardware obfuscation , firmware and side-channel attack analysis , security in neuromorphic and spiking neural networks , and educational frameworks using digital twins and generative models . His work appears in top venues like DAC, ICCAD, USENIX Security, IEEE TCAS-I, and ISCAS. Outstanding Reviewer Award, IEEE/ACM Design Automation Conference (DAC), 2023 Best Presentation of the Symposium Award, UC Davis Postdoctoral Research Symposium, 2021 UCF Excellence by a Graduate Teaching Assistant (University-Level), 2016 Nominated for 30-under-30 Award, UCF, 2020 Nominated for Postdoctoral Research Excellence Award, UC Davis, 2022 Dr. Salehi has secured significant research funding as PI and Co-PI, including a $300K NSF SaTC EAGER grant on Generative AI-based Personalized Cybersecurity Tutor, a $174,000 University of Arizona PIF Award, and multiple RII grants totaling over $198K. He has also received industry funding from CHEST. He actively mentors students and leads the PRISM Lab, which focuses on privacy-preserving and intelligent secure computing. His service includes roles as Technical Program Committee (TPC) Member and Session Chair at premier conferences such as DAC, ICCAD, CCS, NDSS, and GLSVLSI. The PRISM Lab, under his direction, conducts cutting-edge research in secure and intelligent hardware systems, with applications in IoT, edge computing, and workforce development. The lab emphasizes interdisciplinary collaboration and innovation in both research and education.

Baker Mohammadمشاهده پروفایل

استاد

• Very-Large-Scale Integration (VLSI)
• Hardware Accelerators for Artificial Intelligence
• Hardware Security
• +۷ مورد دیگر

Prof. Baker Mohammad serves as Professor and Director of the System on Chip Lab in the Department of Computer and Information Engineering at Khalifa University. With over 15 years of industrial experience at Intel and Qualcomm designing microprocessors and DSP chips, he bridges academic research with real-world engineering challenges in high-performance computing and low-power systems. His educational background includes: Ph.D. in Electrical and Computer Engineering, University of Texas at Austin (2008) M.S. in Electrical and Computer Engineering, Arizona State University B.S. in Electrical Engineering, University of New Mexico Dr. Mohammad's research spans cutting-edge domains where VLSI design converges with AI acceleration and emerging memory technologies . His work pioneers Memristor applications in environmental sensing (radiation, vacuum, glucose) and neuromorphic computing, while advancing energy harvesting systems for wearable electronics. The integration of in-memory computing with security primitives represents a paradigm shift in hardware design, moving beyond traditional CMOS limitations. His publication trajectory reveals accelerating focus on self-powered neuromorphic systems and RRAM-based architectures, with recent work (2021-2023) emphasizing hardware-software co-design for edge AI. Over 75% of his recent publications involve cross-disciplinary collaborations spanning materials science, chemistry, and biomedical engineering. Notable scientific recognition includes: IEEE TVLSI Best Paper Award 2016 IEEE MWSCAS Myrill B. Reed Best Paper Award Qualcomm Qstar Award for Performance Leadership KUSTAR IP Excellence Award Multiple SRC Techon Best Session Papers As a dedicated mentor, he has supervised over 15 graduate students while securing competitive funding from Khalifa University, ADEK, Qualcomm, Tii, and UAE space agencies. His grant portfolio demonstrates exceptional translational impact, converting fundamental research in memristive devices into drone flight computers and medical sensors. Current projects integrate academic rigor with industrial deployment timelines. The System on Chip Lab operates as a multidisciplinary hub where semiconductor physicists collaborate with AI researchers to develop RISC-V-based secure processors and piezoelectric nanogenerator systems. Recent expansions include partnerships with Tii for aerospace applications and medical device startups for glucose monitoring technology.

• Network Security
• Android Security
• Malware Analysis
• +۶ مورد دیگر

Vijay Laxmi is a Professor in the Department of Computer Science and Engineering at Malaviya National Institute of Technology (MNIT) Jaipur, India. With over a decade of active research publication from 2014-2024, Dr. Laxmi has established themselves as a prominent researcher in network security, Android security systems, and Network-on-Chip architectures. Their work demonstrates consistent collaboration with Manoj Singh Gaur and numerous doctoral students at MNIT Jaipur. Dr. Laxmi's research interests span Network Security, Android Security, Malware Analysis, Network-on-Chip Architectures, Routing Protocols, Side-Channel Attacks, Wireless Networks, and Mobile Security. Their work bridges theoretical security frameworks with practical implementations, particularly in mobile and embedded systems. Recent publications indicate a growing focus on AI-based security approaches including GAN applications for fuzzing and deep learning for image dehazing. The research trajectory shows increasing sophistication in security analysis techniques, evolving from basic malware detection to advanced side-channel attack analysis and sophisticated network security protocols. Recent publications demonstrate expertise in both theoretical frameworks and practical implementations with applications in real-world security challenges. Dr. Laxmi has mentored numerous graduate students including Vineeta Jain, Anugrah Jain, Sonal Yadav, Mohit Singh, and Gaurav Singal, who appear as co-authors across multiple publications. Their collaborative network extends to researchers at international institutions, indicating strong academic connections beyond their home institution.

Azad J Naeemiمشاهده پروفایل

استاد

• Nanotechnology
• Nanoelectronics
• Spintronics
• +۵ مورد دیگر

Azad J Naeemi is a Professor holding the Dean's Professorship in the School of Electrical and Computer Engineering at the Georgia Institute of Technology. He serves as Editor-in-Chief of the IEEE Journal on Exploratory Computational Devices and Circuits and Associate Director for Computation of the NSF-supported National Nanotechnology Coordinated Infrastructure (NNCI). His educational background includes a B.S. in Electrical Engineering from Sharif University (1994) and M.S./Ph.D. in Electrical and Computer Engineering from Georgia Tech (2001/2003). Prior to academia, he worked as a design engineer in Tehran (1994-1999) and as a research engineer at Georgia Tech's Microelectronics Research Center (2004-2008). Professor Naeemi's research spans nanotechnology with focus on emerging nanoelectronic devices, spintronics, ferroelectric devices, and design technology co-optimization for CMOS/beyond-CMOS technologies. His work bridges materials, devices, circuits, and systems, particularly investigating integrated circuits based on nanoscale devices and interconnects. Educational research includes experiential learning environments for engineering education. Recent publications (2024-2025) demonstrate strong emphasis on spin-orbit torque MRAM, ternary content addressable memories, ferroelectric/antiferroelectric devices, and plasmonic circuits. Key trends include energy-efficient hardware accelerators, neuromorphic computing applications, and compact modeling for advanced technology nodes. His scientific honors include: IEEE Solid-State Circuits Society James Meindl Innovators Award (2022) IEEE Electron Devices Society Paul Rappaport Award (2008) NSF CAREER Award (2013) SRC Inventor Recognition Award (2010) Multiple Georgia Tech teaching awards Professor Naeemi leads research supported by NSF (including NNCI infrastructure) and SRC. His editorial role with IEEE JXCDC positions him at the forefront of exploratory computational devices. He previously served as General Co-Chair for the IEEE International Interconnect Technology Conference (2013). His work connects with Georgia Tech's Microelectronics Research Center and national nanotechnology initiatives through the NNCI network, focusing on computational infrastructure for nanoscale device characterization and design.

Ameer Abdelhadiمشاهده پروفایل

استادیار

• Hardware Acceleration
• Neurotechnology
• Reconfigurable Computing
• +۴ مورد دیگر

Dr. Ameer Abdelhadi is an Assistant Professor in the Department of Electrical and Computer Engineering at McMaster University. His research focuses on application-specific custom-tailored computer architectures, hardware-efficient deep learning, neurotechnology, and reconfigurable computing. He holds a PhD from the University of British Columbia and has held academic positions at the University of Toronto, Imperial College London, and Simon Fraser University, alongside industry experience in semiconductor design. Education: PhD in Computer Engineering (University of British Columbia, 2016). Research Interests: Hardware acceleration for machine learning and neurotechnology Reconfigurable computing and FPGAs/ASICs Asynchronous circuits and synchronization protocols VLSI physical design and CAD algorithms Publications span high-impact venues such as IEEE Journal of Solid-State Circuits, IEEE Hot Chips, and IEEE Micro. Notable achievements include the 2017 Best Paper Award at ASYNC for work on synchronization FIFOs. Teaching includes COMPENG 4DV4 (VLSI System Design) and ELECENG 4OI6B (Engineering Design). His lab focuses on advancing hardware systems for next-generation applications in AI and biomedical engineering.

• Computer Science
• Artificial Intelligence
• Machine Learning
• +۹ مورد دیگر

Jim Torresen is a Professor at the Norwegian University of Science and Technology (NTNU), specializing in Computer Science, Artificial Intelligence, and Robotics. He earned his M.Sc. and Dr.ing. (Ph.D.) in computer architecture and design from NTNU in 1991 and 1996 respectively, followed by industry experience in hardware design before transitioning to academia in 1999. Research Interests: His work spans Machine Learning, Evolvable Hardware, and Ethical AI, with notable contributions to music technology, facial expression recognition, and healthcare monitoring systems. He actively explores interdisciplinary applications of AI in creative domains and clinical environments. Publications & Editorial Roles: Torresen has published extensively in journals like Frontiers in Artificial Intelligence and Genetic Programming and Evolvable Machines . He serves as a Topic Editor for Frontiers in Explainable AI and has editorial roles in robotics and biomedical AI domains.

Abdulkadir C. Yucelمشاهده پروفایل

استادیار

• Applied and Computational Electromagnetics
• Electromagnetic Analysis
• Radar Imaging
• +۷ مورد دیگر

Abdulkadir C. Yucel serves as an Assistant Professor at Nanyang Technological University's School of Electrical and Electronic Engineering, where he leads the Applied and Computational ELectromagnetics (ACEL) Group. His research spans applied electromagnetics, radar imaging, and AI-driven electromagnetic analysis with applications in smart cities, neurotechnology, and quantum systems. Education: Ph.D. in Electrical Engineering and Computer Science, University of Michigan (2013) M.S. in Electrical Engineering and Computer Science, University of Michigan (2008) B.S. in Electronics Engineering, Gebze Institute of Technology (2005, Summa Cum Laude) Yucel's research focuses on developing advanced computational techniques for electromagnetic analysis, particularly through machine learning applications in radar detection, uncertainty quantification, and integral equation solvers. His team pioneers innovations in tree radar systems for root imaging, through-wall sensing, and bio-electromagnetic analysis for MRI/TMS applications. Recent work integrates deep learning with tensor decomposition to accelerate EM simulations. Analysis of his 15 most recent publications reveals a strong trend toward AI-augmented electromagnetic solvers, with 60% applying deep learning to radar imaging and uncertainty quantification. Key domains include tree defect detection (24%), bio-electromagnetic dosimetry (16%), and accelerated computational methods (28%), demonstrating cross-cutting applications from forest health monitoring to medical safety. Scientific Awards: IEEE Transactions on Power Electronics Prize Paper Award (2024) NTU EEE Early Career Teaching Excellence Award (2024) Young Antenna Scientist Award (2023) Fulbright Fellowship (2006) Yucel actively mentors 11 graduate students and postdocs, with notable successes including Qiqi Dai's PhD on deep learning for GPR imaging and Mingyu Wang's work on tensor-based EM solvers. His research is supported by Singapore's National Research Foundation and industry partnerships, with recent grants focusing on standoff tree radar systems and neural network-accelerated EM analysis. The ACEL Group maintains collaborations with MIT, KAUST, and National Supercomputing Center Singapore. The ACEL Group operates advanced radar testbeds including custom tree radar systems and MRI safety validation platforms, with recent deployments highlighted in NTU's social media and National Supercomputing Center newsletters. Current projects focus on real-time tree health monitoring and AI-driven electromagnetic compatibility analysis for next-generation wireless systems.

Vincent John Mooney IIIمشاهده پروفایل

دانشیار

• Hardware-Software Co-Design
• Cyber Physical Systems Security
• System Level Design
• +۷ مورد دیگر

Vincent John Mooney III is an Associate Professor at the School of Electrical and Computer Engineering and an Adjunct Associate Professor at the School of Computer Science, Georgia Institute of Technology. His research focuses on Hardware-Software Co-Design , Cyber Physical Systems Security , and Low-Power Architectures . He has authored numerous publications on topics such as probabilistic computing, hardware security, and embedded systems design. Dr. Mooney has received prestigious awards including the NSF Career Award , National Semiconductor Fellowship , and ARCS Best Paper Award . Education: Ph.D. in Electrical Engineering (1998), Stanford University MA in Philosophy (1997), Stanford University MS in Electrical Engineering (1994), Stanford University Certificate of Graduate Study (1992), University of Navarra BS in Electrical Engineering and Computer Science (1991), Yale University Research interests span hardware/software codesign, cybersecurity in embedded systems, and synthesis of reconfigurable architectures. His recent work includes Gridtrust for decentralized supply chain cybersecurity and COPPER for computation obfuscation. Dr. Mooney has supervised numerous Ph.D. students and held leadership roles in conferences such as HOST and CASES . Scientific awards include NSF Career Award (2000) National Semiconductor Fellowship (1997-1998) AT&T Engineering Scholarship Program (1987-1991) NCAA Postgraduate Scholar (1991) Senior Member, IEEE (2003) ARCS 2012 Best Paper Award Advising and grants highlight his mentorship of students like Jun Cheol Park and Yudong Tan , along with grants such as the U.S. Air Force Summer Faculty Fellowship (2007). He leads the Hardware/Software Codesign for Security Group at Georgia Tech and has contributed to advancements in real-time operating systems and deadlock detection algorithms.

Lisa Willsمشاهده پروفایل

استادیار

• Computer Architecture
• Hardware Acceleration
• Hardware-Software Co-Design
• +۵ مورد دیگر

Lisa Wills serves as Assistant Professor of Computer Science at Duke University's Trinity College of Arts & Sciences and holds a joint appointment in Electrical and Computer Engineering at the Pratt School of Engineering since 2019. Her research bridges computer architecture and domain-specific applications, with a focus on hardware acceleration for computationally intensive fields. Dr. Wills earned her Ph.D. from Columbia University in 2014. Her academic journey reflects a deep commitment to advancing hardware-software co-design methodologies for real-world computational challenges. Her research centers on developing efficient hardware accelerators for big data analytics, particularly in genomics, graph processing, and database systems. She pioneers frameworks that simplify accelerator deployment while tackling critical bottlenecks in genomic data analysis, protein structure prediction, and privacy-preserving computing. Current work focuses on hardware-aware machine learning systems and energy-efficient architectures for emerging AI applications. Analysis of her publication record reveals a clear trajectory: from foundational work in database processing units (2014-2016) to specialized genomic accelerators (2019-2021), then evolving toward ML-enhanced design automation (2022-2023) and cutting-edge architectural abstractions (2024-2025). Her research consistently targets the intersection of hardware efficiency and domain-specific computational demands, with increasing emphasis on AI/ML workloads. Google ML and Systems Junior Faculty Award (2025) Dr. Wills actively mentors doctoral students including Chris Kjellqvist (lead architect of Beethoven accelerator framework), Mason Ma (PyTFHE FHE framework), and Mansi Choudhary (COCOSSim accelerator simulator). Her research is supported by significant grants including the NSF AI Institute: Athena ($20M, 2021-2027), Meta-funded ProSE accelerator project (2023-2026), and NSF CAREER award (2021-2026), totaling over $25M in active funding. She directs the APEX Lab (Application-driven Programmable Efficient Accelerated Systems), which develops open-source frameworks like Beethoven for FPGA/ASIC accelerator deployment and focuses on lowering barriers for non-hardware researchers to leverage custom acceleration in genomics, AI, and big data applications.

Jason D. Bakosمشاهده پروفایل

استاد

• Computer Architecture
• Reconfigurable Computing
• High-Performance Computing
• +۴ مورد دیگر

Dr. Jason D. Bakos is a Professor in the Department of Computer Science and Engineering at the University of South Carolina's Molinaroli College of Engineering and Computing. His research focuses on high-performance domain-specific architectures, including reconfigurable computing, embedded systems, and machine learning acceleration. He has held academic positions since 2005, progressing from Assistant to Associate Professor before becoming a full Professor in 2017. Education : Ph.D., Computer Science, University of Pittsburgh (2005) B.S., Computer Science, Youngstown State University (1999) Research Interests : Dr. Bakos specializes in computer architecture at multiple levels (circuit, micro-architectural, and system) with a focus on VLSI design, reconfigurable computing, high-performance computing, and applications in embedded systems. His recent work includes FPGA acceleration of machine learning algorithms, structural health monitoring systems, and real-time signal processing. Awards : 2018 Teaching Award in Computer Science and Engineering 2009 NSF CAREER Award Multiple design competition awards for innovative chip and circuit designs Grants & Funding : He leads and co-leads projects funded by NSF, Savannah River National Laboratory, and industry partners like Texas Instruments. Recent grants focus on edge computing for real-time machine learning, FPGA-based accelerators, and corrosion analysis of nuclear materials. Labs & Teams : His research group collaborates on projects involving embedded systems, FPGA design, and interdisciplinary applications in structural engineering and bioinformatics. He advises a dynamic team of graduate students and post-doctoral researchers.