جست‌وجوی استاد و پژوهشگر

Esam Abdel-Raheemمشاهده پروفایل

استاد

• Digital Signal Processing
• Biomedical Engineering
• Cognitive Radio Networks
• +۳ مورد دیگر

Dr. Esam Abdel-Raheem is a Professor in the Department of Electrical and Computer Engineering at the University of Windsor, Faculty of Engineering. His research focuses on digital signal processing, biomedical engineering, cognitive radio networks, and VLSI design. He holds a Ph.D. from the University of Victoria (1995) and is a Professional Engineer (P.Eng.) in Ontario and a Senior Member of IEEE. Education: B.Sc. Electrical Engineering, Ain Shams University (1984) M.Sc. Electrical Engineering, Ain Shams University (1989) Ph.D. Electrical Engineering, University of Victoria (1995) Research Interests: Dr. Abdel-Raheem’s work spans signal processing for communications, biomedical signal processing, and VLSI implementations. He has pioneered algorithms for cognitive radio networks and adaptive filtering. His recent studies leverage deep learning for medical diagnostics (e.g., lung nodule detection, Parkinson’s disease voice analysis) and cognitive radio spectrum sensing. Publications Trends: Recent work emphasizes biomedical applications (e.g., CT scan analysis, diabetic retinopathy detection) and machine learning integration in communications (e.g., federated learning for traffic crowdsourcing). His articles often bridge theoretical signal processing with practical implementations in hardware (e.g., FPGA-based filters). Awards/Grants: Not explicitly listed in the text, though his senior IEEE membership and prolific publications suggest sustained professional recognition. Lab/Teams: While not detailed, his research themes imply involvement in interdisciplinary teams focusing on biomedical engineering, telecommunications, and VLSI design.

Andreas Peter Burgمشاهده پروفایل

دانشیار

• Circuits and systems for telecommunications
• Silicon implementation of communication technologies
• Communication algorithms optimization
• +۵ مورد دیگر

Andreas Peter Burg is a Tenured Associate Professor at the École Polytechnique Fédérale de Lausanne (EPFL), where he leads the Telecommunications Circuits Laboratory (TCL) within the School of Engineering. He holds multiple academic and administrative roles at EPFL including Associate Professor in Teaching (SEL, EDMI, EDEE), Director of SEL Management, and Member of the Doctoral Program Committee for Electrical Engineering. Dr. Burg received his Dipl.-Ing. degree in 2000 and Dr. sc. techn. degree in 2006 from ETH Zurich. His academic career includes positions as SNF Assistant Professor at ETH Zurich (2009-2011) before joining EPFL in January 2011 as a Tenure Track Assistant Professor, where he was promoted to Tenured Associate Professor in June 2018. His research focuses on circuits and systems for telecommunications , with particular expertise in silicon implementation of communication technologies, communication algorithms optimization for hardware, low-power VLSI signal processing, and digital integrated circuits. His work bridges theoretical communication concepts with practical circuit implementations, addressing challenges in wireless and wired communication systems. His recent publications (2024-2025) demonstrate a strong focus on next-generation communication technologies including 6G systems, advanced error correction coding, wireless sensing applications, and ultra-low power circuit design. These works span multiple subfields from LDPC and polar code decoding to RF signal processing and machine learning applications in wireless systems. Willi Studer Award (2000) ETH Medal for diploma thesis (2000) ETH Medal for Ph.D. dissertation (2006) Swiss National Science Foundation Assistant Professorship grant (2008) Dr. Burg has been involved in the development of more than 25 ASICs throughout his career and co-founded Celestrius, an ETH spinoff in MIMO wireless communication. His laboratory work focuses on practical implementations of communication algorithms with emphasis on power efficiency and hardware optimization. Current research directions include 6G technologies, wireless sensing applications, and novel error correction techniques for next-generation communication systems.

• Embedded Systems
• Hardware-Software Co-Design
• Invasive Computing
• +۷ مورد دیگر

Prof. Dr.-Ing. Jürgen Teich is a full Professor and Chair for Hardware-Software Co-Design at the Department of Computer Science, Friedrich Alexander University Erlangen-Nuremberg (FAU). He serves as Head of Department Computer Science and Vice Dean of the Technical Faculty since August 2024, and has been Speaker of the FAU Research Center Embedded System Initiative (FAU ESI) since 2023. His educational background includes: Diploma degree in Electrical Engineering, University of Kaiserslautern (1989) Dr.-Ing. degree in Electrical Engineering, University of Saarland (1993) Habilitation (PD Dr.-Ing.) entitled "Synthesis and Optimization of Digital Hardware/Software Systems" (1996) Prof. Teich's research focuses on Embedded Systems , Invasive Computing , Hardware-Software Co-Design , and Reconfigurable Computing . His work spans from theoretical foundations to practical implementations, with particular emphasis on resource-constrained systems, many-core architectures, and energy-efficient computing. He has pioneered research in invasive computing paradigms that enable more efficient use of many-core processors by allowing applications to dynamically claim resources. His recent publications reveal a strong trend toward energy-efficient AI deployment on embedded devices , security of embedded systems , and novel memory technologies . There's a clear focus on practical implementations of machine learning on microcontrollers (TinyML), hardware acceleration for data processing, and innovative approaches to power management in self-powered systems. Among his notable scientific awards are: IEEE Fellow (since 2018) Member of Academia Europaea, Section Informatics (since 2011) Member of the National Academy of Science and Engineering (acatech) (since 2018) Member of the German Society of Humboldtians (since 2021) Prof. Teich has been Principal Investigator for numerous DFG-funded projects including SFB/Transregio 89 "Invasive Computing" (2010-2022), SFB 694, and multiple priority programs. He has coordinated large collaborative research efforts across Germany and internationally, with significant funding from DFG and other sources. His research group has produced influential work in embedded systems design and co-design methodologies. He leads the Hardware-Software Co-Design research group at FAU, which focuses on innovative approaches to embedded system design, invasive computing architectures, and efficient implementation of machine learning on resource-constrained devices. The group maintains strong collaborations with industry partners including Intel, Xilinx, and automotive companies.

• Digital Circuits
• Digital Signal Processing
• Machine Learning
• +۱۰ مورد دیگر

Maurizio Martina is a Full Professor at the Department of Electronics and Telecommunications (DET) of Politecnico di Torino. He is a member of the Interdepartmental Center PEIC - Power Electronics Innovation Center and serves as an Associate Editor for the IEEE Transactions on Circuits and Systems I (2018-2023). His research focuses include: Digital circuits and signal processing Machine learning hardware architectures RISC-V extensions and post-quantum cryptography VLSI design for edge computing and IoT Recent publications emphasize cryptographic hardware implementations (CHIMERA, Keccak co-processors), RISC-V integration methodologies, and privacy-preserving neural network frameworks. His work spans VLSI architectures for video processing, bio-inspired electronics, and error correcting codes, with applications in cybersecurity, robotics, and biomedical systems. Scientific Recognition : Premio Nazionale Innovazione (2013) Premio dei Premi (2014) He supervises 12 PhD students across cycles 35-40 in Electrical, Electronics and Communications Engineering, including: Valeria Piscopo (2024-in progress) Alessandra Dolmeta (2022-in progress) Luigi Giuffrida (2022-in progress) Walid Walid (2019-2023) As part of the VLSILAB Group , his research explores hardware accelerators for machine learning, post-quantum cryptography on RISC-V, and bio-inspired embedded systems. Teaching activities include courses on Integrated Systems Architecture and Hardware & Wireless Security at Politecnico di Torino and Università di Pavia.

Wenfeng Zhaoمشاهده پروفایل

استادیار

• Neural Engineering
• Compressed Sensing
• Ultra-low Power VLSI
• +۳ مورد دیگر

Wenfeng Zhao is an Assistant Professor in the Department of Electrical and Computer Engineering at Binghamton University. He holds a PhD from the National University of Singapore (2014) and BS/MS degrees from Huazhong University of Science and Technology (2007-2009). Prior to this role, he conducted postdoctoral research at the University of Minnesota's Biomedical Engineering Department. His research focuses on neural engineering, compressed sensing, ultra-low-power VLSI systems, and in-memory computing. Key areas include hardware security, biomedical signal processing, and energy-efficient computing architectures. His work spans applications in neural interfaces, cryptographic hardware, and IoT edge devices. Recent publications highlight advancements in block-cipher-in-memory architectures, emotion recognition via EEG analysis, and energy-efficient FPGA accelerators for neural networks. His research also addresses challenges in cryogenic memory systems and MRI-compatible neural recording devices. Zhao's contributions emphasize interdisciplinary approaches at the intersection of hardware design, signal processing, and cybersecurity. His lab develops novel solutions for low-power embedded systems and trustworthy IoT infrastructure.

• CAD tools
• Digital architectures
• Emerging technologies
• +۹ مورد دیگر

Giovanna Turvani is an Associate Professor at the Department of Electronics and Telecommunications (DET) at Politecnico di Torino, with affiliations in both the College of Electronic, Telecommunications and Physics Engineering and the College of Computer, Film, and Mechatronics Engineering. Scientific Branch: IINF-01/A - Electronics ERC Sectors: PE7_4, PE7_11, PE6_1, PE6_14, PE7_3 SDG Goals: Quality Education, Gender Equality, Affordable Energy, Industry Innovation Her research focuses on advanced electronics and quantum technologies, including: Logic-in-memory computing Quantum computing architectures Microwave imaging for medical and agricultural applications CAD tools for emerging nanotechnologies Embedded systems for bee health monitoring IoT solutions for bio-waste valorization Publications show strong expertise in quantum computing, nanocomputing, and microwave imaging, with recent trends emphasizing quantum optimization frameworks, in-memory architectures, and IoT-based agricultural technologies. She supervises PhD students in areas like quantum machine learning algorithms, predictive on-board systems, and quantum hardware design. Collaborations span multiple disciplines, including medical device development and agricultural electronics. Patents include innovations in microwave imaging, racetrack memory logic functions, and in-memory computing devices.

• Process Technology
• Device Design
• Silicon Carbide (SiC) Electronics
• +۳ مورد دیگر

Carl-Mikael Zetterling is a Professor and Head of Department at Kungliga Tekniska Högskolan (KTH) in Stockholm, Sweden, affiliated with the School of Electrical Engineering and Computer Science (ICT) and the Electronics and Embedded Systems department. His research focuses on process technology and device design for high-temperature, high-power silicon carbide (SiC) electronics, expanding into SiC-based analog and integrated circuits. He has authored over 300 publications, including books on SiC process technology and plagiarism prevention. Dr. Zetterling has held leadership roles such as Vice Dean of the School of ICT (2013–2017) and teacher representative on KTH's faculty board. He has collaborated internationally at Stanford University, Kyoto University, and Kyoto Institute of Technology. His work addresses applications in extreme environments, including Venus exploration and fusion reactor monitoring, with a focus on radiation tolerance and thermal resilience. The 15 most recent publications highlight trends in wide bandgap semiconductors, gamma irradiation effects on SiC devices, and high-temperature integrated circuits. His articles span structural health monitoring with machine learning, novel SiC diode designs, and radiation-hardened electronics. Key contributions include advancements in self-aligned contacts, trench MOSFETs, and compact modeling for extreme conditions. While no formal awards are listed, his roles in technical program committees (TMS Electronic Materials Conference, IEEE SISC Conference) and editorial work demonstrate significant academic service. He teaches courses ranging from digital design to high-temperature electronics, overseeing degree projects in embedded systems, communication, and nanotechnology.

• Digital Signal Processing
• Communication Systems
• Biomedical Signal Processing
• +۶ مورد دیگر

Dr. Barry Cardiff is an Assistant Professor in the School of Electrical and Electronic Engineering at University College Dublin (UCD), where he has been a member of academic staff since September 2013. His career spans both industry and academia, with significant experience at Nokia Mobile Phone (UK) Ltd and Silicon & Software Systems (S3 group) before returning to complete his PhD at UCD. Education: B.Eng (1992), M.Eng.Sc. (1995), PhD (2011) from University College Dublin Professional Experience: Design Engineer at Nokia (1993-2001), Systems Architect at S3 group (2001-2007, 2011-2013) Current Position: Assistant Professor at UCD School of Electrical and Electronic Engineering Dr. Cardiff's research focuses on Digital Signal Processing applications in communication systems, with particular emphasis on theoretical analysis and practical implementation. His work bridges traditional communication theory with emerging biomedical applications, especially in wearable IoT sensors. He has made significant contributions to power/complexity reduction techniques in circuit design, specifically DSP algorithms for digitally assisted analog circuits. His research program addresses critical challenges in biomedical signal processing, sensor fusion, and efficient data transmission for healthcare applications. His recent publications demonstrate a strong trend toward biomedical applications of signal processing techniques, with a focus on ECG analysis, atrial fibrillation detection, and respiratory rate estimation using multimodal sensor fusion. The research shows a clear progression from traditional communication systems toward healthcare applications, with an emphasis on edge computing solutions that reduce power consumption in wearable devices. IEEE BioCas best paper award (2024) IEEE senior member since 2019 Active reviewer for multiple IEEE journals including Transactions on Biomedical Circuits and Systems, Circuits and Systems, and VLSI Systems Dr. Cardiff has supervised numerous research projects and has been instrumental in developing curriculum for digital communications, signal processing, and wireless systems. His teaching philosophy emphasizes open, friendly, and hands-on approaches that encourage independent thinking. He coordinates multiple modules including Communication Theory, Digital Electronics, DSP Technology, and Wireless Systems, demonstrating his commitment to both theoretical foundations and practical applications of electrical engineering principles. His research group works at the intersection of signal processing, machine learning, and biomedical engineering, developing innovative solutions for wearable healthcare monitoring. Current projects focus on event-driven processing architectures, decentralized classification systems, and signal quality-aware fusion techniques that enable robust performance in noisy real-world environments.

Patrick W. C. Hoمشاهده پروفایل

مدرس

• Memristor
• Non-volatile memories
• VLSI
• +۷ مورد دیگر

Dr. Patrick W. C. Ho is a Lecturer in the Department of Electrical & Computer Systems Engineering (ECSE) at Monash University Malaysia School of Engineering. He holds a PhD in Electronics Engineering from the University of Nottingham Malaysia Campus (2016), with research focusing on non-volatile FPGA architectures using memristors. His academic journey includes roles as a Scholarly Teaching Fellow and unit coordinator for courses like ECE2131 Electrical Circuits and ECE4063 Large Scale Digital Design. He has industry experience with Intel Microelectronics and Altera Corporation, alongside teaching A-level Physics at Methodist College Kuala Lumpur. Education: BEng (First Class Honours) in Engineering (2009) MSc in Science (2012) PhD in Electronics Engineering (2016) Research Interests: Dr. Ho specializes in memristor-based non-volatile memory systems, VLSI design, and FPGA architectures. His work bridges hardware design with emerging materials, as seen in his Q1 journal article on memristive LUTs. Collaborations with CAD-IT expand his focus into AI, image processing, and object recognition. Recent projects include studies on memristor substrate performance (2023–2026) and UAV communication reliability (2021–2024). Teaching and Industry Engagement: As ECSE’s Industrial Training Advisor and IAP representative, he actively connects academic curricula with industry needs. His teaching spans foundational engineering courses and advanced digital design modules. Labs and Collaborations: Active in CAD-IT partnerships for student FYP co-sponsorship. Research groups focus on nanotechnology, machine learning integration in UAV systems, and memristor material analysis.

• Channel decoders
• Circuits for communications
• Cryptography
• +۸ مورد دیگر

Guido Masera is a Full Professor at the Department of Electronics and Telecommunications (DET) at the Polytechnic University of Turin, where he has been actively involved in teaching and research for over two decades. He serves as a Member of the Board of Directors, Member of the GEDI Observatory for Gender Equality, Diversity and Inclusion, and Member of the Permanent University Observatory for monitoring the academic supply chain. His research interests span across channel decoders, circuits for communications, cryptography, deep learning, digital integrated circuits, field programmable gate arrays (FPGA), and hardware design. His work focuses on VLSI architectures for image and video coding, digital architectures for error correcting codes, application specific approximate computing, VLSI architectures for machine learning, digital architectures for bio-inspired processing, digital architectures for post-quantum cryptography, bio-inspired electronics for robotics and biomedical applications, RISC-V extensions and hardware accelerators, and circuit architectures for efficient machine learning and artificial intelligence. His recent publications (2025) demonstrate a strong focus on RISC-V architecture, particularly in the context of cryptographic implementations, hardware security, and post-quantum cryptography. His research group VLSILAB is actively engaged in cutting-edge research in hardware security, efficient processor design, and specialized computing architectures. Among his notable recognitions are the Premio Francesco Carassa awarded by the Telecommunications and Information Technologies Group Association (gtti) in 2010, and his recognition as a Fellow of the Institute of Electrical and Electronics Engineers (IEEE) since 2007. He also serves as an Associate Editor for several prestigious journals including ELECTRONICS (2019-present), IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS (2015-2019), and IET CIRCUITS, DEVICES & SYSTEMS (2013-2016). Professor Masera has advised numerous PhD students working on advanced topics in VLSI design, post-quantum cryptography, hardware accelerators, and machine learning implementations. His current research projects include ISOLDE (2023-2026) and TRISTAN (2022-2025), both EU-funded projects focused on RISC-V technology and domain-specific ecosystems. He leads the VLSILAB research group at the Department of Electronics and Telecommunications, which focuses on cutting-edge research in VLSI architectures, hardware security, and specialized computing systems. The group collaborates with industry partners and participates in major European research initiatives.

• Mobile and cloud computing
• Energy-efficient computing
• Image and video processing
• +۲ مورد دیگر

Yung-Hsiang Lu is a Professor of Electrical and Computer Engineering at Purdue University's Elmore Family School of Electrical and Computer Engineering. His research focuses on mobile/cloud computing, energy-efficient computing, and image/video processing. He holds a BSEE from National Taiwan University (1992), an MSEE (1996), and a PhD (2002) from Stanford University. Dr. Lu's academic background includes significant contributions to VLSI and circuit design, with primary emphasis on computer engineering. His work spans theoretical and applied domains, including optimizing neural networks for edge devices, securing deep learning models, and leveraging large language models for software development. Recent research trends in his articles emphasize energy efficiency in AI systems, interdisciplinary applications of transformers (e.g., music analysis), and challenges in model interoperability and security. His publications also highlight innovations in global camera networks and real-time visual data analysis. While no specific grants or awards are explicitly mentioned, his extensive list of publications reflects sustained academic engagement. His educational contributions include developing C programming resources and teaching large-scale image processing using global camera networks. Dr. Lu's professional address is at Purdue's Materials and Electrical Engineering Building in West Lafayette, Indiana, where he maintains an active research lab focused on embedded systems and low-power computing innovations.

Ahmed Hemaniمشاهده پروفایل

استاد

• Computer Engineering
• Embedded Systems
• Hardware Acceleration
• +۵ مورد دیگر

Professor Ahmed Hemani is a faculty member at the Division of Electronics and Embedded Systems, KTH Royal Institute of Technology, affiliated with the Digital Futures Faculty. He holds the role of PI for the project 'New Chip Architectures for Industrial Vision' and leads research in reconfigurable computing, memristor-based systems, and hardware acceleration for AI and edge computing. His work bridges theoretical computer science with practical VLSI design and embedded systems development. He actively contributes to cross-disciplinary initiatives at Digital Futures, a joint center with Stockholm University and RISE Research Institutes of Sweden focused on digital innovation. His research emphasizes scalable FPGA/HPC architectures, low-power neuromorphic systems, and optimization techniques for custom silicon solutions. Current projects include a Lego-inspired edge AI framework and memristor-driven MIMO acceleration. Teaching responsibilities span advanced courses in SOC design, digital system verification, and embedded systems. He supervises advanced-level degree projects across computer engineering and ICT innovation specializations, emphasizing hands-on hardware-software co-design methodologies. Recent publications highlight innovations in memristor applications, FPGA-based acceleration, and reconfigurable architectures for neural networks and bioinformatics. His work addresses challenges in dark silicon utilization, energy-efficient computation, and high-performance embedded systems.

Yong-Bin Kimمشاهده پروفایل

استاد

• Integrated Circuit Design
• Nanoelectronics
• High-Speed System Integration
• +۴ مورد دیگر

Yong-Bin Kim is a Professor in the Department of Electrical and Computer Engineering at Northeastern University, part of the College of Engineering. He has held prior positions at Intel Corp., Hewlett Packard Co., Sun Microsystems, and the University of Utah. His research focuses on integrated circuit design, nanoelectronics, bio-chip interfaces, and low-power VLSI systems. He has contributed to initiatives like the HPVLSI Lab and Microsystems and Electron Devices Lab. Education includes a B.S. in Electronic Engineering from Sogang University (Seoul, South Korea), an M.S. from the New Jersey Institute of Technology, and a Ph.D. in Computer Engineering from Colorado State University (1996). Research interests encompass high-speed low-power VLSI design, system-on-chip (SoC), physical VLSI CAD, and nanoelectronics. Specific areas include bio-sensor interface circuits, electronic neuron design, and adaptive robot controllers. Key projects involve compact power-efficient integrated circuits and high-speed transceiver design. Outstanding Paper Award, 2020 IEEE ISOCC South Korean Patent for Autonomous Impedance Calibration (2021) Best Paper Award, 2016 International SoC Design Conference Patent for Improved Receiver Circuit (2020) Patent for Method to Detect Trojan Circuits (2018) Advisees include graduate student Yixuan He. He has led research projects funded by Winchester Technology and Hynix Semiconductor, focusing on semi-self-calibration transceivers and tunable RF inductors. Labs include the HPVLSI Lab and Microsystems and Electron Devices Lab at Northeastern University, which focus on high-speed/low-power IC design and microfabrication technologies.

Montek Singhمشاهده پروفایل

دانشیار

• High-performance digital systems
• Low-power digital systems
• Asynchronous circuits
• +۵ مورد دیگر

Montek Singh serves as an Associate Professor and Associate Chair for Academic Affairs in the Department of Computer Science at the University of North Carolina at Chapel Hill. His research focuses on high-performance and energy-efficient digital systems with particular emphasis on asynchronous and mixed-timing circuit design. Dr. Singh received his Ph.D. in Computer Science from Columbia University in 2002 and his B.Tech. in Electrical Engineering from IIT Delhi, India, in 1993. His primary research interests span high-performance and low-power digital systems, with specialization in asynchronous or clockless and mixed-timing integrated chip design. His work encompasses circuit design methodologies, CAD tools for automated synthesis, analysis and optimization techniques. He has also explored applications in energy-efficient mobile graphics hardware, secure chip design for computer security, and design challenges in emerging computing technologies. His research has practical applications in industry, with work transferred to companies including IBM, Boeing, and Handshake Solutions. Analysis of Dr. Singh's publications reveals a strong focus on asynchronous circuit design spanning two decades. His work covers fundamental pipeline architectures (MOUSETRAP), high-speed asynchronous systems, latency-insensitive design methodologies, and practical applications in graphics hardware and mobile devices. The research demonstrates consistent innovation in making asynchronous design more practical for real-world implementation while addressing performance, power efficiency, and testing challenges. His notable scientific achievements include: Best Paper Award at the 6th IEEE Intl. Symp. on Adv. Res. in Async. Circ. and Syst. (ASYNC-2000) Best Paper Finalist at the 8th IEEE Intl. Symp. on Async. Circ. and Syst. (ASYNC-02) Dr. Singh has secured significant research funding including participation in the DARPA CLASS Program (led by Boeing) in 2005, where he collaborated with Philips/Handshake Solutions to develop an industrial-strength automated synthesis flow for high-speed asynchronous systems. His research has strong industry connections and practical applications, with technology transferred to major companies including IBM and Boeing. He has also organized major academic events such as the International Symposium on Asynchronous Circuits and Systems 2009 (ASYNC 2009) at UNC Chapel Hill. Dr. Singh leads research in asynchronous systems design with connections to industry partners and practical applications. His work has been featured in prominent media outlets including The New York Times, International Herald Tribune, and Technology Review Magazine, highlighting the significance of clockless design approaches as traditional synchronous design approaches face limitations.

Kia Bazarganمشاهده پروفایل

دانشیار

• VLSI-CAD
• FPGA Physical Design
• Reconfigurable Computing
• +۴ مورد دیگر

Kia Bazargan is an Associate Professor and the Leroy and Ruth Fingerson Co-op Professor at the University of Minnesota, College of Science and Engineering. He currently serves as Director of the Co-op Program and focuses on VLSI-CAD, FPGA physical design, and hybrid binary-unary computing. University: University of Minnesota School: College of Science and Engineering Department: Electrical and Computer Engineering His research emphasizes stochastic computing and unary computing, where numbers are encoded as streams of bits. He explores techniques to reduce hardware costs while maintaining efficiency, particularly for edge computing and neural network applications. Recent publications highlight his work on hybrid binary-unary computing, FPGA-based inference acceleration, and lossless compression of lookup tables. Grants from Cisco Systems and the National Science Foundation support his projects. Scientific Awards: PFI-TT Grant (2020-2024): Commercializing hybrid computing for modern applications Uniqomp NSF Grant (2020-2021) EAGER Grant (2015): Studying complex dynamical systems His lab (4-162 EE/CSci) investigates scalable computing paradigms to bridge the gap between ASICs and FPGAs in performance and energy efficiency.