Luca Carloni is a Professor of Computer Science and Department Chair at Columbia University's Columbia Engineering. He leads the System-Level Design Group, focusing on heterogeneous system-on-chip (SoC) architectures, networks-on-chip (NoC), and embedded systems. Carloni holds a Laurea Summa Cum Laude in Electronics Engineering from the University of Bologna and a PhD in Electrical Engineering and Computer Sciences from UC Berkeley. His work emphasizes specialized hardware design, energy-efficient computing, and FPGA-based prototyping. Research interests include system-level design methodologies for SoCs, embedded accelerators, and quantum computing hardware. He has pioneered frameworks like Embedded Scalable Platforms (ESP) and tools like MosaicSim for rapid SoC prototyping. Carloni has received numerous awards, including the NSF CAREER Award (2006), IEEE Fellow (2017), and multiple best paper awards at DATE and CloudCom conferences. He has served on editorial boards of IEEE Transactions on CAD and ACM Transactions on Embedded Computing , and chaired key conferences like EMSOFT and ESWeek. His research addresses challenges in heterogeneous architectures, power management, and the intersection of machine learning with embedded systems. Current projects explore quantum control systems, brain-computer interfaces, and energy-efficient datacenter computing.
Prof. Daniel Große serves as Professor at the Institute for Complex Systems (ICS) within Johannes Kepler University Linz, Austria, while maintaining a dual affiliation with the German Research Center for Artificial Intelligence (DFKI) in Bremen. His research centers on Electronic Design Automation (EDA), specializing in verification, debugging, and synthesis of complex hardware/software systems through advanced virtual prototyping techniques. His primary research domains include Formal Verification , Hardware Verification , and Virtual Prototyping , with significant contributions to RISC-V architecture development and embedded systems validation. Current projects like PaSVer (automotive electronics), AUTOASSERT (analog-digital verification), and VerSys (RISC-V software platforms) demonstrate his focus on bridging simulation and formal methods for safety-critical applications. Recent publications reveal accelerating trends in metamorphic testing for embedded graphics libraries and RISC-V vector extensions, alongside innovations in waveform analysis tools like Surfer. His work increasingly integrates AI-assisted verification while maintaining rigorous formal methods foundations. Prof. Große actively supervises student research, having guided Lucas Klemmer's PhD thesis and nine Bachelor theses on topics ranging from RISC-V processor design to transaction visualization. His projects including SATiSFy (autonomous vehicle security) and CONVERS (complex system design automation) secure substantial research funding from academic and industry partners. He leads the Institute for Complex Systems' development of open-source tools such as RISC-V VP++ and contributes to international standards through program committee roles at DATE, ICCAD, and RISC-V Summit Europe.
Alaa Alameldeen is an Associate Professor in the School of Computing Science at Simon Fraser University (SFU), part of the Faculty of Applied Sciences. Previously, he worked as a Research Scientist at Intel Labs (2006–2020) and held an Adjunct Faculty position at Portland State University (2008–2018). He earned a PhD in Computer Sciences from the University of Wisconsin-Madison (2006), and earlier degrees from Alexandria University, Egypt. His research focuses on computer architecture, including memory systems (processing-in-memory, cache/memory compression, security), energy-efficient architectures, and hardware-software co-design for machine learning. He advises PhD and MSc students in these areas and teaches advanced computing science courses. Key contributions include innovations in memory hierarchies, cache compression techniques, and mitigating hardware vulnerabilities. His work has been published in top conferences (e.g., ISCA, MICRO, HPCA) and patented in areas like near-memory processing and error correction. Alameldeen currently leads a research group exploring secure and high-performance memory architectures. He has supervised multiple graduate students, with many progressing to roles at leading tech companies and academic institutions.
Professor David Thomas holds the position of Professor in Computer Engineering at the University of Southampton's Electronics and Computer Science Department. His research focuses on the intersection of software and hardware, particularly leveraging FPGAs for novel digital architectures and event-driven computing. He has a notable academic trajectory, having previously served as a Lecturer and Senior Lecturer at Imperial College London before joining Southampton in 2021. Dr. Thomas is actively involved in supervising PhD students and contributes to interdisciplinary research projects funded by the EPSRC, such as the SONNETS initiative exploring scalable event-triggered systems. Education: BSc in Computer Science (Imperial College London), PhD in Digital Architectures (Imperial College London). Postdoctoral roles included Research Associate and Research Fellow at Imperial's Department of Computing. Research Interests: Event-driven computing, FPGA-based systems, high-level synthesis, and high-performance computing. His work emphasizes practical implementations of theoretical models, such as custom processors and application-specific accelerators. Current projects include optimizing random number generation for FPGAs and exploring meta-programming techniques for hardware design. Advising and Grants: Supervises multiple PhD students in areas like neuromorphic computing and algorithm optimization. Active in securing funding for distributed system architectures and FPGA-based solutions. Labs/Teams: Member of the Cyber Physical Systems research group. Collaborates with interdisciplinary teams on projects like POETS (Partially Ordered Event-Triggered Systems) for large-scale parallel computing.
Eleonora Vacca is a PhD student and Research Fellow in the Department of Automatic Control and Computer Science (DAUIN) at the Polytechnic University of Turin. She holds a B.S. in Electronic Engineering from the University of Palermo (2018) and an M.S. in Electronic Engineering-Embedded Systems from Politecnico di Torino (2021). Her research focuses on digital hardware design, reliability engineering, reconfigurable devices, and AI applications in aerospace and safety-critical systems. She is a member of the Aerospace and Safety Computing Lab and the CAD - Electronic CAD & Reliability Group (DAUIN). Her work addresses challenges such as radiation effects mitigation in space missions, fault-tolerant AI accelerators, and real-time anomaly detection in satellite telemetry. She has contributed to projects like the RAMSES CubeSat-1 Development (2025-2026), funded by commercial contracts. In 2024, she won the Best Student Paper Award at the NEWCAS Conference for her research on radiation effects in space missions. Vacca collaborates on teaching, including assisting in the course 'Electronic Calculators' for Computer Engineering students. Her recent publications explore AI resilience in RISC-V ecosystems, radiation environment analysis for space missions, and gesture recognition systems for smart cities. She actively contributes to conferences such as the ACM International Conference on Computing Frontiers and the IEEE International Smart Cities Conference.
Rabi N. Mahapatra is a Professor in the Department of Computer Science & Engineering at Texas A&M University, within the College of Engineering. His research focuses on embedded systems, reconfigurable architectures, real-time systems, and semantic networks. He holds a Ph.D. in Computer Engineering from the Indian Institute of Technology (1992), an M.S. in Electrical Engineering (Sambalpur University, 1984), and a B.S. in Electronics & Communication (Sambalpur University, 1979). His research interests include Network-on-Chip (NoC), data analytic co-design, IoT protocols, and temperature-aware energy management. His work emphasizes hardware-software co-design for complex systems, with applications in many-core processors, semantic search engines, and real-time embedded systems. Key publications highlight contributions to collaborative filtering on many-core architectures, low-jitter clock distribution circuits, and energy-efficient scheduling. He has been recognized as an IEEE Computer Society Distinguished Visitor (2005–2007) and received the BOYS-CAST Indo-US Young Scientist Award. He leads the Codesign Embedded Systems group at Texas A&M, exploring cutting-edge topics such as photonics NoC, reservoir computing, and IoT security. His research bridges theory and practice, addressing challenges in scalable systems and embedded applications.
David Wentzlaff is a Professor of Electrical and Computer Engineering at Princeton University, with associated faculty roles in Computer Science and the High Meadows Environmental Institute (HMEI). He leads research in computing architecture, green computing, and sustainable system design. As Director of Undergraduate Studies, he shapes educational programs in his field. Education: Ph.D., Electrical Engineering, MIT (2012) M.S., Electrical Engineering and Computer Science, MIT (2002) B.S., Electrical Engineering, University of Illinois at Urbana-Champaign (2000) Research Focus: Future Computing Systems: Designing manycore architectures, cloud computing infrastructure, and chiplet-based systems for exascale computing. Sustainability: Developing energy-efficient hardware, recyclable computing systems, and eco-friendly decommissioning strategies. Hardware-Software Co-Design: Exploring FPGA integration, in-memory computing, and parallel processing frameworks. Advising & Grants: Advises 8 current graduate students, focusing on topics like chiplet design, neural acceleration, and sustainable computing. Recipient of NSF grants for projects like OpenPiton (open-source manycore research platform) and CAREER awards for energy-efficient architectures. Labs & Collaborations: Leads the Wentzlaff Research Group at Princeton. Develops open-source frameworks like PRGA (FPGA prototyping) and OpenPiton (manycore processor).
Wenjing Rao is an Associate Professor at the Department of Electrical and Computer Engineering, College of Engineering, University of Illinois at Chicago (UIC). Her research focuses on VLSI test, fault-tolerance, reliability, and hardware security in emerging nanoelectronic systems. Education: Ph.D. in Computer Science from University of California, San Diego (2008) B.S. in Computer Science from Peking University (2001) Her work explores novel computation paradigms through physical unclonable functions (PUFs), defect-tolerant logic implementation, and scalable fault tolerance in many-processor arrays. Publications emphasize hardware security, reconfiguration strategies, and reliability challenges in nanoscale architectures. Notable honors include the 2017 Harold A. Simon Award for Excellence in Teaching and the 2012 NSF CAREER Award. She has contributed to key journals like IEEE Transactions on Computer-Aided Design and conferences including DATE, ASPDAC, and NANOARCH.
Mads Dam is a Professor in Teleinformatics at the School of Computer Science and Communication at Kungliga Tekniska Högskolan (KTH), where he heads the Department of Theoretical Computer Science. His research focuses on computer security, formal methods, and program logics, with particular emphasis on the formal modeling and verification of low-level hardware and software execution platforms for security and application isolation. His educational background includes: PhD in Computer Science from the University of Edinburgh (1990) MSc in Computer Engineering from Aalborg University, Denmark BSc in Information Technology from Aalborg University, Denmark Mads Dam's research interests center on computer security, formal methods, and program logics. His current work focuses on the formal modeling and verification of low-level hardware and software execution platforms such as hypervisors and OS kernels and their underlying hardware. He has made significant contributions to information flow security, verification of microarchitectural systems, and network programming language security. His research bridges theoretical foundations with practical security applications. His recent publications show a strong trend toward verifying low-level systems, with a focus on information flow security for processors, network programming languages (particularly P4), and microarchitectural vulnerabilities. His work combines formal methods with practical security concerns, developing verification techniques that address real-world security challenges in hardware and software systems. The research spans theoretical foundations in temporal and epistemic logics to practical applications in network security and processor verification. His scientific awards and recognition include: Two framework grants from the Swedish Foundation for Strategic Research A junior individual grant from the Swedish Foundation for Strategic Research Project grants and a five-year research fellowship from the Swedish Research Council (VR) Project grants from Ericsson, Microsoft Research, US Air Force, and Vinnova (the Swedish Innovation Agency) Mads Dam has been a principal investigator on numerous research projects and has supervised many graduate students. He has been a partner in several European projects including HATS, S3MS, VerifiCard, LOMAPS, and UaESMC. His research has been supported by substantial grants from major funding bodies, reflecting the significance and impact of his work in computer security and formal methods. He is a founding member of several research centers at KTH, including Access, the CASTOR software research center, and the CDIS center for cyber defense and information security. These centers bring together researchers from multiple disciplines to address complex challenges in cybersecurity and software engineering.
Cynthia Sturton serves as Associate Professor and Peter Thacher Grauer Scholar in the Department of Computer Science at the University of North Carolina at Chapel Hill. She leads the Hardware Security @ UNC research laboratory focused on developing formal verification tools for hardware security analysis. Her educational background includes a Ph.D. (2013) and M.S. from UC Berkeley, and a B.S.Eng. from Arizona State University. Her research centers on hardware security, applied formal methods, and symbolic execution techniques for identifying security vulnerabilities in processor designs before fabrication. Sturton's research demonstrates consistent innovation in hardware security verification, particularly through tools like Sylvia (symbolic execution for Verilog) and SylQ-SV (SystemVerilog analysis with query caching). Her work bridges theoretical formal methods with practical security applications, addressing critical challenges like path explosion and security property generation at scale. Nominated for Best Paper award at IEEE/ACM MICRO 2018 Intel Hardware Security Academic Award, 2nd place ($50,000) at IEEE Symposium on Security and Privacy 2020 Selected as Top Picks in Hardware and Embedded Security 2021 She advises multiple graduate students including Rui Zhang and Calvin Deutschbein, and has secured significant research funding from NSF (Grants 1816637, 651276), Semiconductor Research Corporation, Intel, Google, and UNC Chapel Hill. Her Hardware Security @ UNC lab develops critical tools for security property generation and vulnerability detection in hardware designs.
Chester Rebeiro is an Associate Professor at the Department of Computer Science and Engineering within the Indian Institute of Technology Madras . His work spans hardware and software security with a focus on cryptographic implementations and microarchitectural vulnerabilities. Research interests include hardware security, applied cryptography, side channel analysis, and operating system security. He develops frameworks for automatic vulnerability detection and mitigation in cryptographic systems. Editorial Board: Associate Editor at Journal of Hardware and Systems Security (Springer, 2021-2024) Conference Leadership: General Co-Chair for SPACE 2024, Program Co-Chair for ATS 2024, and Program Co-Chair for INDOCRYPT 2023 Professional Activities: Organizer of e-CTF Embedded Capture The Flag and contributor to cybersecurity workshops across India and abroad Scientific contributions highlight two major awards: a Distinguished Paper Award at USENIX Security 2024 and a Best Paper Award at IEEE HOST 2020. His research focuses on practical security solutions for processors and cryptographic systems. Advising includes mentoring 11 PhD students and 7 MS by Research candidates, with notable co-guided projects in fault attack detection and side-channel mitigation. He actively contributes to educational initiatives through courses on Secure Processor Microarchitecture and Operating Systems.
Lisa Wills serves as Assistant Professor of Computer Science at Duke University's Trinity College of Arts & Sciences and holds a joint appointment in Electrical and Computer Engineering at the Pratt School of Engineering since 2019. Her research bridges computer architecture and domain-specific applications, with a focus on hardware acceleration for computationally intensive fields. Dr. Wills earned her Ph.D. from Columbia University in 2014. Her academic journey reflects a deep commitment to advancing hardware-software co-design methodologies for real-world computational challenges. Her research centers on developing efficient hardware accelerators for big data analytics, particularly in genomics, graph processing, and database systems. She pioneers frameworks that simplify accelerator deployment while tackling critical bottlenecks in genomic data analysis, protein structure prediction, and privacy-preserving computing. Current work focuses on hardware-aware machine learning systems and energy-efficient architectures for emerging AI applications. Analysis of her publication record reveals a clear trajectory: from foundational work in database processing units (2014-2016) to specialized genomic accelerators (2019-2021), then evolving toward ML-enhanced design automation (2022-2023) and cutting-edge architectural abstractions (2024-2025). Her research consistently targets the intersection of hardware efficiency and domain-specific computational demands, with increasing emphasis on AI/ML workloads. Google ML and Systems Junior Faculty Award (2025) Dr. Wills actively mentors doctoral students including Chris Kjellqvist (lead architect of Beethoven accelerator framework), Mason Ma (PyTFHE FHE framework), and Mansi Choudhary (COCOSSim accelerator simulator). Her research is supported by significant grants including the NSF AI Institute: Athena ($20M, 2021-2027), Meta-funded ProSE accelerator project (2023-2026), and NSF CAREER award (2021-2026), totaling over $25M in active funding. She directs the APEX Lab (Application-driven Programmable Efficient Accelerated Systems), which develops open-source frameworks like Beethoven for FPGA/ASIC accelerator deployment and focuses on lowering barriers for non-hardware researchers to leverage custom acceleration in genomics, AI, and big data applications.
Prof. Dr. Estela Suarez is a Professor of High Performance Computing at the Institute for Computer Science, University of Bonn (W2 in the Jülich Model) and Joint Lead of the Division "Novel System Architecture Design" at the Jülich Supercomputing Centre (JSC), Forschungszentrum Jülich GmbH. She also leads the Research Group "Next Generation Architectures and Prototypes" at JSC and serves as Spokesperson of Helmholtz Information Program 1, Topic 2. Currently on sabbatical during the 2024/2025 and 2025 academic years, she remains active in research leadership roles. 2010: PhD in Physics from University of Geneva, Switzerland 2004: Master in Physics, Specialization in Astrophysics, University Complutense of Madrid, Spain Professor Suarez specializes in high performance computing with particular expertise in heterogeneous HPC system architectures and modular supercomputing architecture (MSA). Her research spans hardware prototyping and evaluation, system software development, operational data analysis, and co-design methodologies. She has pioneered approaches to address hardware heterogeneity through system-wide orchestration of diverse computing resources, enabling more efficient scientific computing across multiple domains. Her work bridges theoretical computer architecture with practical implementation challenges in exascale computing environments, focusing on real-world applications that require specialized hardware configurations. Professor Suarez's publication record shows a clear evolution from foundational work on the DEEP project (2016) through the development of modular supercomputing concepts (2019-2021) to current applications across diverse scientific domains (2022-2024). Her recent publications demonstrate how modular architectures can be effectively applied to climate modeling, neuroscience simulations, quantum chemistry calculations, and other computationally intensive fields. This trend highlights her focus on practical implementation challenges and the growing importance of adaptable computing architectures in modern scientific research. 2023/2024 Lehrpreis der Universität Bonn: UniBonn teaching award Professor Suarez has secured significant research funding through major projects including NUMERIQS (Projects A05, B02, and Z02), European Processor Initiative (EPI), DEEP-SEA (Software for Exascale Architectures), IFCES2 (optimization of simulation algorithms for exascale supercomputers), and AIDAS (virtual laboratory between Forschungszentrum Jülich and CEA on AI and data analytics). While currently not accepting new students due to sabbatical, she has previously mentored graduate students in high performance computing techniques and has delivered numerous invited lectures at international conferences. Professor Suarez leads the "Next Generation Architectures and Prototypes" research group at JSC and serves as Joint Lead of the "Novel System Architecture Design" division. She chairs the Research and Innovation Advisory Group (RIAG) from EuroHPC Joint Undertaking since 2024. Her work involves close collaboration with international research teams on advancing supercomputing architectures, including contributions to the University of Bonn's new HPC system "Marvin" which ranks on both the TOP500 and GREEN500 lists.
Moinuddin Qureshi is a Professor of Computer Science at Georgia Institute of Technology, affiliated with the School of Computer Science and involved in the Online Master of Science in Computer Science (OMSCS) program. He holds a Ph.D. and M.S. from the University of Texas at Austin. His research focuses on computer architecture, memory systems, hardware security, and quantum computing, with notable contributions to mitigating rowhammer vulnerabilities and advancing quantum error correction. Previously, he was a Research Staff Member at IBM T.J. Watson Research Center (2007–2011), where he contributed to caching algorithms for Power-7 processors. He has held leadership roles, including Program Chair of MICRO 2015 and Selection Committee Co-Chair of Top Picks 2017. His work has been recognized with prestigious awards, including the 2019 Persistent Impact Prize and multiple best paper awards. Key research areas include secure memory design (e.g., rowhammer mitigation techniques like MINT and Moat), quantum computing (e.g., Flag-Proxy Networks and Élivágar), and hardware vulnerability analysis (e.g., Roguerfm attacks and COAXIAL memory systems). His publications span 2009–2025, addressing topics like error correction, secure tracking, and quantum annealing optimization. Awards include membership in ISCA, MICRO, and HPCA Hall of Fame, alongside contributions to conferences like HiPC and IEEE MICRO. His work bridges theoretical advancements with practical implementations in both classical and quantum domains.
Dongwook Kim is affiliated with the Korea Advanced Institute of Science & Technology (KAIST) as a faculty member in the Department of Business and Technology Management under the College of Business. His research spans multiple domains including machine learning, robotics, signal processing, and biomedical engineering. Key contributions in Computer Vision (CNN-based semantic segmentation, 3D point cloud analysis) Significant work in Hardware Design (energy-efficient processors, neuromorphic computing) Interdisciplinary expertise in Medical Imaging (bone age assessment, retinal biomarkers) and Cybersecurity (attack detection, network analytics) Publications since 2015 demonstrate sustained innovation in AI applications , Signal Processing , and Smart City Governance . His work often integrates theoretical advances with practical implementations in real-world systems. No scientific awards or student mentorship details are explicitly documented in the provided records.
