جست‌وجوی استاد و پژوهشگر

Manolis G.H. Katevenisمشاهده پروفایل

استاد

• Computer Architecture
• VLSI Systems
• Interconnection Network Architecture
• +۴ مورد دیگر

Manolis G.H. Katevenis is a Professor at the Department of Computer Science, University of Crete, and Deputy Director and Head of the Computer Architecture and VLSI Systems (CARV) Laboratory at the Institute of Computer Science (ICS), Foundation for Research & Technology - Hellas (FORTH). He co-founded the European Research Center on Computer Architecture (EuReCCA) and is a founding partner of the European Network of Excellence on High-Performance and Embedded Architecture and Compilation (HiPEAC). PhD in Computer Science from University of California, Berkeley (1983) Co-founder of EuReCCA (2011) Contributed to RISC architecture (1980-1983), interconnection networks (1985-2011), and parallel computing (1993-2010) His research spans Scalable Multicore Systems , Interconnection Network Architecture , Packet Switch Design , Computer Architecture , and VLSI Systems . He has made foundational contributions to per-flow queueing, backpressure mechanisms, and wormhole IP over ATM, with applications in internet routers, data centers, and supercomputers. His publications focus on high-radix crossbar switches, flow control algorithms, and explicit interprocessor communication. Notable scientific awards include: ACM Doctoral Dissertation Award (1984) David J. Sakrison Memorial Prize (1983) IBM PhD Fellowship (1981-1983) Greek State Fellowship (1973-1978) He has supervised 40 graduate theses and participated in 22 R&D projects totaling €9M, including HiPEAC (coordinator of interconnection networks), SARC (FPGA prototype design), and ENCORE (cache-optimized remote DMA). His work has received over 2000 citations, with an h-index of 23.

• Virtualization
• Operating Systems
• Concurrency
• +۴ مورد دیگر

Gaël Thomas is a Senior Researcher at Inria Saclay and a part-time Professor at École Polytechnique. He leads the Benagil team, a joint initiative between Inria and Telecom SudParis/IP Paris. His research focuses on virtualization, operating systems, concurrency, and runtime systems, with an emphasis on improving system performance and safety. He holds a PhD and Habilitation from Sorbonne Université and has extensive academic experience, including roles as a Professor at Telecom SudParis (2014–2023) and an Associate Professor at UPMC (2006–2014). Education: PhD in Computer Science, 2005, UPMC Sorbonne Université Habilitation à Diriger les Recherches (HDR), 2012, UPMC Sorbonne Université MSc in Computer Science, 2001, MIAIF Program Research Interests: Gaël’s work spans virtualization techniques, NUMA architecture optimization, garbage collection scalability, lock-free algorithms, and persistent memory systems. He has pioneered solutions like J-NVM for Java NVMM and NumaGiC for big data systems. Grants & Awards: Principal Investigator of DiVA (PEPR Cloud, 868k€) and Maplurinum (ANR PRC, 184k€) Contributions to VMKit and infra-web-cours development Labs/Teams: Benagil Team (Inria/Telecom SudParis) focuses on systems and runtime optimization.

John D. Kubiatowiczمشاهده پروفایل

استاد

• Computer Architecture
• Quantum Computing
• Distributed Systems
• +۷ مورد دیگر

Professor John D. Kubiatowicz is a faculty member at the University of California at Berkeley in the Department of Electrical Engineering and Computer Sciences since 1998. He holds a PhD in Electrical Engineering and Computer Science (minor in Physics) from MIT (1998), an M.S. in EECS (1993), and a double B.S. in Electrical Engineering and Physics (1987) from MIT. His research interests span Quantum Computing Architectures Distributed Systems and Storage Network Security and Peer-to-Peer Protocols Introspective and Manycore Operating Systems Edge and Fog Computing Hardware-Assisted Security He has pioneered systems like OceanStore , a global-scale distributed file system, and Tessellation , a manycore OS with continuous adaptation. The scientific awards he has received include Presidential Early Career Award (PECASE, 2000) Scientific American 50 (2002) Diane S. McEntyre Teaching Award (2003) IEEE ICRA Best Paper (2025) George M. Sprowls Award for MIT PhD thesis (1998) Okawa Research Grant (1998) Best Paper at International Conference on Supercomputing (1993) His recent publications focus on Quantum Circuit Design and Optimization Edge/Fog Computing Architectures Secure Runtime Systems Distributed Garbage Collection Manycore OS Innovations Hardware-Assisted Security Mechanisms He leads the Quantum Architecture Research Center and co-founded the SWARM Lab at Berkeley, advancing a vision of self-adapting, secure systems from the chip level to internet scale.

Simon Mooreمشاهده پروفایل

استاد

• Computer Architecture
• Computer Security
• Hardware Security
• +۳ مورد دیگر

Simon Moore is a Professor of Computer Engineering at the University of Cambridge's Department of Computer Science and Technology. He leads the Computer Architecture research group, focusing on secure processors and subsystems, particularly the CHERI project. His work emphasizes formal verification, hardware-software co-design, and scalable security solutions. He is a Fellow and Director of Studies at Trinity Hall, overseeing undergraduate admissions and mentoring in Computer Science. Research Interests: Moore's primary focus is the CHERI secure processor architecture, integrating RISC-V cores with formal verification. His work spans secure hardware design, memory safety, and embedded systems. Notable contributions include the CHERI-RISC-V microarchitecture, CheriABI, and formal verification frameworks. Key Projects: CHERI, CheriBSD, Morello (ARM collaboration) Recent Achievements: Test of Time Award (IEEE Security & Privacy 2025), finalist for Bhattacharyya Award (2022) Grants: Innovate UK Digital Security by Design, DARPA Mission Oriented Resilient Clouds Publications: Over 200 papers on secure architectures, including influential work on CHERI's capability model, formal verification, and hardware security. Recent focus areas include temporal memory safety, embedded system security, and GPU-based capability systems. Labs/Teams: Directs the Computer Architecture Group and collaborates with industry partners like ARM and Microsoft on CHERI implementations.

Julian Shunمشاهده پروفایل

دانشیار

• Parallel Computing
• High-Performance Computing
• Graph Analytics
• +۷ مورد دیگر

Julian Shun is an Associate Professor at the Massachusetts Institute of Technology (MIT) in the Department of Electrical Engineering and Computer Science (EECS) and a principal investigator in the Computer Science and Artificial Intelligence Laboratory (CSAIL). Previously, he was a Miller Research Fellow at UC Berkeley and earned his Ph.D. from Carnegie Mellon University under Guy Blelloch. His research focuses on parallel and high-performance computing, with emphasis on graph analytics, spatial/graph clustering, and dynamic algorithms. He designs algorithms with theoretical guarantees and empirical efficiency, along with high-level programming frameworks to simplify parallel code development. His work spans cache-oblivious, external-memory, and streaming graph algorithms, addressing scalability and performance across diverse computational architectures. Julien's recent publications highlight advancements in parallel graph traversal, dynamic connectivity, and approximation algorithms for centrality metrics. His research also explores domain-specific languages like GraphIt for graph analytics and frameworks such as Julienne for work-efficient bucketing. Scientific Awards: Miller Research Fellow at UC Berkeley He has taught graduate-level courses at MIT, including 6.506 (Algorithm Engineering) and 6.886 (Graph Analytics), emphasizing theoretical foundations, experimental analysis, and open-ended research projects.

• Embedded Systems
• System-on-Chip (SoC) Design
• Computer Architecture
• +۵ مورد دیگر

Professor Klaus McDonald-Maier is a full Professor in the School of Computer Science and Electronic Engineering (CSEE) at the University of Essex , where he leads the Embedded and Intelligent Systems (EIS) Research Laboratory and heads the Intelligent Embedded Systems and Environments Research Group . He is also Director of Impact , Visiting Professor at the University of Kent, and Visiting Research Affiliate at NASA Jet Propulsion Laboratory, California Institute of Technology. Education PhD in High-Performance Parallel Neural Network Architectures, Friedrich-Schiller-University Jena (Germany, 1999) Electronic Engineering studies, University of Ulm (Germany) Electronic Engineering studies, Cardiff University (Wales) Electronic Engineering studies, École Supérieur de Chimie Physique Électronique de Lyon (CPE-Lyon) (France) Research Interests Professor McDonald-Maier’s research integrates embedded systems , System-on-Chip (SoC) architectures , and AI-driven robotics . He pioneers visual place recognition techniques that remain robust under severe appearance and viewpoint changes, develops cybersecurity frameworks based on ICMetrics for autonomous vehicles and IoT, and designs approximate real-time computing solutions for energy-constrained multicore and FPGA platforms. His work on radiation-tolerant systems supports space and nuclear applications, while his bio-inspired algorithms enable lightweight, neuromorphic perception on resource-limited robots. Publication Trends Between 2022 and 2025 his output converges on FPGA-accelerated AI , secure edge intelligence , visual navigation for autonomous systems , and healthcare analytics . He repeatedly couples rigorous algorithmic innovation with practical hardware deployment, yielding energy-efficient, real-time systems validated in domains ranging from autonomous driving to post-stroke rehabilitation. Scientific Awards & Recognition Best Paper Award – IEEE Transactions on Sustainable Computing (2024) Best Paper Award – IEEE/ACM DATE (2024) Best Paper Award – IEEE Systems Journal (2022) Best Paper Award – IEEE Sensors Journal (2021) Best Paper Award – IEEE Access (2020) Research Grants & Industrial Collaboration He has secured major funding from EPSRC , EU Horizon 2020 , Innovate UK , and industry partners. Current projects span trustworthy autonomy, radiation-hardened edge AI, and AI-enhanced rehabilitation technologies. He is Chief Scientist of UltraSoC Technologies Ltd and CEO of Metrarc Ltd , commercialising University research in semiconductor debug and cybersecurity respectively. Laboratory & Team Leadership As Director of the Embedded and Intelligent Systems Laboratory (EIS Lab) , he oversees a multidisciplinary team of researchers and PhD students, providing state-of-the-art FPGA, robotics, and embedded-systems facilities. The lab collaborates closely with NASA JPL, UK Atomic Energy Authority, and leading semiconductor firms to translate fundamental research into high-impact industrial solutions.

• Multicore Computing
• Virtualization
• Cloud Computing
• +۴ مورد دیگر

Xiaoning Ding is an Associate Professor in the Department of Computer Science at New Jersey Institute of Technology (NJIT). His research focuses on virtualization, multicore computing, cloud infrastructure optimization, and mobile systems. He leads projects addressing challenges in nested virtualization, memory management, and cache conflicts in distributed and cloud environments. Key research interests include optimizing task scheduling in cloud VMs, reducing TLB misses through huge page strategies, and mitigating interference in multi-tenant GPU clouds. His work on page placement mechanisms and dynamic page coalescing aims to enhance virtualized cloud performance. Ding has received federal funding, including an NSF grant for virtualization research in heterogeneous memory hierarchies (2016–2019). His research outputs span over 74 publications, with notable contributions in EuroSys, IEEE Transactions, and conferences like PACT. Media coverage highlights his studies on cloud computing and collaborative mobile systems, such as parking assignment algorithms. Beyond technical contributions, Ding advises students in interdisciplinary projects, exemplified by collaborations with Applied Math majors on cloud computing challenges.

Jia Raoمشاهده پروفایل

دانشیار

• Operating Systems
• Distributed Systems
• Parallel Computing
• +۱۳ مورد دیگر

Dr. Jia Rao is an Associate Professor in the Department of Computer Science and Engineering at the University of Texas at Arlington, College of Engineering. He previously served as an Assistant Professor at the University of Colorado, Colorado Springs from 2012 to 2016. His research spans operating systems, distributed and parallel computing, cloud computing, virtualization, and machine learning. Education: Ph.D., Computer Engineering, Wayne State University, 2011 M.S., Computer Science, Wuhan University, 2006 B.S., Computer Science, Wuhan University, 2004 Dr. Rao's research focuses on building adaptive, scalable, and efficient computer systems for cloud and data center environments. His interests include resource management, performance modeling, adaptive scheduling, and quality-of-service (QoS) guarantees in virtualized and containerized systems. He combines machine learning and feedback control techniques with low-level system design to improve efficiency, fairness, and predictability in heterogeneous and multi-tenant environments. An analysis of his recent publications reveals a strong trend toward memory and resource management innovations in cloud-native systems. His work explores tiered memory architectures, secure container deployment, preemptive multitasking for deep learning, and efficient packet processing in container networks. These efforts reflect a consistent focus on optimizing system-level performance, security, and scalability in modern data centers. Scientific Awards: NSF CAREER Award (2019) Best Paper Award, APSys (2016) Best Paper Award, ICAC (2013) Best Paper Nomination, HPCA (2013) Best Paper Nomination, HPDC (2013) Best Paper Award, Middleware (2021) Researcher of the Year, UCCS (2014) Dr. Rao actively advises students and serves on dissertation and thesis committees for numerous Ph.D. and Master’s candidates. He leads federally funded research projects supported by the National Science Foundation, including a major CAREER grant on virtualized architectures and collaborative big data initiatives. His research has been sponsored by NSF, IEEE, and Intel Corporation, reflecting strong industry and academic collaboration. He leads and contributes to major research labs and teams focused on cloud systems, operating systems, and performance optimization. His team has produced high-impact work in top-tier venues such as OSDI, SOSP, ATC, EuroSys, and ICDCS. Current and future work includes next-generation memory architectures using CXL, intelligent resource provisioning, and resilient container networking.

Jasmin Jahicمشاهده پروفایل

پژوهشگر

• Concurrent Computing
• Software Engineering
• Embedded Systems
• +۳ مورد دیگر

Jasmin Jahic is a Researcher at the Computer Architecture Group of the University of Cambridge, working under Timothy M. Jones. She holds a PhD in 'Supervised Testing of Embedded Concurrent Software' from the University of Kaiserslautern (2020) and has extensive experience as a researcher and project manager at the Fraunhofer Institute for Experimental Software Engineering. Her research focuses on concurrency in embedded systems, software engineering, AI integration, and low-power systems. Education: PhD in Computer Science from the University of Kaiserslautern (2020). Prior roles include Project Manager at Fraunhofer IESE and Coordinator of the European Master Program in Software Engineering. Research Interests: Concurrent computing, embedded systems architecture, AI applications in software engineering, and low-power system design. She explores concurrency bugs, synchronization mechanisms, and software architecture evolution in the context of Industry 4.0 and autonomous systems. Professional Activities: Co-Organizer of SAMOS workshops (2018–2021), Reviewer for IEEE/ACM conferences, and contributor to European Strategic Research Agendas for embedded systems. Teaches courses on software architectures for embedded systems and supervises numerous graduate students. Key Contributions: Frameworks like BOSMI for multithreaded software testing, FERA for concurrency bug detection, and research on AI adoption in traditional embedded systems. Active in HiPEAC conferences and industry partnerships.

Sandhya Dwarkadasمشاهده پروفایل

استاد

• Parallel and distributed computing
• Computer architecture
• Compiler/Runtime-Architecture Interaction
• +۵ مورد دیگر

Sandhya Dwarkadas is the Walter N. Munster Professor and Chair of the Department of Computer Science at the University of Virginia. Her research focuses on the intersection of computer hardware and software, particularly in parallel computing, computer architecture, and compiler/runtime-architecture interaction. She holds dual roles as department chair and active researcher, balancing leadership with contributions to energy-efficient and reconfigurable computing systems. Education: B.Tech. in Electrical Engineering, Indian Institute of Technology (1986) M.S. and Ph.D. in Electrical and Computer Engineering, Rice University (1989, 1993) Research interests emphasize parallel and distributed computing architectures, with a focus on energy efficiency, cache coherence, and security in multicore systems. Recent work explores mitigating side-channel attacks via innovations like TimeCache and RollingCache. Her publications span 30+ years, addressing both foundational and applied challenges in computer systems. Awards highlight her impact: ACM and IEEE Fellowships (2018/2017), University of Rochester’s Hajim Award (2020), and AAAS Fellowship (2024). She actively mentors students through courses like CS 6190 and leads interdisciplinary projects like TriForce. Labs/Teams: Her work is anchored in the University of Virginia’s Computer Science Department, collaborating across academia and industry to advance next-generation computing systems.

• Computer Architecture
• Reconfigurable Computing
• Network-on-Chip (NoC)
• +۷ مورد دیگر

Ioannis Sourdis is a Full Professor at the Department of Computer Engineering, Chalmers University of Technology, Sweden. His research focuses on computer architecture, reconfigurable computing, network-on-chip (NoC) design, memory systems, and fault-tolerant embedded systems, with applications in biomedical informatics and hardware security. Current projects include EUMMSS (Efficient Uncore Mechanisms for Multicore Space Systems, funded by the Swedish National Space Board) and eProcessor (European Processor Ecosystem, funded by the European Commission). Past initiatives include the DeSyRe project (on-demand system reliability), ECOSCALE (exascale reconfigurable computing), and SHARCS (secure hardware-software architectures). His work spans NoC router design (e.g., FastTrackNoC, DDRNoC), memory compression (MemSZ, L2C), and biomedical security applications (heartbeat-based protocols). He has published extensively in venues like DATE, ICS, PACT, and IEEE Transactions on Networking. Key research areas: Chiplet-based systems , hybrid memory architectures , FPGA acceleration , and real-time stream aggregation .

Roberto Giorgiمشاهده پروفایل

دانشیار

• Computer Architecture
• Multiprocessor Systems
• Multicore Architectures
• +۶ مورد دیگر

Roberto Giorgi is an Associate Professor of Computer Engineering at the Department of Information Engineering, University of Siena, Italy. He has held this position since October 1, 2006, following his tenure as an Assistant Professor since March 15, 1999. His educational background includes a Ph.D. in Computer Engineering from the University of Pisa (1999) with a thesis on coherence protocols for shared-memory multiprocessors, and an Electronic Engineering degree (1995) with a thesis on trace-driven performance evaluation of multiprocessors. Giorgi's primary research focuses on Computer Architecture , particularly on multiprocessor/multicore issues including processor design, coherence protocols, programmability, and energy efficiency. His work spans both theoretical and practical aspects of computer architecture, with emphasis on real-world implementations and educational tools. He has coordinated significant EU-funded projects including AXIOM (2014-2018) on Smart Cyber-Physical Systems and TERAFLUX (2009-2014) on Many-Cores. His recent publications (2022-2025) demonstrate a strong progression toward practical applications of computer architecture research, with particular emphasis on RISC-V architecture, FPGA-based acceleration, dataflow computing models (especially DF-Threads), and graph processing. Many of his papers address educational tools for computer architecture education, real-time object detection on embedded platforms, and novel execution paradigms for edge computing and HPC. IEEE Senior Member ACM Lifetime Member Coordinator of EU-funded AXIOM project (2014-2018) on Smart Cyber-Physical Systems Coordinator of EU-funded TERAFLUX project (2009-2014) on Many-Cores Giorgi has been actively involved in securing research funding and building collaborations, particularly in high-performance computer architecture research with emphasis on scalable architectures and embedded systems. He leads the Computer Architecture Lab (ROOM 223) at the University of Siena, which was established in 2007, and has been instrumental in developing practical implementations of architectural concepts including the AXIOM platform for cyber-physical systems.

• Embedded Systems
• Compilers
• Hardware-Software Co-Design
• +۵ مورد دیگر

Prof. Dr. rer. nat. Rainer Leupers is a faculty member at RWTH Aachen University, chairing the Department of Software for Systems on Silicon. His research focuses on embedded systems, hardware-software co-design, virtual prototyping, and security in computing-in-memory architectures. He has published extensively on RRAM accelerators, logic locking, and neuromorphic security. Chair of Software for Systems on Silicon Research in hardware security and deep learning accelerators Recent publications on cross-tool virtual frameworks and thermal side-channel attacks His work bridges system-level modeling with practical security implementations, emphasizing reliability and performance in heterogeneous computing environments. Key trends in his 2025-2023 articles include compute-in-memory optimization, neural network inference efficiency, and security vulnerabilities in emerging hardware. Awards and formal recognitions are not explicitly detailed in the provided materials. He has not directly mentioned advising students or research grants in the given text fragments. The chair's contact information includes an office at ICT Cube 1, Electrical Engineering, Aachen, with direct email and website links.

Sheheeda Mariam Manakkaduمشاهده پروفایل

دانشیار

• Robotics
• Data Analytics
• Machine Learning
• +۴ مورد دیگر

Sheheeda Mariam Manakkadu is an Associate Professor in the Department of Computer Science at Southern Illinois University Carbondale. She teaches graduate courses in Data Structures, Object-Oriented Programming, Data Mining, Text Mining, and Cloud Architecture, along with undergraduate courses in Operating Systems and Data Analytics. Ph.D., Computer Engineering M.E., Biomedical Engineering Her research spans robotics, data analytics, and parallel computing. Key areas include adaptive control of robotic manipulators, big data processing via MapReduce, IoT resource allocation, and computational bioinformatics for protein networks. Recent publications focus on neuro-sliding mode control, cloud architecture, and scalable recommender systems. She actively participates in academic service as a committee member for graduate courses and the IEEE Erie Section. Her work integrates machine learning, optimization algorithms, and distributed systems across diverse domains.

Nikil Duttمشاهده پروفایل

استاد

• Embedded Systems
• Electronic Design Automation
• Computer Architecture
• +۶ مورد دیگر

Nikil Dutt is a Chancellor’s Professor at the University of California, Irvine (UCI), with academic appointments in Computer Science, Electrical Engineering and Computer Science (EECS), and Cognitive Sciences. He is affiliated with UCI's Center for Embedded Computer Systems (CECS), Center for Cognitive Neuroscience and Engineering (CENCE), Calit2, CPCC, and LUCI. His research focuses on embedded systems, electronic design automation, computer architecture, and healthcare IoT. Dutt has authored/co-authored seven books and holds IEEE Fellow and ACM Distinguished Scientist titles. Education: B.E. (Mechanical Engineering) from Birla Institute of Technology and Science (Pilani, India), 1980; M.S. (Computer Science) from Pennsylvania State University, 1983; Ph.D. (Computer Science) from University of Illinois at Urbana-Champaign, 1989. Research Interests: Embedded systems, brain-inspired architectures, neuromorphic computing, and healthcare IoT. Current projects include the Information Processing Factory (IPF) for autonomous systems and CareDex for disaster resilience in aging communities. Awards: Multiple Best Paper Awards, NSF grants, and fellowships. Serves as editor for ACM TECS, IEEE TVLSI, and former Editor-in-Chief of ACM TODAES. Active in academic service, including ESWEEK Steering Committee roles. Grants: NSF IPF, UNITE, CareDex, and industry partnerships (e.g., Facebook). Research addresses energy-efficient data centers, autonomous driving systems, and wearable health technologies. Labs/Teams: Leads the Dutt Research Group (DRG), focusing on self-aware systems, edge computing, and neuromorphic architectures.