Kyprianos Papadimitriou is a Researcher at the Microprocessor and Hardware Laboratory within the School of Electrical and Computer Engineering at the Technical University of Crete . He holds a PhD in Electronic and Computer Engineering (2012) and has been involved in teaching laboratory courses such as Logic Design , Computer Architecture , and VLSI/ASIC Circuit Design . Research Areas : His work spans Reconfigurable Systems , Hardware Design , Computer Architecture , RFID Systems , and Real-Time Systems . He has developed innovative approaches in FPGA-based dynamic reconfiguration, MPSoC security, and 3D stereo vision for surveillance. Key Trends : Runtime reconfiguration for FPGAs Security frameworks for NoC-based MPSoCs Low-cost embedded vision systems Optimization of reconfiguration overhead Hardware task scheduling methodologies Genetic algorithm implementations on FPGAs Scientific Contributions : 1 USA patent (2005) Co-author of VLSI-SoC 2013 paper nominated for 1st Prize Active member of scientific committees (FPL, ReConFig) Peer reviewer for IEEE, Elsevier, and Springer journals Session chair at IEEE CNS and HPCC conferences Grants & Projects : Participated in competitive European and national programs, serving as scientific manager, coordinator, and technical coordinator. Developed spin-off company (2003-2005) to commercialize master's thesis research. Laboratory & Teaching : Affiliated with the Microprocessor and Hardware Laboratory , focusing on practical training in digital systems, processor-based systems, and VLSI design.
Scott Mahlke is a Professor and Associate Chair in the Electrical Engineering and Computer Science Department at the University of Michigan. He is affiliated with the Advanced Computer Architecture Laboratory and the Software Systems Laboratory, where he leads the Compilers Creating Custom Processors (CCCP) research group. His research focuses on compilers, computer architecture, and high-level synthesis, with particular emphasis on designing next-generation computer systems that overcome challenges in performance, power consumption, and reliability. His work bridges the gap between hardware and software through innovative compiler technology that enables customized processors and accelerators. Mahlke's publications demonstrate a strong focus on compiler techniques for exploiting instruction-level parallelism, memory system optimization, and application-specific processor design. His research spans from fundamental compiler algorithms to practical implementations in both general-purpose and embedded systems. National Science Foundation CAREER Award (2003) Morris Wellman Faculty Development Assistant Professor (2004) 2006 ISCA Most Influential Paper Award Multiple best paper awards at major architecture conferences As an advisor, Mahlke has chaired numerous Ph.D. dissertations and actively mentors graduate students in the CCCP group. His research is generously funded by the National Science Foundation, Gigascale Systems Research Center, ARM Ltd., Samsung Advanced Institute of Technology, and other major organizations. The CCCP group maintains strong industry partnerships that facilitate the transfer of research innovations to practical applications.
Jovan Stojkovic is an incoming Assistant Professor at the Department of Computer Science at the University of Texas at Austin, set to join in Fall 2026. Prior to his appointment at UT Austin, he will spend a year at Meta working with the AI and Systems Co-design group. His research focuses on cloud computing and datacenters, with particular emphasis on cloud-native workloads and machine learning inference. Education: PhD in Computer Science from the University of Illinois at Urbana-Champaign, advised by Professor Josep Torrellas Undergraduate studies at the School of Electrical Engineering, University of Belgrade, Serbia, where he was recognized as the best student of the Computer Engineering and Information Theory Department every year from 2017-2020 Research Interests: Jovan's research focuses on cloud computing and datacenters , with two primary domains: Cloud-native workloads , such as microservices and serverless computing. He investigates how to co-design novel hardware platforms and software systems that deliver orders-of-magnitude improvements in performance, energy efficiency, and resource utilization for these emerging workloads. Machine Learning (ML) inference , particularly large language models (LLMs). His work addresses the challenges of ML inference through smart scheduling, workload placement, and system-level configuration tuning to reduce energy, power, and thermal overheads while maintaining performance and accuracy guarantees. Publication Trends: Jovan's publications demonstrate a strong focus on optimizing cloud infrastructure for emerging workloads. His research spans across serverless computing, microservices, and large language model inference. A clear trend emerges in his work: addressing the performance, energy efficiency, and resource utilization challenges of modern cloud workloads through innovative hardware-software co-design approaches. His most recent work shows increasing focus on LLM inference optimization, particularly in the areas of thermal management, power efficiency, and scheduling for many-adapter environments. Awards and Honors: HPCA Best Paper Award (2025) IEEE MICRO Top Picks Honorable Mention (2024) 6 patents with IBM and Microsoft on: Serverless systems, Processor overclocking in the cloud, and Energy-efficient LLM inference W. J. Poppelbaum Memorial Award (2025) for hardware and architecture innovation Mavis Future Faculty Fellowship (2024–2025) Invited to present at 11th Heidelberg Laureate Forum (2024) Kenichi Miura Award (2022) for excellence in High Performance Computing Multiple student travel grants to ISCA, MICRO, ASPLOS, and HPCA Advising and Grants: Jovan is actively seeking prospective PhD students for his research group at UT Austin. His research has been supported through collaborations with major tech companies including IBM, Microsoft, and Meta. His six patents with IBM and Microsoft demonstrate the practical impact of his research in serverless systems, processor overclocking, and energy-efficient LLM inference. His work on serverless computing (MXFaaS, EcoFaaS) and LLM inference optimization has received significant recognition in top-tier computer architecture conferences. Research Groups: During his PhD at UIUC, Jovan worked with Professor Josep Torrellas on cloud infrastructure research. He has collaborated extensively with researchers at IBM Research (particularly Hubertus Franke) and Microsoft (particularly Íñigo Goiri and Ricardo Bianchini). His upcoming position at UT Austin will establish his independent research group focused on cloud computing and datacenter systems. His year at Meta working with the AI and Systems Co-design group will further strengthen his expertise in AI infrastructure.
Brandon Lucia is a Full Professor in the Department of Electrical and Computer Engineering at Carnegie Mellon University's College of Engineering. He leads the abstract research group focusing on the intersection of computer architecture, systems, and programming languages. His work bridges theoretical foundations with practical implementations in energy-constrained environments. Lucia's research centers on intermittent computing systems and edge computing in extreme environments. His work on energy-harvesting systems has established fundamental principles for batteryless computing, while his orbital edge computing research pioneers computational intelligence for nanosatellite constellations. These research thrusts address critical challenges in reliability, efficiency, and programmability for systems operating under severe power constraints. His publication record shows a clear evolution from foundational work on intermittent computing models to sophisticated applications in space computing and edge intelligence. Recent publications demonstrate increasing integration of dataflow architectures with energy-harvesting constraints, particularly in satellite constellations where computational resources must be managed across distributed, power-constrained platforms operating in extreme environments. NSF CAREER Award (2017) IEEE TCCA Young Computer Architect Award (2019) Sloan Foundation Fellowship (2021) ASPLOS Best Paper Awards (2018, 2020) OOPSLA Distinguished Paper and Artifact Awards (2015) Lucia actively mentors numerous PhD students including Brad Denby, Zhuo Cheng, and Emily Ruppel, many of whom contribute significantly to his research program. His abstract research group maintains strong industry connections while pursuing fundamental advances in computing systems. The group has developed multiple open-source tools including Legerdemain for program analysis and MultiCacheSim for cache coherence simulation. His laboratory work spans from theoretical foundations of intermittent computing to practical implementations in space systems. Current projects include computational nanosatellite constellations, energy-minimal dataflow architectures, and secure edge computing systems that operate reliably despite frequent power failures.
Labros Bisdounis is a Professor at the Department of Electrical and Computer Engineering, University of the Peloponnese, Greece. He previously held positions at the Technological Educational Institute of Western Greece, including Associate Professor, Full Professor, and Dean of the School of Technological Applications (2016–2018). He has extensive industry experience as a senior research engineer and project manager at Intracom S.A. (2000–2008), focusing on VLSI circuits and telecom applications. His research interests include CMOS circuit timing/power modeling, low-power/high-speed design, MOSFET modeling, and sensor applications. He has authored over 30 papers with 740+ citations and is an IEEE member. Education: Diploma in Electrical Engineering (1992), University of Patras Ph.D. in Electrical Engineering (1999), University of Patras Research Interests: CMOS circuit timing and power dissipation modeling Deep-submicron/nano-CMOS circuit design MOSFET device modeling Low-power embedded systems and SoC Sensor applications and organic electronics Leadership Roles: Dean of the School of Engineering, University of the Peloponnese (2023–present) Director of Training & Lifelong Learning Centre (2019–2019) Board Member, Hellenic NARIC (2016–2019) Collaborations: Active at the Hellenic Open University as a tutor in Computer Architecture and Digital Systems modules. Co-developed the AETHER framework for pervasive computing and contributed to energy-aware SoC designs for 5 GHz WLANs.
Professor Dollas Apostolos serves as a Professor in the School of Electrical and Computer Engineering at the Technical University of Crete (TUC), where he has held leadership roles such as Department Chairman. He directs the Microprocessor and Hardware Laboratory, focusing on reconfigurable computing, embedded systems, and high-performance digital systems. His work emphasizes rapid prototyping and real-world implementation of computational solutions. Education: Ph.D., Computer Science, University of Illinois at Urbana-Champaign (1987) M.Sc., Computer Science, University of Illinois at Urbana-Champaign (1984) B.Sc., Computer Science, University of Illinois at Urbana-Champaign (1982) Research Interests: Reconfigurable computing architectures FPGA-based acceleration for bioinformatics and genomics Embedded systems and real-time processing Hardware-software co-design for high-performance computing His research bridges theoretical innovation with practical applications, such as FPGA implementations for genome assembly and aquaculture monitoring systems. Publications: Recent work highlights FPGA-based solutions for bioinformatics (e.g., genome assembly acceleration), real-time embedded systems (e.g., fish cage net monitoring), and scalable data processing frameworks. His articles often explore the intersection of FPGA technology with computational biology, embedded vision, and distributed systems. Awards and Affiliations: Senior Member, IEEE and IEEE Computer Society Recipient of IEEE Computer Society Golden Core and Meritorious Service Awards Twice honored with the University of Illinois Teaching Excellence Award He is a co-founder of IEEE conferences like FCCM and RSP, reflecting his leadership in the reconfigurable computing community. Teaching and Labs: Teaches courses on computer architecture, logic design, and VLSI design. The Microprocessor and Hardware Lab under his direction drives advancements in FPGA-based systems, with projects ranging from bioinformatics hardware accelerators to embedded vision systems.
Andy D. Pimentel is a Full Professor at the University of Amsterdam, where he chairs the Parallel Computing Systems (PCS) group within the Systems and Networking Lab at the Informatics Institute. His work focuses on the design, programming, and run-time management of multi-core and multi-processor computer systems, with particular attention to performance, power/energy consumption, system dependability, and design productivity. His academic background includes: PhD in Computer Science, 1998, University of Amsterdam MSc in Computer Science, 1993, University of Amsterdam Professor Pimentel's research spans multiple critical areas in modern computing systems. His primary interests include multi-core embedded systems, system-level design and simulation, design space exploration, performance and power analysis, system dependability, hardware/software co-design, run-time resource management, and Edge AI. His work addresses the growing challenges of making computer systems faster, more sustainable, energy efficient, reliable, and secure in an era of increasing computational demands and climate concerns. The PCS group he leads performs research on the modeling, analysis and optimization of extra-functional aspects of computing systems, which play a pivotal role in their work. An analysis of Professor Pimentel's recent publications reveals a strong focus on edge computing, distributed AI, and energy-efficient system design. His work bridges theoretical computer architecture with practical implementation challenges, particularly in the context of resource-constrained environments. Key trends include the adaptation of AI models for edge devices, thermal management in advanced architectures, and optimization of multi-core systems for both performance and energy efficiency. His research increasingly addresses sustainability concerns in computing, reflecting broader industry and academic priorities. His notable scientific achievements include: IEEE CEDA Outstanding Service Recognition Award DATE Fellow Award Professor Pimentel has served in numerous leadership roles in the academic community, including as General Chair of Design Automation and Test in Europe (DATE) 2024, Vice General Chair of IEEE/ACM Embedded Systems Week 2025, and General Chair of IEEE/ACM Embedded Systems Week 2026. He has secured significant research funding for projects related to sustainable computing, edge AI, and multi-core system design. His professional service includes board membership with the ICT Research Platform Nederland (IPN) since 2020 and leadership roles in major conferences such as DATE, Embedded Systems Week, and SAMOS. The Parallel Computing Systems group he chairs is a vibrant research team within the Systems and Networking Lab at the Informatics Institute. The PCS group focuses on the challenges of modern computing systems, particularly addressing the extra-functional aspects like performance, power consumption, and system dependability. Their work is highly relevant to current technological challenges in edge computing, sustainable systems design, and the integration of AI into resource-constrained environments.
Georgios Keramidas is an Assistant Professor in Computer Architecture at the Department of Informatics, Aristotle University of Thessaloniki . He also holds an Adjunct Professor position at the Hellenic Open University and collaborates with institutions like the University of Peloponnese and University of Patras . Research Interests : Computer Architecture, Memory Systems, Multicore/GPU Design, Low-Power Techniques, Fault-Tolerant Systems His work focuses on cache optimization , energy-efficient computing , and security-aware memory design . Key contributions include DVFS frameworks , reuse-distance prediction , and non-deterministic cache mechanisms . Recent article trends highlight innovations in computation-in-memory , IoT platform components , and security/low-power co-design . Patents on image compression and GPU optimization reflect practical applications of his research. Academic Network : Collaborates with institutions including University of Patras , University of Manchester , and TU Dresden
Georgios Manis is an Associate Professor in the Department of Computer Science and Engineering at the School of Engineering, University of Ioannina, Greece. He holds a PhD from the National Technical University of Athens and has been a faculty member at the University of Ioannina since 2002, progressing from Lecturer to Associate Professor in 2018. He has also served as temporary teaching staff at the University of Patras, University of Crete, and University of Ioannina in the late 1990s and early 2000s. Education: B.Sc. in Computer Engineering (Diploma), National Technical University of Athens (NTUA), 1987–1992 MSc in Advanced Methods in Computer Science (Distributed and Parallel Systems), Queen Mary, University of London, 1992–1993 PhD in Computer Engineering, NTUA, School of Electrical and Computer Engineering, 1993–1997 His research interests lie at the intersection of Biomedical Engineering and Computing Systems , with a strong emphasis on Biomedical Signal Processing , Entropy Analysis , and Machine Learning . He has pioneered work in Bubble Entropy —a parameter-free entropy measure—and developed fast algorithms for entropy computation. His work also extends to compiler design and parallel computing, particularly in the automatic parallelization of recursive functions and loops. The trends in his recent publications reflect a dual focus: (1) biomedical applications involving entropy, heart rate analysis, and disease diagnosis using machine learning (especially Random Forests and SVMs), and (2) high-performance computing, including parallelization techniques and compiler optimizations for multi-core and SVP architectures. His research is highly interdisciplinary, combining signal processing, algorithm design, and clinical applications. Scientific Leadership and Recognition: Guest Editor, Special Issue on “Entropy in Biomedical Engineering”, Entropy (MDPI) Member of the IPAN Laboratory, University of Ioannina Active contributor to IEEE, Elsevier, and MDPI journals He has supervised several graduate students and is involved in funded research projects such as Palimpsest and Homore , focusing on smart systems for cultural interaction and elderly monitoring. His advising contributions are evident in co-authored papers with students like Evanthia Tripoliti and Aristeidis Mastoras. He teaches both undergraduate and postgraduate courses, including Compilers I/II and Biomedical Data Analysis . Laboratories and Teams: He is a member of the IPAN lab at the University of Ioannina, which supports interdisciplinary research in informatics and biomedical applications. His collaborative network includes researchers from Greece and abroad, particularly in the fields of biomedical signal analysis and entropy-based methods.
Karakostas Vasileios is an Assistant Professor at the Department of Informatics and Telecommunications of the National and Kapodistrian University of Athens. His research focuses on computer architecture, cloud computing, and energy-efficient hardware systems. He specializes in areas such as RISC-V processors, virtual memory systems, and hardware security. Vasileios leads projects like NEUROPULS (neuromorphic secure accelerators) and Vitamin-V (RISC-V-based cloud infrastructure validation). His work emphasizes resilience analysis, performance optimization, and trustworthy development frameworks. Education and employment details are not explicitly provided in the source text, but his extensive publication record since 2011 demonstrates continuous academic engagement. Key research trends include: Memory systems optimization (e.g., TLB hierarchies, elastic translations) GPU and SoC fault tolerance analysis Cloud resource management (ACTiCLOUD, DAPHNE runtime) Open-source hardware validation (Vitamin-V project) Notable contributions include the Gem5-marvel simulator for heterogeneous architectures and BypassD for SSD access acceleration. His work bridges theoretical computer architecture with practical cloud and embedded system applications.
Manolis G.H. Katevenis is a Professor at the Department of Computer Science, University of Crete, and the founder and Head of the Computer Architecture and VLSI Systems (CARV) Laboratory at the Institute of Computer Science (ICS), Foundation for Research and Technology – Hellas (FORTH) in Heraklion, Crete, Greece. He has held academic positions since 1986 and played a pivotal role in establishing the Computer Science Department at the University of Crete. His research spans computer architecture, interconnection networks, VLSI systems, and high-performance computing, with a strong focus on scalable, low-power, manycore systems and RISC-V. He has led numerous European R&D initiatives, including serving as Coordinator of the ExaNeSt project. PhD in Computer Science, University of California, Berkeley (1983) MSc in Electrical Engineering and Computer Science, University of California, Berkeley (1980) Diploma of Electrical Engineering, National Technical University of Athens (1978) Manolis Katevenis's research focuses on advancing scalable system architectures for high-performance and big data computing. His work in computer architecture includes RISC-V, exascale computing, and manycore systems. He has made foundational contributions to interprocessor communication, particularly through remote-write, remote-DMA, and remote-enqueue mechanisms, and has pioneered innovations in interconnection networks and low-latency network interfaces. His research integrates hardware and software co-design to optimize performance, energy efficiency, and scalability in large-scale computing systems. The recent publications highlight a strong trend in exascale computing, interconnection networks, and FPGA-based prototyping of manycore systems. His work emphasizes scalable, low-power architectures, with recurring themes in congestion management, fair scheduling, crossbar design, and hardware-software integration for HPC. The articles span high-impact journals such as IEEE/ACM Transactions on Networking, IEEE Micro, and Computer Networks, reflecting sustained contributions to computer architecture and networking. ACM Doctoral Dissertation Award (1984) David J. Sakrison Memorial Prize (1983) IBM PhD Fellowship (1981–1983) Greek State Fellowship (1973–1978) Stelios Pichoridis Award for Outstanding University Teaching (2015) Member of Academia Europaea (elected 2012) Award by the Secretary General of the Region of Crete (2003) IEEE Milestone recognition for the RISC Project (2015) Manolis Katevenis has supervised over 50 graduate theses and mentored many prominent Greek computer architects, including recipients of the ACM Maurice Wilkes Award. He has served as Principal Investigator or co-PI in over 30 R&D projects with a total budget exceeding 18 million euros, including major European initiatives such as ExaNeSt (which he coordinated), EuroEXA, EcoScale, SARC, ENCORE, and multiple HiPEAC Network of Excellence projects. His leadership extends to project coordination, architectural design, FPGA prototyping, and systems software development. Katevenis founded and leads the CARV Laboratory at FORTH-ICS, a major research team with 80–100 members focused on computer architecture and VLSI systems. The lab has spun off the Distributed Computing Systems (DCS) Laboratory and is central to European exascale computing efforts, including participation in the European Processor Initiative. CARV has developed large-scale prototypes such as the 768-core ExaNeSt system and the Formic FPGA platform for manycore research.
Sotirios Xydis is an Assistant Professor in the Division of Computer Science at the School of Electrical and Computer Engineering, National Technical University of Athens (NTUA), with prior faculty appointment at Harokopion University of Athens (2020-2023). He maintains ongoing collaboration with the Institute of Communication and Computer Systems (ICCS) since 2014 and previously served as an engineer at HEDNO (2015-2018) and postdoctoral researcher at Politecnico di Milano (2011-2013). His academic credentials include: BSc in Electrical and Computer Engineering, NTUA (2005) MSc in Techno-Economic Systems, NTUA (2011) PhD in Electrical and Computer Engineering, NTUA (2011) Dr. Xydis specializes in hardware/software co-design , energy-efficient hardware acceleration , and memory management for embedded and cloud-edge systems. His research bridges low-power circuit design , heterogeneous architecture optimization , and resource management frameworks , with particular emphasis on AI workloads and serverless infrastructures. Current projects target Edge AI accelerators (CONVOLVE), disaggregated memory systems, and LLM inference optimization through hardware-aware algorithms. Analysis of his 2023-2025 publications reveals three dominant trends: (1) Energy-efficient hardware accelerators for Edge AI using approximate computing techniques, (2) Memory/resource management innovations for disaggregated serverless environments, and (3) GPU/FPGA optimization for LLM inference through dynamic frequency scaling and predictive throttling. These works consistently address the power-performance tradeoffs in heterogeneous computing systems. His scientific recognition includes: Best Paper Award, IEEE/NASA/ESA AHS (2007) Best Paper Award, ACM PARMA (2013) Best Paper Award, ACM Computing Frontiers (2020) Hipeac Award at DAC (2019, 2020) Dr. Xydis has secured over 15 European/national research grants as Principal Investigator and Technical Coordinator, focusing on hardware acceleration frameworks and energy-efficient computing. His advising encompasses graduate research in hardware design and optimization, though specific student names aren't publicly listed. Current projects include CONVOLVE for Edge AI and CollectiveHLS for collaborative hardware synthesis. He is a core member of NTUA's Microelectronics Laboratory (Microlab) and collaborates with ICCS on hardware acceleration projects. His team develops frameworks like CollectiveHLS and throttLL'eM, with active participation in DATE, DAC, and ISCA conference communities.
Adrian Sampson is an Associate Professor in the Department of Computer Science at Cornell University, where he is part of the Computer Systems Laboratory and the programming languages group. He joined Cornell in 2016 as an Assistant Professor and was promoted to Associate Professor in 2022. Prior to Cornell, he was a Visiting Researcher at Microsoft Research (2015-2016). He received his Ph.D. from the University of Washington in 2015 under advisors Luis Ceze and Dan Grossman, with a dissertation on Hardware and Software for Approximate Computing. His research focuses on breaking down abstraction barriers and rethinking the hardware-software interface. He is particularly known for his work on approximate computing, which explores how computers can be more efficient by allowing them to make controlled mistakes. He leads the Capra research group at Cornell, which investigates programming languages and computer architecture. Sampson's recent publications demonstrate a strong focus on hardware acceleration, FPGA programming, compiler design, and programming language theory. His work often bridges the gap between high-level programming abstractions and low-level hardware implementation, with particular attention to predictability, verification, and energy efficiency. He has made significant contributions to geometry types for graphics programming, timeline types for modular hardware design, and virtual machines for FPGA programming. Among his notable recognitions are the IEEE TCCA Young Computer Architect Award (2021), NSF CAREER award (2019), and multiple Distinguished Artifact Awards at major conferences. He has advised numerous Ph.D. students who have gone on to positions at institutions like Wellesley College, Northwestern University, and Amazon. Sampson is actively involved in academic service, serving on program committees for major conferences including PLDI, ASPLOS, and ISCA. He has also held leadership roles such as ACM SIGARCH Board of Directors (2023-2025) and SIGPLAN Information Director. His teaching at Cornell includes courses on computer systems, programming languages, and advanced compilers.
Marco Guarnieri is an Associate Professor at the IMDEA Software Institute in Spain, where he leads research at the intersection of security, programming languages, and computer architecture. Prior to his current position, he completed his Ph.D. in Computer Science at the Institute of Information Security at ETH Zurich in 2017. His educational background includes: PhD in Computer Science, 2017, ETH Zurich MSc in Computer Engineering, 2012, Università degli Studi di Bergamo BSc in Computer Engineering, 2010, Università degli Studi di Bergamo Dr. Guarnieri's research spans multiple security domains with particular focus on: Security at the hardware-software boundary Microarchitectural side-channel attacks and countermeasures Database security and access control Formal methods for security verification Secure compilation and information flow control His publication record shows consistent contributions to microarchitectural security, especially regarding speculative execution vulnerabilities and hardware-software leakage contracts, combining theoretical foundations with practical implementations that have advanced secure systems design. Dr. Guarnieri has received significant recognition for his research: Distinguished paper award at CCS 2024 Distinguished paper award at CCS 2023 Distinguished paper award at CCS 2022 Best paper award at S&P 2021 He actively contributes to the research community through conference organization and program committees for PLDI, POPL, and other top venues. Dr. Guarnieri maintains an active research group at IMDEA Software Institute and is currently seeking talented researchers to work on security at the hardware-software interface.
Vassilis Papaefstathiou serves as Assistant Professor in the Computer Science Department at the University of Crete, Greece, and holds an Affiliated Researcher position at the Computer Architecture and VLSI Systems Laboratory within FORTH's Institute of Computer Science in Heraklion, Crete. His research spans critical domains in computing systems including Computer Architecture, High-Performance Computing, Packet Switch Architectures, High Speed Interconnects, Network Processing Architectures, Hardware Security, Storage Systems, and Embedded Systems, with emphasis on hardware-level innovations for performance and security. Dr. Papaefstathiou teaches core courses such as Digital Circuits Lab (CS220), Computer Systems Architecture (CS425), and Digital Circuits Design Lab using EDA Tools (CS523). He leads FORTH's contributions to the EU-funded European Processor Initiative (EPI) project, coordinating hardware RTL design, chip bring-up, and testing for next-generation processor development.
