جستجوی استاد راهنمای دانشگاهی

Debjit Pal is a Post-Doctoral Associate at the School of Electrical and Computer Engineering, Cornell University, and a member of the Computer Systems Laboratory. His research focuses on machine learning techniques for hardware verification, SoC validation, and FPGA optimization. Education: Ph.D. in Computer Engineering (University of Illinois at Urbana-Champaign, 2019) M.S. in Computer Science (IIT Kharagpur, 2012) B.E. in Electronics Engineering (Jadavpur University, 2008) Research Interests: Machine Learning for Electronic Design Automation (EDA) System-on-Chip (SoC) Verification Edge Intelligence as a Service Compiler Optimizations for Reconfigurable and High-Performance Computing Scientific Awards: IEEE CEDA Student Research Award (2016) Best Paper Nomination (ICCAD 2015, DAC 2018, ASP-DAC 2019) E. J. McCluskey Best Doctoral Thesis Competition Semi-Finalist (2020) Travel Grants for ICCAD/DAC/ASPDAC (2018-2019) Professional Roles: Technical Program Committee Member (DAC, VLSID), Reviewer (IEEE TVLSI, DATE, ICCAD). Collaborates with researchers like Zhiru Zhang and Shobha Vasudevan.

• Machine Learning for Electronic Design Automation (EDA)
• System-on-Chip (SoC) Verification
• Hardware Verification
• +۶ مورد دیگر

Nicola Nicolici is a Professor in the Department of Electrical and Computer Engineering at McMaster University. His research focuses on methods and algorithms for the design of digital integrated circuits and systems, with significant contributions in manufacturing test, post-silicon validation and debug. His work has expanded to include embedded systems, low-energy computing, and custom hardware-accelerated computing systems. Professor Nicolici's research interests span multiple areas of digital system design and validation. His early work focused on manufacturing test methodologies and power-aware testing strategies for integrated circuits. More recently, he has made significant contributions to post-silicon validation techniques, including constrained-random stimuli generation, trace signal selection, and bit-flip detection. His research has evolved to address emerging challenges in embedded computing systems, low-energy design, and specialized hardware acceleration for various applications including deep neural networks and signal processing. His recent publications reveal a strong trend toward hardware acceleration for specialized computing tasks. The research spans matrix multiplication algorithms (Strassen and Karatsuba), memory system optimization (DDR5 calibration), FPGA-based radar processing, and neural network acceleration. His work consistently bridges theoretical algorithm development with practical hardware implementation considerations, particularly focusing on precision analysis, fault tolerance, and energy efficiency. The research demonstrates a clear progression from traditional digital circuit testing to more complex system-level validation and acceleration techniques. Professor Nicolici has been actively involved in teaching courses related to system-on-chip design and test, digital systems, and embedded systems. His teaching portfolio includes advanced courses such as System-on-Chip (SOC) Design and Test and Digital Systems Design , reflecting his expertise in the field. While specific grant information isn't detailed in the provided text, his extensive publication record suggests ongoing research funding support. His research has contributed significantly to the fields of digital circuit testing, post-silicon validation, and hardware acceleration. The work has practical applications in semiconductor manufacturing, embedded systems design, and specialized computing architectures. His recent focus on neural network acceleration and memory system optimization reflects the evolving landscape of computer architecture research.

• Digital Integrated Circuit Design
• Hardware Testing
• Post-Silicon Validation
• +۷ مورد دیگر

Azadeh Davoodi is a Vilas Distinguished Achievement Professor and Associate Chair of Undergraduate Studies in the Department of Electrical and Computer Engineering at the University of Wisconsin-Madison. Her research focuses on Electronic Design Automation (EDA), integrated circuit debug, and machine learning applications in VLSI design. She holds editorial roles in journals like IEEE TCAD and ACM TRETS, and has chaired major conferences such as ISPD 2015 and served on technical program committees for DAC, ICCAD, and others. Education: PhD in Electrical Engineering, University of Maryland-College Park (2006) Research Interests: Machine learning for VLSI chip design VLSI design automation for machine learning IC-CAD for emerging nanotechnologies Hardware security Recent Research Trends: Her work bridges machine learning and hardware design, with publications on neural network optimization, distributed inference, and explainable AI for circuit design. She emphasizes energy-efficient CNNs, latency reduction in edge computing, and security in split manufacturing. Awards: 2025 DATE Best Paper Candidate 2024 Vilas Distinguished Achievement Professor 2015 ACM Best Paper Award 2011 NSF CAREER Award Service and Grants: Leads NSF-funded projects on explainable ML for CAD and holds grants for distributed neural network synthesis. Her service includes roles as IEEE HKN member and editorial board positions. Labs/Teams: Engages in interdisciplinary research teams at UW-Madison, focusing on EDA innovation and hardware-software co-design.

• Electronic Design Automation (EDA)
• Integrated Circuit Design
• Machine Learning in Hardware
• +۵ مورد دیگر

Wen-Ben Jone is an Associate Professor at the University of Cincinnati 's Department of Electrical Engineering & Computing Systems. He previously held positions as Assistant/Associate Professor at New Mexico Institute of Mining and Technology and Visiting Associate/Full Professor at National Chung-Cheng University, Taiwan. His research focuses on VLSI system design, low-power circuits, and fault-tolerant testing methodologies. He has advised over 70 graduate students and authored/co-authored numerous papers in top-tier journals and conferences. Education : PhD: Case Western Reserve University (Computer Engineering, 1987) MS: National Chao-Tung University (Computer Engineering, 1981) BS: National Chao-Tung University (Computer Science, 1979) Research Interests : Reliable VLSI design and testing Low-power and fault-tolerant circuits Many-core processor architectures Parallel computing and debugging tools Awards : 2003 IEEE Donald G. Fink Prize Paper Award 2008 Best Paper Award (International Symposium on Low-Power Electronics) 2012 Best Paper Award (VLSI Design, Automation & Test) Grants : $390k NSF Grant (CCF-0541103) for cache optimization techniques His work emphasizes practical solutions in VLSI testing and reliability, with a focus on low-power strategies and resilient system design.

• VLSI system design
• low-power VLSI systems
• many-core micro-processor design
• +۳ مورد دیگر

Alan Hu is a Professor in the Department of Computer Science at the University of British Columbia (UBC), part of the Faculty of Science. His research focuses on formal verification, algorithms, computer architecture, and electronic design automation. He teaches courses such as Intermediate Algorithm Design and Analysis (CPSC 320) and Introduction to Formal Verification and Analysis (CPSC 513). Dr. Hu has received notable awards, including the IEEE Council on Electronic Design Automation Outstanding Service Award and the IBM Faculty Award. His work emphasizes scalable verification techniques, SAT-based algorithms, and optimization in cloud computing and hardware systems. His research spans formal methods for hardware/software systems, including verification of embedded software, cache coherence, and network function virtualization. Notable contributions include advancements in SAT modulo theories, data race detection in heterogeneous systems, and cloud resource allocation frameworks like Cospot. Dr. Hu has been actively involved in teaching and curriculum development, consistently offering courses on algorithms, formal verification, and software design since 2000. His publications reflect a blend of theoretical foundations and practical applications in electronic design, cloud infrastructure, and verification tools. His scientific achievements include innovations in post-silicon validation, emulation-based coverage reduction, and formal analysis for debug trace optimization. He also contributes to the academic community through conference organization and editorial roles in formal verification and computer-aided design.

• Formal Verification
• Algorithms
• Computer Architecture
• +۳ مورد دیگر

Dr. Ranga Vemuri is a Professor in the Department of Electrical and Computer Engineering at the University of Cincinnati since 1989. His research focuses on Hardware Security, VLSI Design, Formal Verification, Reconfigurable Computing, and Electronic Design Automation. He has advised over 40 PhD and 60 MS students, and his work is funded by agencies like AFRL, DARPA, NSF, and industry partners. Education: Ph.D. in Computer Engineering, Case Western Reserve University (1988) M.Tech. in Computer Engineering, Indian Institute of Technology Kharagpur (1984) B.Tech. in Electronics and Communications Engineering, Nagarjuna University (1983) Research Interests: Dr. Vemuri's work spans Hardware Trust and Security , VLSI Design and Architectures , Formal Methods , and Reconfigurable Computing . He pioneers techniques in analog and digital circuit synthesis, FPGA architectures, and leakage-power reduction strategies. His contributions include innovations in post-silicon validation, secure IC design, and side-channel attack mitigation. Grants & Collaborations: He has led over 20 grants totaling millions in funding, including projects on secure system design (SETS), obfuscation of hardware designs, and formal security assertions. Key collaborators include Galois Inc., Air Force Research Laboratory, and EDAptive Computing. Labs & Teams: His research group focuses on secure embedded systems, trusted microelectronics, and post-silicon validation methodologies. Collaborates extensively with industry and government labs on hardware security and design automation challenges.

• Hardware Trust and Security
• VLSI Design
• Formal Verification
• +۵ مورد دیگر

Joel Grodstein is a Lecturer in the Department of Electrical Engineering at Tufts University's College of Engineering. He holds a BSEE from Case Western Reserve University (1981) and an MSCS from the University of Utah (1986). His research spans VLSI design, computer architecture, and interdisciplinary bioelectricity studies, focusing on the intersection of hardware-software systems and biological applications. He teaches courses on real-time embedded systems, parallel computing, bioelectricity, and digital design verification. His career includes roles at Digital Equipment Corporation, Compaq, Intel, and now academia. His recent work bridges computational modeling of bioelectric networks with traditional hardware design, as seen in collaborations with Mike Levin's lab at Tufts. Courses like EE 123 (Bioelectricity) and new offerings like EE 152 (Real-Time Embedded Systems) reflect this dual focus. Publications emphasize symbolic timing analysis, CAD tools for VLSI, and bioelectric systems. He has advised no listed students but collaborates actively with industry partners (e.g., NVIDIA for EE 165). His lab work involves biophysical modeling and synthetic biology projects, as detailed in his recent bioelectricity-related papers.

• VLSI Design
• Computer Architecture
• Computer-Aided Design (CAD)
• +۴ مورد دیگر

Kanad Basu is an Assistant Professor in the Department of Electrical & Computer Engineering at the University of Texas at Dallas (UTD), affiliated with the Erik Jonsson School of Engineering and Computer Science. He holds the title of Fellow, Eugene McDermott Distinguished Professor. Previously, he worked at IBM and Synopsys, and was an Assistant Research Professor at New York University. His research focuses on hardware security, AI hardware, quantum computing, and VLSI testing. Basu has authored over 130 peer-reviewed publications, 2 patents, and received the Best Paper Award at the 2011 International Conference on VLSI Design. Education: PhD and MS in Computer Engineering from the University of Florida (2012), BE in Electronics and Telecommunication Engineering from Jadavpur University, India (2007). Research Interests: His work spans hardware security (e.g., side-channel attacks, hardware Trojans), functional safety in automotive systems, quantum computing EDA tools, and AI-driven verification techniques. Recent projects include secure assertion generation using LLMs, radiation hardening for edge AI, and quantum circuit equivalence checking. Recent Achievements: Won NSF CAREER Award (2025), served on TPC for IEEE DATE 2026 and IEEE Quantum Week 2026, and led the TIES lab to win NSF CAREER funding. His lab has produced over 15 PhD graduates, many now in industry roles at Intel, NXP, and Oak Ridge National Lab. Awards: Includes NSF CAREER (2025), IEEE Top Picks (2024/2023), and Blavatnik nomination (2019). Academic service roles include associate editorships for IEEE Design & Test and IET Computers. Lab & Collaborations: The Trustworthy & Intelligent Embedded Systems (TIES) lab collaborates with NSF CHEST and TxACE. Ongoing projects involve quantum simulation frameworks (QuaSi), secure DNN acceleration (MENDNet), and radiation-aware functional safety.

• Hardware Security
• AI Hardware
• Quantum Computing
• +۶ مورد دیگر

Anne Bracy serves as a Senior Lecturer in Electrical and Computer Engineering at Cornell University's College of Engineering, bringing 15 years of specialized teaching experience in introductory programming, systems programming, computer architecture, and digital logic. Prior to her Cornell appointment, she held positions as Principal Lecturer at Washington University in St. Louis and Research Scientist at Intel Labs' Microarchitecture Research Lab in Santa Clara. Her academic foundation includes: B.A. in German Studies, Stanford University (2000) B.S. in Symbolic Systems, Stanford University (2000) M.S. in Computer Science, Stanford University (2001) Ph.D. in Computer and Information Science, University of Pennsylvania (2008) Dr. Bracy's research demonstrates deep expertise in computer architecture with emphasis on processor validation, cache coherence protocols, and educational innovation. Her work bridges theoretical computer science with practical hardware implementation, particularly in post-silicon bug localization and criticality-based load processing optimizations. She has developed comprehensive educational resources including the 700-page textbook All of Programming with extensive video content. Her publication trajectory reveals consistent contributions to hardware architecture, evolving from theoretical graph processing (2008) through coherence protocol innovations (2010) to practical educational frameworks (2015). This progression highlights her dual focus on advancing processor design methodologies while creating accessible learning materials for complex computing concepts. Professional recognition includes: IEEE Senior Member designation Cornell Engineering Excellence in Teaching Award (2017) ACSU Faculty Member of the Year (2016) National Science Foundation Graduate Research Fellowship (2001) Phi Beta Kappa honors from Stanford (2000) Dr. Bracy actively contributes to academic community development as faculty advisor for Cornell Mundial FC, member of the Women in Computing at Cornell (WICC) Faculty Board, and 2016 participant in Cornell's Faculty Institute for Diversity. Her industry experience at Intel Labs directly informs her teaching approach, particularly in systems-level understanding of computer architecture. While current teaching responsibilities dominate her role, her research background continues to shape curriculum development in digital systems education. Her work with the Microarchitecture Research Lab at Intel remains influential in her pedagogical methods, especially regarding real-world processor validation challenges and hardware-software interaction principles taught in advanced systems courses.

• Computer Architecture
• Systems Programming
• Digital Logic
• +۳ مورد دیگر

Dean Sullivan is an Assistant Professor in the Department of Electrical and Computer Engineering at the University of New Hampshire's College of Engineering and Physical Sciences. His research focuses on computer architecture, cybersecurity, and embedded systems security. He holds a Ph.D. from the University of Florida and M.S./B.S. degrees from the University of Central Florida. His education includes: Ph.D., University of Florida M.S., University of Central Florida B.S., University of Central Florida Research interests span hardware-software co-design security, embedded system vulnerabilities, and formal verification of security properties. His work addresses topics like fault injection, electromagnetic attacks, and lightweight hardware attestation mechanisms. Recent publications emphasize hardware security innovations such as fault injection frameworks, causality-based verification models, and novel fuzzing techniques for trusted applications. He teaches courses in computer architecture, VLSI, and embedded design. No scientific awards or grants are explicitly listed in the provided information.

• Computer Architecture
• Computer Systems Analysis
• Computer/Data/Network Security
• +۱ مورد دیگر

Abdullah is a researcher in the field of plant breeding and genetics at Texas A&M University's College of Agriculture and Life Sciences. His academic background includes a B.S. and M.S. in Agriculture (Plant Breeding and Genetics) from the University of Agriculture, Faisalabad, Pakistan, completed in 2008 and 2010 respectively. He holds a Ph.D. in Plant Breeding and currently works in the Agronomy Lab, focusing on wheat plant breeding and genetic improvement strategies. His research emphasizes enhancing crop yields through genetic advancements and optimizing breeding techniques for wheat varieties. Notable areas of exploration include genotype-environment interactions, trait selection, and molecular breeding approaches. Abdullah's recent publications span interdisciplinary topics including compiler optimization, cache indexing strategies, and deep learning acceleration techniques—reflecting a unique blend of agricultural and computational research interests. These works address challenges in hardware-software co-design, parallel computing efficiency, and cybersecurity in distributed systems. Though no formal awards are listed, his work demonstrates contributions to both agricultural science and computer systems engineering. His current research program involves collaborations with computational scientists to integrate data-driven methods into plant breeding programs.

• Plant Breeding
• Agriculture
• Genetics
• +۳ مورد دیگر

Steven Wilton is a Professor in the Department of Electrical & Computer Engineering at the University of British Columbia , where he also serves as Department Head (2019–2023, reappointed in 2024). He holds a BASc from the University of Victoria , and MASc and PhD from the University of Toronto . Education BASc (Victoria) MASc (Toronto) PhD (Toronto) His research focuses on Field-Programmable Gate Arrays (FPGAs) and Computer-Aided Design (CAD) algorithms . He explores FPGA architectures, post-silicon debugging, and programmable logic for System-on-a-Chip (SoC) design , aiming to enhance FPGA efficiency and accessibility for small/medium electronics companies. As part of the UBC SoC Research Group and ICICS , he contributes to advanced computing systems. He is also a Professional Engineer (BC) and IEEE Fellow , recognized for his work in electrical and computer engineering. Scientific Awards IEEE Fellow Dr. Wilton supervises graduate students like Andrew David Gunter (PhD in Electrical and Computer Engineering) and teaches courses including ELEC 402 , CPEN 311 , and CPEN 513 . His affiliations include the Institute for Computing, Information and Cognitive Systems (ICICS) and the Quantum Computing Research Cluster .

• Computer Architecture
• VLSI Design
• Field-Programmable Gate Arrays
• +۷ مورد دیگر

Summary Alan J. Hu is a Professor in the Department of Computer Science at the University of British Columbia (UBC), affiliated with the Faculty of Science. His primary research interests include formal methods, formal verification, model checking, and software/hardware co-design. He leads research in areas such as post-silicon validation, cloud resource scheduling, and concurrency verification. Hu teaches courses like CPSC 513 (Formal Verification) and CPSC 320 (Algorithm Design). Education & Roles: Ph.D. in Computer Science (Stanford University), current roles include supervision of graduate students (e.g., Malte Schwerin, Stuart Hoad) and leadership in research groups like ICICS and CAIDA. Research Contributions: Key projects include BackSpace (post-silicon debug framework), MonoSAT (SMT solver), and contributions to formal verification of embedded systems. His work on cloud resource scheduling (e.g., Gridiron, Cospot) addresses network bandwidth guarantees in datacenters. Awards & Recognition: Recipient of the IEEE Outstanding Service Award, IBM Faculty Award, and UBC CS Teaching Award. His research is supported by industry (Intel, Microsoft) and grants (NSERC, SRC). Labs & Collaborations: Active in UBC's Institute for Computing, Information and Cognitive Systems (ICICS) and the CAIDA lab for AI-driven decision-making.

• Formal methods
• Formal verification
• Model checking
• +۸ مورد دیگر

Professor Andreas Veneris, currently at the University of Toronto , holds cross-appointments in the Edward S. Rogers Sr. Department of Electrical & Computer Engineering , Department of Computer Science , and the Munk School of Global Affairs & Public Policy . He earned his Diploma in Computer Engineering from the University of Patras (1991), M.S. in Computer Science from USC (1992), and Ph.D. in Computer Science from UIUC (1998). AAAS ACM Fellow IEEE Fellow Professional Engineers of Ontario Technical Chamber of Greece Planetary Society NSERC COHESA Network Director His research spans two decades of CAD/VLSI design automation followed by blockchain technology focusing on CBDCs , smart contract verification , DeFi mechanisms , and techno-legal Web3.0 policy . Recent work includes ASTRAEA decentralized oracle , DeFi insurance protocols , and privacy-preserving CBDC architectures . Award highlights: ACM SIGSOFT Distinguished Paper (ICSE 2024) IEEE Best Paper Awards (2024, 2022, 2020) ACM SIGARCH Maurice Wilkes Award MICRO Hall of Fame He advises Ph.D. candidates in blockchain and machine learning while leading research sponsored by Ripple (UBRI) , Huawei , and IBM . His group develops value-based accelerators for deep learning and formal verification frameworks for smart contracts. Selected projects include: HEMVM (Interoperable Blockchain VMs) BAKUP (DeFi Insurance Protocol) SigVM (Event-Driven Smart Contracts) CnvluTin (Ineffectual Neuron-Free CNNs) Stripes (Precision-Variable DL Accelerators)

• Computer Engineering
• Blockchain Technology
• Formal Methods
• +۴ مورد دیگر

Priyank Kalla is a Professor at the University of Utah in the Department of Electrical and Computer Engineering. His research focuses on formal verification , arithmetic datapath optimization , and Silicon Photonics . PhD from University of Massachusetts at Amherst (2002) MS from University of Massachusetts at Amherst (1998) B.E. from Birla Vishvakarma Mahavidyala (1993) His research integrates computer algebra and algebraic geometry with design automation for verifying complex digital circuits. Recent work includes thermal-aware synthesis of photonic components and formal verification of post-quantum cryptographic implementations. Publications span IEEE Transactions on CAD , VLSI-SoC , and SAT conferences , with 2025 publications on Boolean function analysis and photonic test-point selection . His ACM TODAES 2007 paper on finite ring algebra optimization received the best paper award. Awards include: Outstanding Presentation Award at ETS 2025 Best Paper at VDAT 2024 Honourable Mention at ITC India 2022 Teaching includes ECE/CS 5745/6745 on Hardware Verification and ECE/CS 3700 on Digital System Design. His research group has secured multiple NSF grants (2005-2019) and University of Utah SEED grants.

• Formal Verification
• Computer Algebra
• Algebraic Geometry
• +۶ مورد دیگر