Dan Suciu is a Microsoft Endowed Professor in the Paul G. Allen School of Computer Science & Engineering at the University of Washington. His research focuses on data management, query optimization, probabilistic databases, parallel data processing, and information theory applications to databases. Awards : ACM Fellow (2011), American Academy of Arts and Sciences (2024), ACM SIGMOD Codd Innovation Award (2022), NSF Career Award (2001), Alfred P. Sloan Fellow (2001-2002). Research Trends : Recent work emphasizes cardinality estimation using Lp-norms, submodular width for query evaluation, dynamic query processing, and tensor program optimization. His publications highlight intersections between database systems and formal methods, driven by mathematical rigor. Key Collaborators : Mahmoud Abo Khamis, Dan Olteanu, Amir Shaikhha, Maximilian Schleich, Kyle Deeds, Moe Kayali. Advising : PhD students Gerome Miklau (2006), Christopher Re (2010), Paris Koutris (2016), Nilesh Dalvi (2008 runner-up), Yisu Remy Wang (2024 runner-up) have excelled in dissertation awards.
Uzi Vishkin is a Professor at the University of Maryland's Institute for Advanced Computer Studies (UMIACS) and Department of Electrical and Computer Engineering, with additional affiliation in the Department of Computer Science. His work focuses on parallel computing, including the PRAM-On-Chip vision to bridge parallel algorithms and hardware. He holds a D.Sc. from Technion (1981), M.Sc. and B.Sc. in Mathematics from Hebrew University (1975/1974). Research interests span parallel algorithms, PRAM (Parallel Random Access Machine) architecture, machine learning applications, and pattern matching. His PRAM-On-Chip project aims to create a coherent computing stack for many-core processors. Vishkin has contributed to theoretical foundations and practical implementations, including the XMT architecture and compiler. He has been recognized with ACM Fellow (1996), Highly Cited Researcher (2003), and National Academy of Inventors Fellow (2024). Awards highlight his pioneering work in parallel algorithms and computing systems. Teaching spans courses like Parallel Algorithms and Mathematical Foundations for Computer Engineering. He emphasizes parallel algorithmic thinking in education and has developed teaching materials for high school and university levels. Key projects include the XMT architecture, simulations, and tools for parallel programming. His work integrates algorithmic theory with hardware design to address programming challenges in many-core systems.
Jordi Perelló Muntan is an Associate Professor in the Department of Computer Architecture at the Universitat Politècnica de Catalunya (UPC), Barcelona, Spain, where he is also affiliated with the Escola Tècnica Superior d'Enginyeria de Telecomunicació de Barcelona (ETSETB). He is a member of the Broadband Communications Systems and Architectures (CBA) and IDEAI-UPC research groups, focusing on advanced optical and future internet networking technologies. Research Interests: His research spans telecommunications networks, optical fiber and optical networking, resource optimization, network architectures, and the Future Internet. He investigates performance optimization in 5G transport networks, Spatial Division Multiplexing (SDM), Recursive Inter-Network Architecture (RINA), elastic optical networks, and cognitive networking. His work integrates SDN, network virtualization, and green networking principles for scalable and efficient infrastructures. Publication Trends: His recent publications focus on probabilistic constellation shaping in multicore fiber networks, cognitive strategies for optical margin reduction, RINA-based QoS assurance, and migration planning toward spectrally-spatially flexible optical networks. These reflect a strong trend toward intelligent, adaptive, and energy-efficient network design for future communication systems. Scientific Awards: Co-recipient of the 2020 Fabio Neri Best Paper Award Runner-up (Elsevier Journal of Optical Switching and Networking) Co-recipient of the ONDM 2021 Best Paper Award Co-recipient of the 2019 IEEE Communications Society Charles Kao Award Co-recipient of the ONDM 2012 Best Student Paper Award Advising and Grants: He has advised multiple PhD students on topics including RINA, optical network planning, and virtual provisioning. He has led or participated in major European (H2020, FP7) and national (PID, TEC) research projects such as SLICENET, PRISTINE, TRAINER, and ALLIANCE, focusing on 5G, RINA, and sustainable network infrastructures. Labs and Teams: He is an active member of the CBA research group at UPC, contributing to experimental and theoretical advancements in optical and programmable networks. His team collaborates internationally on testbed development and standardization efforts in next-generation networking.
Hakan Aydin is a Professor and Director of the PhD Program in the Department of Computer Science at George Mason University's Volgenau School of Engineering. He has been teaching at George Mason University since 2001 and has established himself as a leading researcher in real-time embedded systems and energy-aware computing. Education: PhD in Computer Science from the University of Pittsburgh (2001) Hakan Aydin's research primarily focuses on sustainable computing, real-time embedded systems, fault tolerance, Internet-of-Things, and cyber-physical systems. His work bridges theoretical foundations with practical implementations, particularly in energy management for real-time systems. He has developed innovative techniques for reliability-aware power management, dynamic voltage scaling, and energy harvesting in wireless sensor networks. His research has significant implications for extending battery life in mobile devices, improving reliability in safety-critical applications, and enabling sustainable computing practices. Aydin's publications reveal a consistent research trajectory centered around energy efficiency and reliability in real-time systems. His work spans theoretical algorithm development, system-level implementation, and experimental validation. A notable trend is the evolution from single-processor systems to multicore and heterogeneous architectures, reflecting industry trends. His recent work increasingly addresses security aspects of real-time systems and the integration of IoT technologies. Scientific Awards: National Science Foundation CAREER Award (2006) George Mason University Computer Science Department Teaching Award (2006, 2009) Best Paper Award at IEEE Green and Sustainable Computing Conference (IGSC'20) Best Student Paper Award at IEEE International Conference on Embedded Software and Systems (ICESS'15) Best Paper Award at IEEE International Conference on Embedded Computing (EmbeddedCom'14) Best Paper Award at International Workshop on Highly-Reliable Power-Efficient Embedded Designs (HARSH'13) Best Paper Award at ACM International Conference on Modeling, Analysis and Simulation of Wireless and Mobile Systems (MSWIM'11) Hakan Aydin has advised seven PhD students to completion, including Vinay Devadas (2011), Baoxian Zhao (2012), Bo Zhang (2012), Mohammad Atiqul Haque (2016), Maryam Bandari (2016), Arda Gumusalan (2019), and Abhishek Roy (2021). His research has been generously supported by the National Science Foundation through multiple grants, including CSR: Small: Collaborative Research: Towards Reliability-Centric Real-time Computing on Heterogeneous Chip Multiprocessor Systems (2014-2017), CSR: Small: Energy Harvesting for Performance Sensitive Wireless Sensor Networks (2011-2015), and CSR: Small: Collaborative Research: Generalized Reliability-Aware Power Management for Real-Time Embedded Systems (2010-2014). Prof. Aydin has held significant leadership roles in the academic community, serving as the Technical Program Committee Chair of the IEEE RTAS 2011 and General Chair of IEEE RTAS 2012. He is also a member of the Editorial Board of Journal of Real-Time Systems (Springer). His work has established foundational principles in reliability-aware energy management for real-time systems, influencing both academic research and industrial practices in embedded computing.
Arrvindh Shriraman is an Associate Professor and Program Director of Software Systems at Simon Fraser University's School of Computing Science in Surrey. His research focuses on energy-efficient software, multicore memory systems, and optimizing hardware/software interfaces for parallel programming. He holds a Ph.D. (2010) and M.S. (2006) in Computer Science from the University of Rochester, and a B.Eng. (2004) from the University of Madras. He teaches courses on parallel programming and energy-conscious software design. His research interests include synchronization mechanisms for domain-specific architectures, cache optimization, and FPGA-based acceleration. He has contributed to frameworks like Mu-grind for HLS-generated RTL instrumentation and TAPAS for parallel accelerator generation. Notable projects include RANGE-BLOCKS for synchronization in domain-specific systems and TapeFlow for gradient computation in neural networks. His work emphasizes real-time verification of autonomous systems and safety-critical trajectory planning for underwater vehicles. Shriraman collaborates closely with the Tangent Lab, exploring cutting-edge solutions in hardware-software co-design and embedded systems. His teaching and research bridge theoretical computer science with applied engineering challenges, addressing scalability, efficiency, and safety in modern computing systems.
Ada Gavrilovska is a Professor at Georgia Tech's School of Computer Science under the College of Computing. Her work focuses on systems software for emerging technologies, including hybrid memory systems, edge computing, and cloud infrastructure. She leads projects in the PRISM Center and ADA Center , with funding from NSF, DoE, SRC, and industry leaders like Cisco and VMware. Education: PhD in Computer Science, Georgia Tech (2004) Research Interests: Designing systems for new hardware and applications, including edge computing, heterogeneous memory management, and LEO satellite platforms. Her work bridges low-level OS mechanisms with high-level distributed systems challenges. Recent Publications highlight trends in LEO satellite resource scheduling Edge-based ML preprocessing Hybrid memory OS abstractions Disaggregated graph analytics Compiler-assisted performance optimization Scientific Awards: Best paper, NFV World Congress (2016) Spotlight paper, IEEE Transactions on Cloud Computing (2014) ISCA-50 25-year retrospective (2023) Advising & Grants: Ada has mentored over 15 PhD students and 10 MS students, with research supported by NSF, DoE, SRC, and industry grants. She serves as PI in the SRC/DARPA PRISM Center.
Felix Xiaozhu Lin serves as Associate Professor and William Wulf Faculty Fellow in the Department of Computer Science at the University of Virginia's School of Engineering and Applied Science, where he directs the Computer Science Ph.D. Program and MCS/MS Program. Previously a tenured Associate Professor at Purdue University's School of Electrical and Computer Engineering, Lin joined UVA Engineering in August 2020 after completing his doctoral research at Rice University. His educational credentials include: Ph.D. in Computer Science, Rice University (2014) M.S. in Computer Science, Tsinghua University (2008) B.S. in Automation, Tsinghua University (2006) Lin's research centers on systems software at the intersection of operating systems, compilers, and computer architecture, with emphasis on accelerating and safeguarding software systems. His current projects target on-device large language models and speech processing for low-cost hardware ( Analysis of his recent publications reveals a strong trajectory in edge computing and efficient AI systems. His research demonstrates increasing focus on hardware-software co-design for autonomous devices, with significant contributions in video analytics for energy-constrained cameras, kernel virtualization for heterogeneous architectures, and stream processing frameworks leveraging emerging memory technologies. The work consistently addresses real-world constraints like power limitations and network intermittency while maintaining rigorous academic standards. His scientific recognition includes: National Science Foundation CAREER Award (2019) Google Faculty Research Award (2016) NSF CISE Research Initiation Initiative Award (2015) ACM ASPLOS Best Paper Award (2014) Lin leads the XSEL research group mentoring graduate and undergraduate students in systems software development. His educational initiatives include CS4414/CS6456, a modern operating systems course featuring Arm64 baremetal kernel development, multicore systems, trusted execution environments, and filesystem forensics. The course's experiential approach has received strong student feedback for its modern content and practical relevance. His group actively recruits for projects spanning on-device AI, hardware-accelerated speech processing, and next-generation OS development. Based in Charlottesville, Virginia, Lin's research benefits from UVA's proximity to Shenandoah National Park and collaborative opportunities within the university's vibrant computing ecosystem, including the 2024 LLM Workshop he co-organized with Professor Yangfeng Ji.
David Wentzlaff is a Professor of Electrical and Computer Engineering at Princeton University, with associated faculty roles in Computer Science and the High Meadows Environmental Institute (HMEI). He leads research in computing architecture, green computing, and sustainable system design. As Director of Undergraduate Studies, he shapes educational programs in his field. Education: Ph.D., Electrical Engineering, MIT (2012) M.S., Electrical Engineering and Computer Science, MIT (2002) B.S., Electrical Engineering, University of Illinois at Urbana-Champaign (2000) Research Focus: Future Computing Systems: Designing manycore architectures, cloud computing infrastructure, and chiplet-based systems for exascale computing. Sustainability: Developing energy-efficient hardware, recyclable computing systems, and eco-friendly decommissioning strategies. Hardware-Software Co-Design: Exploring FPGA integration, in-memory computing, and parallel processing frameworks. Advising & Grants: Advises 8 current graduate students, focusing on topics like chiplet design, neural acceleration, and sustainable computing. Recipient of NSF grants for projects like OpenPiton (open-source manycore research platform) and CAREER awards for energy-efficient architectures. Labs & Collaborations: Leads the Wentzlaff Research Group at Princeton. Develops open-source frameworks like PRGA (FPGA prototyping) and OpenPiton (manycore processor).
Timothy Harris is an Affiliated Lecturer at the University of Cambridge's Department of Computer Science and Technology, where he jointly teaches courses on multicore semantics and programming. Currently, he works at OpenAI, focusing on performance optimization for GPU inference of large language models, including the Azure OpenAI Service. Previously, he held roles at Microsoft, AWS, Oracle Labs, and was a faculty member at the University of Cambridge (2000–2004). His research spans distributed systems, runtime systems, operating systems, and high-performance computing, with an emphasis on scalability and performance. He contributed to projects like the Xen hypervisor and the Barrelfish research OS. Key research interests include distributed training of PyTorch models in the ONNX runtime, large-scale storage performance with Amazon S3, and runtime systems for in-memory graph analytics. His work often bridges 'big data' and high-performance computing techniques. Notable contributions include the book Transactional Memory (2010) and the Barrelfish OS, alongside numerous publications in top-tier conferences like SOSP, ASPLOS, and EuroSys. He has served as PC chair for ISMM 2025, VEE 2017, and EuroSys 2015, reflecting his leadership in the systems research community. His awards include a Best Paper Award at PACT 2010. Beyond academia, Harris is an avid hiker, aiming to complete the UK coastline, and maintains a photography portfolio at tlhphotography.uk .
Cong Liu is an Associate Professor of Computer Science at The University of Texas at Dallas (UT Dallas), affiliated with the Erik Jonsson School of Engineering and Computer Science. He joined UT Dallas in 2012 as an Assistant Professor and was promoted to his current rank. His research focuses on real-time and embedded systems, cyber-physical systems, and energy-efficient heterogeneous computing. Liu earned his Ph.D. in Computer Science from the University of North Carolina at Chapel Hill (2013), M.S. from Auburn University (2007), and B.E. from Wuhan University of Technology (2005). His research interests include real-time operating systems, cluster/cloud computing, and autonomous systems. He received the NSF CAREER Award in 2017 to develop algorithmic solutions for real-time data processing in autonomous vehicles and robotics. His work emphasizes GPU-accelerated embedded systems that enable autonomous decision-making in resource-constrained environments. Liu has held roles such as TPC member for IEEE RTAS and reviewer for multiple journals/conferences, including IEEE Transactions on Computers and Journal of Parallel and Distributed Computing. His publications address critical challenges in real-time scheduling, heterogeneous computing, and energy efficiency. He leads research on data-induced challenges in embedded systems, aiming to make autonomous driving systems predictable and controllable. Liu’s contributions bridge theoretical foundations with practical implementations in automotive and robotics domains.
Trevor Brown is an Associate Professor in the Computer Science department at the University of Waterloo, affiliated with the Cheriton School of Computer Science. He leads the Multicore Lab and specializes in concurrent data structures, non-blocking algorithms, and memory management. His research bridges theory and systems, focusing on practical implementations of lock-free trees, transactional memory, and techniques for non-uniform memory architectures. Education includes a PhD in Computer Science from the University of Toronto and a B.Sc. in Computer Science and Mathematics from York University. Research interests center on concurrent systems, with recent work exploring hardware-accelerated indexing, memory reclamation techniques, and performance anomalies in microbenchmarks. His publications demonstrate consistent innovation in parallel computing, with articles frequently appearing at top conferences like PPoPP, SPAA, and DISC. Sustainable energy research includes optimizing hybrid power systems and battery storage solutions. Awards include multiple best paper/artifact recognitions at SPAA and PPoPP, teaching excellence honors, and nominations for the Governor General’s Gold Medal. Extensive advising includes 13+ graduate students and PDFs, with research grants exceeding $965K from NSERC, Huawei, and CFI. He directs the Multicore Lab, developing open-source tools like SetBench for rigorous performance benchmarking.
Daniel J. Sorin is a Professor of Electrical and Computer Engineering at Duke University's Pratt School of Engineering, where he also serves as Associate Chair of Education. He holds joint appointments in both the Electrical and Computer Engineering department and Computer Science department, and is recognized as a Bass Fellow for his contributions to education and research. His research focuses on computer architecture with specific expertise in memory systems, cache coherence protocols, fault tolerance, and verification-aware design. Dr. Sorin's work bridges theoretical computer architecture with practical implementations, often incorporating coding theory to solve architectural challenges. His research group has made significant contributions to automated protocol generation, hardware acceleration, and robot motion planning systems. Dr. Sorin's publications reveal a consistent focus on memory consistency models, cache coherence protocols, and verification techniques. His recent work has expanded into robot motion planning acceleration, FPGA resource management, and novel error correction techniques for emerging memory technologies. The trend shows increasing interdisciplinary work connecting computer architecture with robotics and machine learning applications. Program Chair of HiPEAC 2017 Co-chair of IEEE Micro's Top Picks selection committee (2016) Lois and John L. Imhoff Distinguished Teaching Award (2011) NSF CAREER Award recipient IEEE Micro Top Pick awards (2011, 2015) ACM Senior Member As an advisor, Dr. Sorin has mentored numerous PhD students who have gone on to successful careers at leading technology companies including Google, Microsoft, Oracle, and Nvidia. His research group maintains strong industry connections and has produced influential work in cache coherence protocols, memory systems, and fault-tolerant architectures. He has also authored the widely-used textbook 'A Primer on Memory Consistency and Cache Coherence' (2nd edition). Dr. Sorin leads an active research laboratory focused on next-generation computer architecture challenges, with ongoing projects in hardware acceleration, memory systems, and robot motion planning. His group collaborates with researchers across multiple disciplines including robotics, coding theory, and semiconductor design.
Dr. Andrea Bastoni is a Postdoctoral Researcher and Research Fellow at the Chair of Cyber-Physical Systems in Production Engineering at Technical University of Munich (TUM), Faculty of Mechanical Engineering. He is also the CTO and co-founder of Minerva Systems , developing operating system solutions for AI-ready embedded applications. His expertise spans real-time operating systems, cyber-physical systems, and predictable system design for heterogeneous platforms. His research focuses on enhancing predictability of memory hierarchies in complex SoCs through techniques like memory bandwidth regulation and cache partitioning. This work has industrial applications in safety-critical domains such as avionics and railways, where he contributes to certifiable hypervisors and operating systems. As former Software Architect of the PikeOS hypervisor at SYSGO GmbH (2012-2020), he specialized in DO-178C, IEC 61508, and EN 50128 standards. His academic background includes a Ph.D. in Computer Engineering from the University of Rome Tor Vergata (2007-2011), where he developed LITMUS^RT as part of UNC's Real-Time Systems Group during a visiting researcher period (2009-2010). His publications reflect ongoing work on Multicore Real-Time Scheduling , Mixed-Criticality Task Isolation, and Arm DynamIQ shared unit analysis. He actively participates in program committees for conferences like RTSS, DSN, and DATE.
CHAN Chee Yong is an Associate Professor in the Department of Computer Science at the School of Computing, National University of Singapore (NUS) . He earned his Ph.D. in Computer Science from the University of Wisconsin-Madison and holds B.Sc. and M.Sc. degrees in Computer Science from NUS. Education : Ph.D., Computer Science, University of Wisconsin-Madison M.Sc., Computer Science, NUS B.Sc., Computer Science (1st Class Honours), NUS His research focuses on database systems , emphasizing query processing and optimization , transaction management , and database usability . He has contributed extensively to XML data dissemination, skyline computation, and multicore database performance optimization, with publications in venues like ACM SIGMOD, VLDB, and IEEE ICDE. Recent publications show increasing emphasis on join optimization , transaction healing , and spatial-keyword queries , reflecting trends in multicore systems, complex query processing, and XML data management. His work combines theoretical rigor with practical applications in distributed databases and data engineering. Notable professional roles include Associate Editor for the VLDB Journal , ACM SIGMOD Record , and IEEE Transactions on Knowledge and Data Engineering . He has served on program committees for major conferences like SIGMOD, ICDE, and VLDB across 2003-2026. Dr. Chan has supervised 9 PhD students and 10 M.Sc./M.Comp. students , including WANG TaiNing (2021), LI Meiying (2020), and TRAN Quoc Trung (2011). His advisees have been placed in institutions like the Institute for Infocomm Research and Huawei Shannon Lab.
Geoffrey Nelissen is an Assistant Professor in the Department of Mathematics and Computer Science at Eindhoven University of Technology. He holds additional roles as a Research Scientist and Investigador Auxiliar at INESC TEC (Portugal), contributing to interdisciplinary research in real-time systems. His work focuses on schedulability analysis, parallel task execution, and real-time communication protocols, with applications in embedded systems and multicore architectures. Research Interests: Real-Time Scheduling Response Time Analysis Multi-core and Parallel Systems Time-Sensitive Networking (TSN) Formal Verification Recent work emphasizes schedule abstraction frameworks, memory contention analysis, and deterministic communication protocols. His research has received recognition through multiple best paper awards including ICESS 2021 and RTAS 2022. He actively contributes to conferences like RTSS and ECRTS while teaching courses on Real-Time Systems and Operating Systems. Collaborations span European institutions with focus on embedded systems, autonomous driving, and safety-critical applications. Current projects explore holistic approaches to WCRT analysis and resilient real-time communication architectures.
