جستجوی استاد راهنمای دانشگاهی

Roberto Giorgi is an Associate Professor of Computer Engineering at the Department of Information Engineering, University of Siena, Italy. He has held this position since October 1, 2006, following his tenure as an Assistant Professor since March 15, 1999. His educational background includes a Ph.D. in Computer Engineering from the University of Pisa (1999) with a thesis on coherence protocols for shared-memory multiprocessors, and an Electronic Engineering degree (1995) with a thesis on trace-driven performance evaluation of multiprocessors. Giorgi's primary research focuses on Computer Architecture , particularly on multiprocessor/multicore issues including processor design, coherence protocols, programmability, and energy efficiency. His work spans both theoretical and practical aspects of computer architecture, with emphasis on real-world implementations and educational tools. He has coordinated significant EU-funded projects including AXIOM (2014-2018) on Smart Cyber-Physical Systems and TERAFLUX (2009-2014) on Many-Cores. His recent publications (2022-2025) demonstrate a strong progression toward practical applications of computer architecture research, with particular emphasis on RISC-V architecture, FPGA-based acceleration, dataflow computing models (especially DF-Threads), and graph processing. Many of his papers address educational tools for computer architecture education, real-time object detection on embedded platforms, and novel execution paradigms for edge computing and HPC. IEEE Senior Member ACM Lifetime Member Coordinator of EU-funded AXIOM project (2014-2018) on Smart Cyber-Physical Systems Coordinator of EU-funded TERAFLUX project (2009-2014) on Many-Cores Giorgi has been actively involved in securing research funding and building collaborations, particularly in high-performance computer architecture research with emphasis on scalable architectures and embedded systems. He leads the Computer Architecture Lab (ROOM 223) at the University of Siena, which was established in 2007, and has been instrumental in developing practical implementations of architectural concepts including the AXIOM platform for cyber-physical systems.

• Computer Architecture
• Multiprocessor Systems
• Multicore Architectures
• +۶ مورد دیگر

Sandro Bartolini serves as Associate Professor in the Department of Information Engineering and Mathematical Sciences at the University of Siena, Italy, where he teaches advanced courses in computer architecture and parallel programming while leading cutting-edge research in high-performance computing systems. His academic journey began with a cum laude Laurea in Computer Engineering followed by a PhD in Computer Science and Engineering from Università di Pisa. Education: PhD in Computer Science and Engineering, Università di Pisa Laurea in Computer Engineering (cum laude), Università di Pisa Research Focus: His work centers on photonic interconnects for chip multiprocessors , energy-efficient software optimization for multi-core/GPU architectures, and performance-portable parallel programming models . Current investigations span cryptographic acceleration, blockchain algorithms, and hardware/software co-design for emerging computing paradigms, with strong emphasis on practical implementations bridging theoretical advances and real-world applications. Publication Trends: Recent publications (2019-2023) reveal three dominant threads: (1) Photonic network innovations addressing energy bottlenecks in chip multiprocessors, (2) The PHAST library ecosystem enabling seamless CPU/GPU programming across domains from autonomous vehicles to UAV navigation, and (3) Hardware accelerator designs for convolutional networks and cryptographic workloads. These works consistently target performance-portability challenges in heterogeneous computing environments. Grants and Collaborations: As principal investigator for the Italian Ministry-funded PHOTONICA project, he established international research partnerships with Murcia University, Columbia University, and Hong Kong University of Science and Technology, while securing industry collaborations with STMicroelectronics, Intel Munich, IBM, and IMEC. He has also managed complex IT system deployments for Siemens Italy, RAI (Italian public broadcasting), and SpaceDys. Academic Leadership: Bartolini serves as Associate Editor for the Eurasip Journal of Embedded Computing and actively contributes to the European HiPEAC network. His research group at Siena maintains strong industry ties for technology transfer, particularly in photonic interconnect validation and parallel programming frameworks for next-generation computing systems.

• High-Performance Computing (HPC)
• Computer Architecture
• Embedded Systems
• +۵ مورد دیگر

Luigi Pomante is a tenured Assistant Professor at the University of L'Aquila, Italy, where he is affiliated with the Department of Engineering and Information Science and Mathematics (DISIM) and the DEWS Center of Excellence. His academic career focuses on research and teaching in embedded systems and hardware-software co-design methodologies. Dr. Pomante's primary research interest is Electronic System-Level Hardware-Software Co-Design of heterogeneous parallel dedicated systems. He is the principal developer of the HEPSYCODE framework, which provides comprehensive methodologies and tools for system-level design space exploration. His work addresses critical challenges in embedded systems development, including handling functional and non-functional requirements, heterogeneous architectures, and mixed-criticality constraints. He has published extensively in journals like IEEE Transactions on Computers and IET Computers & Digital Techniques, as well as at major international conferences. Analysis of Dr. Pomante's publication record reveals a consistent research trajectory focused on hardware-software co-design methodologies, with increasing attention to real-time constraints and mixed-criticality systems in more recent work. His publications demonstrate expertise in design space exploration techniques, system modeling using CSP-like approaches, and the development of metrics for evaluating hardware-software partitioning solutions. The HEPSYCODE framework represents his most significant contribution to the field. Dr. Pomante actively supervises student projects and theses related to electronic design automation and embedded systems. He has contributed to European research projects including EMC2 (Embedded Multi-Core systems for Mixed Criticality applications), where he was responsible for deliverables related to design methodologies, implementation approaches, and validation frameworks. His work has practical applications in aerospace and other safety-critical domains through collaborations with industry partners. He leads the HEPSYCODE research group at DEWS, which focuses on developing methodologies and tools for hardware-software co-design of heterogeneous parallel dedicated systems. The group's current work includes extensions for real-time and mixed-criticality systems, frameworks for embedded system monitoring, and techniques for handling approximate computing and energy/power constraints within the design space exploration process.

• Electronic System-Level HW/SW Co-Design
• Heterogeneous Parallel Systems
• Embedded Systems
• +۵ مورد دیگر

Alessandro Biondi serves as Associate Professor of Computer Engineering at the Scuola Superiore Sant'Anna in Pisa, Italy, where he conducts research at the Real-Time Systems (ReTiS) Laboratory. His expertise centers on real-time, safe, and secure cyber-physical systems with critical applications in automotive and railway domains. His academic credentials include: Computer Engineering degree, cum laude , University of Pisa (within excellence program) PhD in Emerging Digital Technologies (Embedded Systems curriculum), cum laude , Scuola Superiore Sant'Anna (2017) Biondi's research spans real-time systems design, operating systems, hypervisors, synchronization protocols, embedded optimization, and formal scheduling analysis. His work bridges theoretical foundations with industrial implementation, emphasizing safety and security for mission-critical infrastructure through rigorous mathematical modeling and practical system development. Recent publications (2023-2025) demonstrate concentrated advancements in real-time scheduling optimization, memory management for safety-critical systems, and adversarial defense mechanisms in vision applications. Key trends include deterministic communication protocols for AUTOSAR, end-to-end latency minimization in distributed systems, and hardware-aware security solutions for heterogeneous SoCs, reflecting strong industry-academia collaboration. His scientific contributions have earned significant recognition: ACM SIGBED Early Career Award (2019) IEEE TCCPS Early Career Award (2023) Six Best Paper Awards Best Journal Paper Award (IEEE Transactions on Industrial Informatics) EDAA Outstanding Dissertation Award (2017) Additional honors: Outstanding Paper Award, Best Presentation Award, Best Paper Nomination Biondi leads industrial research projects for automotive and railway safety-critical systems while participating in European Commission-funded initiatives. He co-founded spin-offs Accelerat (specializing in predictable cyber-physical systems) and Wriggle Solutions (acquired IP for real-time tire monitoring), demonstrating his commitment to translating research into commercial solutions. His editorial service includes Associate Editor roles for IEEE TETC, Journal of Real-Time Systems, and LITES. As a core member of the ReTiS Laboratory, Biondi collaborates within a high-impact research ecosystem focused on advancing real-time computing theory and practice. The lab maintains deep industry partnerships and drives innovation in scheduling algorithms, security protocols, and optimization techniques for next-generation embedded platforms.

• Real-Time Systems
• Cyber-Physical Systems
• Embedded Systems
• +۸ مورد دیگر

Donatella Sciuto is a Full Professor in Computer Engineering at the Department of Electronics and Information of Politecnico di Milano, where she conducts research in System Architectures. She serves as Deputy Director of Education at CEFRIEL, managing executive company education training programs. Her academic career spans multiple leadership roles in professional organizations including the Council of EDA (CEDA) where she served as VP of Finance (2008-2009) and is currently President Elect. Her research focuses on embedded systems design methodologies, with particular expertise in Multiprocessor System on Chip, reconfigurable systems, hardware/software co-design, and design space exploration techniques. She leads the Embedded Systems Design and Design Methodologies research group (sagroup.elet.polimi.it) and has contributed significantly to the field of Electronic Design Automation. Her publication record shows a consistent focus on reconfigurable computing and MPSoC design, with recent work emphasizing dynamic reconfiguration techniques, hardware/software synchronization in multiprocessor systems, and optimization algorithms for heterogeneous architectures. Her research demonstrates a progression from foundational work in embedded systems to more complex system-level design methodologies for modern reconfigurable architectures. She has held editorial positions with prestigious journals including IEEE Transactions on Computers, Journal of Design Automation of Embedded Systems, and IEEE Embedded Systems Letters. She has served on program committees for major conferences including DAC, ICCAD, DATE, and CODES+ISSS, and has held leadership roles including Publications Chair for IEEE/ACM ESWEEK 2007 and Co-General Chair of ESWEEK 2009. Prof. Sciuto has advised more than 10 PhD students and currently mentors 4 PhD candidates at Politecnico di Milano. She teaches courses in Computer Architecture, Operating Systems, and High Performance Processors and Systems. She has published 5 teaching books in Italian across multiple editions and maintains active research collaborations through European and national research projects she coordinates.

• Embedded systems
• Multiprocessor System on Chip
• Reconfigurable systems
• +۵ مورد دیگر

Federico Aromolo is an Assistant Professor, appointed since October 2023. Previously, he served as a Postdoctoral researcher (January 2023–September 2023) and completed his Ph.D. in June 2022 (October 2019–June 2022). His research focuses on real-time systems, embedded cybersecurity, and scheduling algorithms, emphasizing intrusion detection, response-time analysis, and security-performance trade-offs in embedded systems. Education: Ph.D. (2019–2022) Postdoctoral Research (2023) Research interests include: Real-Time Scheduling (e.g., EDF, Gang Tasks) Cybersecurity in Embedded/Edge Systems Software Reliability and Memory Safety His recent work explores intrusion detection via machine learning, latency optimization in edge computing, and securing real-time software without compromising temporal guarantees. His publications span IEEE Transactions and conferences like ECRTS and RTAS. He received the IEEE TCCPS Early-Career Award 2023 for contributions to Cyber-Physical Systems research. No advising or grant details are explicitly listed in the provided texts. Affiliated with research teams investigating real-time systems and embedded security, though specific lab names are unspecified.

• Real-Time Systems
• Cybersecurity
• Embedded Systems
• +۳ مورد دیگر

Dr. Daniel Casini is an Assistant Professor at the Department of Information Engineering and Computer Science, Sant'Anna School of Advanced Studies. His academic journey includes a PhD (2016–2019) and postdoctoral research (2019–2021) in Real-Time Systems. He specializes in real-time scheduling algorithms, edge computing, and embedded system predictability. His work focuses on optimizing latency, resource allocation, and security in cyber-physical systems. Education: PhD in Computer Science, Sant'Anna School of Advanced Studies (2016–2019) Postdoctoral Researcher in Real-Time Systems (2019–2021) Research Interests: Real-Time Scheduling (Partitioned/EDF/Gang Scheduling) Edge Computing and Predictable Virtualization Middleware Optimization (DDS/ROS 2) Hardware-Software Co-Design for Cyber-Physical Systems Security-Temporal Trade-offs in Critical Systems Key Contributions: Developed MATERIAL framework for edge real-time applications on QNX RTOS Pioneered analysis of QNX IPC predictability and Linux kernel noise Designed latency-optimized thread chains for DDS middleware Awards: IEEE TCCPS Early-Career Award 2023 Labs/Teams: Active contributor to the SPHERE project, developing heterogeneous multi-SoC architectures for next-gen cyber-physical systems.

• Real-Time Systems
• Embedded Systems
• Scheduling Algorithms
• +۳ مورد دیگر