جست‌وجوی استاد و پژوهشگر

Ashish Venkatمشاهده پروفایل

دانشیار

• Computer Architecture
• Compilers
• Computer Security
• +۱۲ مورد دیگر

Ashish Venkat is an Associate Professor in the Department of Computer Science at the University of Virginia, part of the School of Engineering and Applied Science. He holds a Ph.D. from UC San Diego and has established himself as a leading researcher in computer architecture, compilers, and computer security. Research Interests: His research focuses on cross-disciplinary hardware and software techniques to build secure, high-performance computing systems. He investigates robust exploit mitigations that maintain energy efficiency and programmability, with a particular emphasis on speculative execution, memory safety, hardware security, and privacy-preserving computing. He also explores the application of machine learning to detect security threats and model execution behavior. Publication Trends: His recent publications (2020–2025) demonstrate a strong focus on hardware-based security, particularly microarchitectural vulnerabilities (e.g., micro-op cache attacks), memory safety via microcode capabilities, and secure accelerators for bioinformatics. There is a consistent trend of publishing in top-tier venues like ISCA, MICRO, IEEE S&P, and USENIX Security, often featuring novel hardware/software co-design solutions. Scientific Awards: NSF CAREER Award (2023) NSF CRII Award (2018) IEEE Micro Top Pick (2019) IEEE Design & Test Top Pick (2020, 2021) HPCA Best Paper Runner-Up (2019) DATE Best Paper Nominee (2023) UVA Research Achievement Award (2023) ISCA Prolific Author of the Decade (2013–2022) Advising and Grants: He actively mentors graduate and undergraduate students, many of whom have pursued advanced degrees or joined leading tech companies. He has secured significant funding as PI or co-PI from NSF, DARPA, SRC, and Intel, including a $4.9M DARPA HERCULES grant and an NSF CAREER award. His projects focus on holistic security solutions, speculative optimization, and privacy-preserving machine learning frameworks. Labs and Teams: He leads a research group focused on secure and efficient computing systems, collaborating with researchers at institutions like UC San Diego, UC Riverside, and UC Irvine, as well as industry partners including Intel and IBM.

Grey Ballardمشاهده پروفایل

دانشیار

• Numerical Linear Algebra
• High Performance Computing
• Computational Science
• +۶ مورد دیگر

Dr. Grey Ballard is an Associate Professor in the Department of Computer Science at Wake Forest University . He earned a B.S. in Math and Computer Science (2006), M.A. in Math (2008) from Wake Forest, and PhD in Computer Science (2013) from the University of California, Berkeley. He was a Truman Fellow at Sandia National Laboratories before joining Wake Forest. Research Focus: Ballard develops communication-optimal algorithms for high-performance computing , particularly in tensor decompositions , symmetric matrix computations , and nonnegative matrix factorization . His work combines numerical linear algebra with parallel algorithm design to reduce data movement costs in distributed systems. Publications demonstrate expertise in communication lower bounds , randomized tensor rounding , and visualization tools for parallel algorithms. He has contributed software packages such as TuckerMPI , GentenMPI , and PLANC for large-scale data compression and clustering. Scientific Awards: Wake Forest Excellence in Research Award NSF CAREER Award SIAM Linear Algebra Prize Three Conference Best Paper Awards (SPAA, IPDPS, ICDM) C.V. Ramamoorthy Distinguished Research Award (UC Berkeley) ACM Doctoral Dissertation Award – Honorable Mention Teaching: Courses include Introduction to Computer Science , Numerical Linear Algebra , and Parallel Algorithms . He has developed educational tools using the Thread-Safe Graphics Library to visualize parallel dynamic programming and collective communication.

Andreas Herkersdorfمشاهده پروفایل

استاد

• Computer Architecture
• Embedded Systems
• Network-on-Chip (NoC)
• +۴ مورد دیگر

Prof. Dr. Andreas Herkersdorf is a Full Professor and Chair of Integrated Systems at the Technical University of Munich (TUM) School of Computation, Information and Technology. His research focuses on application-specific multicore processors (MPSoC), FPGA-based prototyping, fault-tolerant systems, and energy-efficient architectures, with applications in IP packet processing, automotive systems, and visual computing. He has received multiple IBM innovation awards and serves on editorial boards including the DFG Review Board for computer architecture. Education: Dipl.-Ing. Electrical Engineering (TUM, 1987), Dr. techn. Electrical Engineering (ETH Zurich, 1991) Research: MPSoC architectures, autonomic computing, NoC resilience, FPGA acceleration, and self-optimizing systems. Awards: IBM Master Inventor (1998), IBM Outstanding Technical Achievement Award (2001), multiple IBM Innovation Achievement Awards (1996-2003) His recent publications emphasize hardware/software co-design, machine learning integration for runtime optimization, and network-on-chip innovations. He collaborates on projects involving 6G systems, smartNICs, and automotive communication protocols.

Mark Oskinمشاهده پروفایل

استاد مدعو

• Computer Architecture
• Parallel Computing
• Graph Processing
• +۱۲ مورد دیگر

Mark Oskin is an Adjunct Professor at the School of Computer Science and Engineering , University of Washington , focusing on Software & Hardware Systems . He leads the Sampa Group and collaborates on projects like HammerBlade and BlackParrot. University: University of Washington School: School of Computer Science and Engineering Department: Department of Electrical & Computer Engineering His research spans Computer Architecture , Parallel Computing , and Graph Processing , with additional expertise in Quantum Computing , Open Source Hardware , and Distributed Shared Memory . Ongoing work includes custom manycore devices for graph execution and open-source RISC-V designs. Past projects like Grappa and WaveScalar advanced distributed memory and dataflow execution. Recent publications include BlackParrot: An Agile Open Source RISC-V Multicore for Accelerator SoCs (IEEE Micro 2020) and Perceptual Compression of Video Storage and Processing Systems (SoCC 2019), reflecting trends in hardware-software co-design, quantum systems, and energy-efficient video processing. Best Paper Award , USENIX ATC 2015 IEEE Micro Top Picks , 2009 Mark has advised numerous students, including Amrita Mazumdar (IoT video compression startup), Brandon Lucia (CMU), and Steve Swanson (UC San Diego). He co-founded Corensic, a startup exploring deterministic multithreaded execution.

Alberto Rosمشاهده پروفایل

استاد

• Computer Architecture
• Parallel Processing
• Multicore Processors
• +۵ مورد دیگر

Alberto Ros is a Full Professor at the University of Murcia , Spain, in the Computer Engineering Department (DITEC) . His work focuses on cache coherence , memory hierarchy designs , memory consistency , and processor microarchitecture , with over 100 peer-reviewed publications. Dr. Ros earned his MS (2004) and PhD (2009) in Computer Science from the University of Murcia. He interned at the School of Informatics, University of Edinburgh , and held postdoctoral positions at the Technical University of Valencia and Uppsala University . He is an IEEE Senior Member . Research interests include optimizing hardware for multicore systems. His work spans cache coherence protocols, transactional memory, speculative execution, and data/instruction prefetching techniques. He led the ERC Consolidator Grant (2018) and ERC Proof of Concept Grant (2023) to improve multicore architecture performance. Recent publications emphasize hardware transactional memory efficiency, speculative execution, and secure cache systems. Notable works include cache locking, memory dependency prediction, and fine-grain coherence protocols. Scientific awards : Inducted into the MICRO Hall of Fame ISCA Hall of Fame 27 HiPEAC paper awards (MICRO, ISCA, HPCA, ASPLOS) Winner, ML-based Data Prefetching Competition Winner, 1st Instruction Prefetching Championship IEEE MICRO TopPicks for ISCA'17, MICRO'21 (honorable), MICRO'16 (honorable) Best paper awards at HiPC'16, FORTE'16 Honorable mention at HPCA'24 Nomination at ISCA'22 Grants as Principal Investigator include ERC Proof of Concept (2023) ERC Consolidator (2018) Europe Excellence (2018) Seneca Foundation, Young Leaders in Research (2014) . Dr. Ros is affiliated with the Computer Architecture and Parallel Systems Group (CAPS) at the University of Murcia and previously with UPMARC at Uppsala University.

Zhiyuan Liمشاهده پروفایل

استاد

• Program Analysis
• Compiler Design
• Parallel Computing
• +۶ مورد دیگر

Zhiyuan Li is a Professor in the Department of Computer Sciences at Purdue University's College of Engineering. His primary research and teaching focus on program analysis, transformation, and run-time management for high-performance computing and multicore systems, as well as reliable software for networked embedded systems. Professor Li teaches graduate-level courses including CS502: Compiling and Programming Systems and CS591RS1: Research Seminar for First-year Graduate Students. Office: LWSN 3154H Contact: li@cs.purdue.edu Phone: +1 765-494-7822 Professor Li's research spans multiple areas within computer science, with particular emphasis on compiler design, program analysis, and parallel computing. His work addresses fundamental challenges in enabling efficient execution of applications on modern parallel architectures, including multicore processors and large-scale distributed systems. He has made significant contributions to techniques for data dependence analysis, loop parallelization, array privatization, and memory optimization in compilers. His research also extends to reliable software development for embedded and sensor network systems, where resource constraints and reliability requirements present unique challenges. Professor Li's publication record demonstrates consistent contributions to top-tier conferences and journals in computer science, particularly in the areas of parallel computing, compiler optimization, and high-performance numerical methods. His work shows a progression from foundational compiler techniques to applications in scientific computing domains such as computational fluid dynamics for jet engine noise simulation. This interdisciplinary approach connects low-level program analysis with real-world engineering applications requiring petascale computing resources. Principal Investigator for NSF/PetaApps project on jet engine noise simulation Principal Investigator for Intel-sponsored research on data dependence profiling Extensive service on program committees for major conferences including ICS, PPoPP, and LCTES Professor Li has been actively involved in mentoring graduate students through research projects and course instruction. His jet engine noise simulation project specifically mentions training three Ph.D. graduate students and involving undergraduate research assistants. As coordinator for the first-year graduate research seminar, he plays a significant role in guiding new students through the transition to graduate research work in computer science. His laboratory work focuses on developing compiler techniques and runtime systems for parallel and high-performance computing. The research infrastructure includes implementations in GCC for fast data dependence profiling and support for SIMD/SSE instructions, demonstrating practical applications of theoretical compiler techniques.

Arthur F Witulskiمشاهده پروفایل

استاد پژوهشی

• Radiation Effects on Electronic Devices
• Power Semiconductor Reliability
• Space System Radiation Hardening
• +۳ مورد دیگر

Arthur F Witulski is a Research Professor of Electrical Engineering at Vanderbilt University's School of Engineering. He specializes in radiation effects on electronic power semiconductor devices and systems, focusing on radiation reliability in aerospace and nuclear environments. His research addresses challenges in satellites, robotics, and high-reliability power electronics. Education: PhD, MS, and BS in Electrical Engineering from the University of Colorado. Research Interests include radiation hardening of power electronics, semiconductor reliability under ionizing environments, and system-level modeling of radiation effects. His work spans energy systems, nano-materials, and risk mitigation strategies for complex engineering projects. Key contributions include developing models for SiC power device failures, Bayesian assurance frameworks for space systems, and methodologies linking component-level testing to system reliability. His recent articles emphasize single-event effects in advanced semiconductors and radiation tolerance in commercial-off-the-shelf (COTS) components. Witulski has pioneered radiation assurance tools for small satellites and robotic systems, emphasizing probabilistic modeling and fault-tolerant designs. His work integrates theoretical physics with practical engineering solutions for harsh radiation environments.

Donatella Sciutoمشاهده پروفایل

استاد

• Electronic Design Automation
• Embedded Systems
• Multiprocessor Systems
• +۵ مورد دیگر

Donatella Sciuto is a Full Professor of Computer Science and Engineering at Politecnico di Milano, serving as Executive Vice Rector overseeing research strategies. She holds a PhD from the University of Colorado, Boulder and an MBA from Bocconi University. Her research focuses on embedded systems design, low-power electronics, and cyber-physical systems, with contributions to smart cities and ICT infrastructure. Education: Bachelor's in Electronic Engineering, Politecnico di Milano (1984) PhD in Electrical and Computer Engineering, University of Colorado, Boulder MBA, SDA Bocconi School of Management Research Interests: Embedded systems, multiprocessor architectures, hardware/software co-design, power-efficient computing, and building automation via IoT technologies. She leads the Embedded Systems Design research group at Politecnico di Milano and coordinates EU-funded projects in smart cities and reconfigurable systems. Awards: IBM Women Leaders in AI (2021) IEEE Fellow (2011) EDAA Fellow (2010) Outstanding Contribution Award, IEEE Computer Society (2009) Professional Roles: Board Member: Bank of Italy, Istituto Italiano di Tecnologia, STM, Avio Former President, IEEE Council of Electronic Design Automation (2011-2013) Executive Committee Member, Design Automation and Test in Europe (DATE) conference Labs/Teams: Leads the Embedded Systems Design and Design Methodologies group at Politecnico di Milano, collaborating with CEFRIEL on executive education programs in embedded systems and IoT.

Donald Yeungمشاهده پروفایل

استاد

• Computer Architecture
• Computer Engineering
• Memory Systems
• +۵ مورد دیگر

Donald Yeung is a Professor and Associate Chair for Undergraduate Education in the Department of Electrical and Computer Engineering at the University of Maryland , with an additional appointment as Affiliate Professor in the Department of Computer Science . His research focuses on Computer Architecture , particularly in memory systems , 3D integration , energy-efficient processors , and parallel processing . He leads projects like Monolithic 3D Integration of CPU and Main Memory and Approximate Computing . Recent work emphasizes ReRAM-based memory architectures , extreme-scale processor design , and micro-fluidic cooling solutions for 3D CPUs. His teaching includes courses like ENE 646: Computer Architecture and ENE 150: Intermediate Programming Concepts . Key achievements include the Best Paper Award at MULTIPROG-2017 and contributions to IEEE Micro and ACM Transactions . His research spans cache optimization , reuse distance analysis , and directory coherence protocols . Current grants include funding for heterogeneous microprocessor parallelism and low-power system design . Advises graduate students Yinuo Wang and Hung-Yu Yeh, and collaborates with teams like the UMIACS Technical Report Group . His lab focuses on memory-centric computing and scalable multicore systems .

• Computer Architecture
• High-Performance Computing
• Multicore and Manycore Systems
• +۷ مورد دیگر

Miquel Moreto Planas is a Senior Lecturer in the Department of Computer Architecture at the Barcelona School of Informatics, Universitat Politècnica de Catalunya (UPC). He is also affiliated with the Barcelona Supercomputing Center (BSC-CNS), a leading institution in high-performance computing. His academic profile is deeply rooted in computer architecture and high-performance computing, with a strong emphasis on practical and theoretical advancements in multicore systems, memory management, and hardware acceleration. His research interests span a wide range of topics including computer architecture, high-performance computing, multicore and manycore systems, cache and memory management, hardware acceleration for genomics and AI, RISC-V processor design, processing-in-memory, interconnection networks, and real-time systems. These interests are reflected in his extensive publication record and collaborative projects. The most recent articles highlight a significant trend toward interdisciplinary research, particularly the application of advanced computer architecture techniques to bioinformatics and healthcare. Key themes include the acceleration of genomic sequence alignment using novel hardware such as processing-in-memory, the development of benchmarks for ARM-based HPC systems in genomics, and the creation of AI-based 3D decision support tools for neurosurgical applications. His work also continues to advance core computer architecture topics like cache management, power-aware resource allocation in heterogeneous systems, and the design of secure, post-quantum cryptographic hardware based on RISC-V. Fulbright Award 2011 HiPEAC Paper Award HiPEAC Paper Award 2024 HiPEAC Paper Award Moreto has been a principal investigator or key contributor to multiple competitive R&D+i projects, such as the STRATUM project for neurosurgical tools, REDIOH for open hardware, and the Laboratorio Zettaescala de Barcelona. He has advised several doctoral students, including López, G., Kostalampros, I., and Haghi, A., and is a core member of the CAP (High Performance Computing) research group at UPC. His work is characterized by strong collaborations with leading researchers like Mateo Valero, Eduard Ayguadé, and Jesús Labarta, often bridging the gap between UPC and BSC-CNS. His laboratory and team affiliations are centered around the CAP group and the Barcelona Supercomputing Center, where he contributes to cutting-edge research in high-performance and embedded computer architectures. His recent work on the BIMSA accelerator and the STRATUM project demonstrates a clear future direction toward applying high-performance computing solutions to critical problems in genomics and medicine.

• Computer Architecture
• Parallel Computing
• Compiler Technology
• +۳ مورد دیگر

Keiji Kimura is a Professor in the Department of Computer Science and Engineering at Waseda University's Faculty of Science and Engineering, School of Fundamental Science and Engineering. He earned his Doctor of Engineering from Waseda University and has held academic positions at the university since 1999, progressing from Research Associate to Assistant Professor (2004-2005), Associate Professor (2005-2012), and Professor (2012-present). He is affiliated with multiple professional organizations including ACM, IEEE Computer Society, The Institute of Electronics, Information and Communication Engineers, and Information Processing Society of Japan. His research focuses on computer architecture, particularly parallel computing systems and compiler technology. Kimura has made significant contributions to the development of the OSCAR (Optimally Scheduled Advanced Multiprocessor) automatic parallelizing compiler framework. His work spans multiple areas including multicore processor architecture, power reduction techniques for embedded systems, non-volatile memory systems, and parallelization methods for heterogeneous architectures. His research interests specifically include Multiprocessor Architecture and Parallelizing Compiler development, with applications in real-time systems and energy-efficient computing. Analysis of his recent publications reveals a strong focus on practical implementations of parallel computing technologies across diverse hardware platforms including RISC-V, ARM, and heterogeneous multicore systems. His work demonstrates a consistent trajectory from theoretical compiler development toward practical applications in embedded systems, security, and non-volatile memory technologies. The publications show increasing emphasis on RISC-V architecture, persistent memory programming, and power-efficient computing solutions. MEXT Award for Science and Technology (Research category), 2014.04 Ministry of Education, Culture, Sports, Science and Technology (MEXT) Kimura has served on numerous prestigious conference program committees including PACT, IPDPS, HPCA, and LCPC. His research has been supported through collaborations with major technology companies and government initiatives such as the METI/NEDO project entitled "Multicore Technology for Realtime Consumer Electronics." His work with the OSCAR compiler framework has demonstrated significant performance improvements and power reductions in real-world applications. He leads research in the APAL laboratory (http://www.apal.cs.waseda.ac.jp/) at Waseda University, focusing on advanced parallel processing technologies. His team works on compiler-directed approaches to solve challenges in heterogeneous multicore architectures, with particular emphasis on making parallel programming more accessible while optimizing for both performance and power efficiency. Current research directions include RISC-V secure boot verification, non-volatile memory systems, and GPU-based persistent memory solutions.

• Optimizing Compilers
• Runtime Systems
• Embedded Systems
• +۵ مورد دیگر

Summary Role & Affiliation: Mahmut Taylan Kandemir is a Professor in the Department of Computer Science and Engineering at Pennsylvania State University. He is a member of the Microsystems Design Lab and has held roles such as Graduate Program Coordinator. His research focuses on optimizing compilers, runtime systems, embedded systems, and storage technologies. Education: B.S. and M.S. from Istanbul Technical University (Computer Engineering), Ph.D. from Syracuse University (Computer Science). Research Interests: Kandemir’s work spans compiler optimization, energy-efficient architectures, non-volatile memory systems, and cloud storage. His research has been funded by NSF, DARPA, and industry partners like Intel and Microsoft. Articles & Contributions: Over 150 journal papers and 650+ conference publications, covering topics like compiler-driven storage efficiency, 3D NAND SSD optimization, and approximate computing frameworks. Awards: NSF Career Award, Penn State Premier Research Award, IEEE Fellow, and multiple best paper awards. His contributions include compiler tools and storage systems for high-performance computing. Advising & Grants: Advised 32 Ph.D. and 20 M.S. students. Active in program committees for conferences like MICRO, ISCA, and HPCA. Current grants focus on cloud resource management and emerging memory technologies. Labs & Collaborations: Leads projects in collaboration with Argonne National Lab, NVIDIA, and Intel. His work bridges academia and industry, addressing challenges in multicore and embedded systems.

• High-Performance Computing
• Energy-Efficient Computing
• Parallel and Distributed Systems
• +۵ مورد دیگر

Ravi Reddy Manumachu is an Assistant Professor in the School of Computer Science at University College Dublin (UCD), Ireland. He holds a B.Tech from IIT Madras (1997) and a PhD in Computer Science from UCD (2005), specializing in high-performance heterogeneous computing and energy-efficient systems. His research focuses on optimizing performance and energy efficiency in modern heterogeneous platforms like clouds, grids, and supercomputers through novel models and algorithms. Key contributions include functional performance/energy models, energy-prediction frameworks, and extensions like Heterogeneous MPI and ScaLAPACK for heterogeneous clusters. He has published over 69 articles in top journals/conferences, with recent works addressing data transfer energy measurement, scalable allreduce algorithms (SUARA), and portable programming models (OpenH). Professional roles include Assistant Professor at UCD (2023–present), SEAI Research Fellow (2022–2023), and prior industrial experience at Ansys, Siemens, and IONA Technologies. He has certifications in university teaching, GDPR, and research integrity. Languages include English (fluent), Telugu, and Hindi. Research trends emphasize bi-objective optimization (performance-energy), hardware heterogeneity challenges, and scalable communication algorithms for deep learning. His work addresses energy non-proportionality in CPUs and GPU-CPU interactions, with practical solutions for real-world applications like matrix operations and gene sequencing.

Shengquan Wangمشاهده پروفایل

دانشیار

• Real-Time Systems
• Cybersecurity
• Sustainable Computing
• +۶ مورد دیگر

Dr. Shengquan Wang is an Associate Professor in the Department of Computer and Information Science at the University of Michigan-Dearborn , affiliated with the College of Engineering and Computer Science . His career spans over a decade, with prior academic experience at Texas A&M University as a Research/Teaching Assistant. He received his Ph.D. in Computer Science from Texas A&M University in 2006, preceded by M.S. degrees in Mathematics (Texas A&M, 2000) and Applied Mathematics (Shanghai Jiao Tong University, 1998), and a B.S. in Mathematics (Anhui Normal University, 1995). Research Interests Real-Time Systems Sustainable Computing (Power/Energy/Thermal Management) Networks and Distributed Systems Security and Privacy Optimization and Machine Learning Publication Trends His work focuses on real-time systems under thermal constraints , secure overlay architectures , and energy-efficient server farms . Recent research explores statistical delay guarantees in wireless networks and nonmonotone optimization techniques . Collaborations span institutions like Texas A&M University and Karlsruhe Institute of Technology. Awards and Grants NSF CAREER Award (CNS 0746906) Rackham Faculty Research Grant Best Paper Award at ECRTS 2006 Advising and Leadership Dr. Wang advises Ph.D. and Master's students like Jun Liu and Nan Wang, fostering innovation in sustainable systems. He leads the Research Laboratory for Sustainable Systems (RLSS) , focusing on thermally constrained real-time systems and secure computing.

Zhu Zhichunمشاهده پروفایل

دانشیار

• Computer architecture
• Performance modeling and evaluation
• Energy-efficiency computer designs

Zhu Zhichun is an Associate Professor in the Department of Electrical and Computer Engineering at the University of Illinois at Chicago, College of Engineering. His primary research focuses on computer architecture, performance modeling, and energy-efficient designing of computer systems. Ph.D. in Computer Science from College of William and Mary (2003) B.Sc. in Computer Engineering from Huazhong University of Science and Technology, China (1992) His research interests center around computer architecture , particularly in performance modeling and evaluation , energy-efficiency computer designs , and memory system optimization . He investigates techniques for improving power efficiency, thermal management, and bandwidth utilization in DRAM and PCM memory systems, with a focus on multicore processors and low-power designs. Zhu's publications demonstrate consistent work in memory architecture and power-efficient computing . Key trends include thermal modeling , DRAM optimization , and hybrid memory systems . His collaborations with Zhao Zhang, Jiang Lin, and other researchers highlight interdisciplinary approaches to solving computer architecture challenges.