جستجوی استاد راهنمای دانشگاهی

José F. Martínezمشاهده پروفایل

استاد

• Computer Architecture
• Microprocessor Design
• Multiprocessor and Multicore Architectures
• +۵ مورد دیگر

José F. Martínez holds the Lee Teng-hui Professorship of Engineering at Cornell University's College of Engineering, where he leads research in computer architecture and systems. His roles include Vice Chair of ACM SIGARCH, IEEE Fellow, and past leadership roles in ISCA, MICRO, and IEEE Computer Society journals. He has received prestigious awards such as the NSF CAREER Award, IBM/Qualcomm Faculty Awards, and multiple teaching accolades including Tau Beta Pi Professor of the Year (2011). Education: Licenciado en Informática de Sistemas (1996), Universidad Politécnica de Valencia M.S. (1999) and Ph.D. (2002) in Computer Science, University of Illinois at Urbana-Champaign His research focuses on computer architecture , including microprocessors, multiprocessors, memory subsystems, embedded systems, and processing-in-memory (PIM) innovations. He co-leads the DARPA/SRC ACE Center for Evolvable Computing and NSF's CROPPS Center, and previously co-founded Cornell's Institute for Digital Agriculture (CIDA). His work bridges hardware-software co-design and sustainable computing. Key Contributions: Advancing energy-efficient multiprocessor architectures Developing PIM frameworks like PUMICE and Membrane Market-based resource allocation systems (e.g., XChange, ReBudget) His advising spans over 15 graduate students and has guided Merrill Presidential Scholars. Current research explores evolvable computing paradigms and AI hardware acceleration, reflecting his dual focus on foundational architecture and applied systems innovation.

• Computer Architecture
• Computer Hardware
• Energy Efficiency
• +۴ مورد دیگر

Nam Sung Kim is the W. J. "Jerry" Sanders III-Advanced Micro Devices Inc. Endowed Chair and holds a Professorship in Electrical and Computer Engineering at the University of Illinois. He is also affiliated with the Siebel School of Computing and Data Science, Coordinated Science Lab, and National Center for Supercomputing Applications (NCSA). His research focuses on computer architecture, memory systems, chiplet integration, and hardware security. Key areas include energy-efficient computing, processing-in-memory (PIM), and mitigating hardware vulnerabilities like rowhammer attacks. Kim has received prestigious awards including IEEE Fellow (2016), MICRO Hall of Fame (2018), NAI Fellow (2023), and NSF CAREER Award (2015). His work spans publications in top venues like ASPLOS and IEEE journals, addressing topics such as CXL-based memory systems, DRAM module optimization, and GPU architecture improvements. Collaborations emphasize interdisciplinary research in hardware-software co-design and emerging technologies. His labs and teams at Coordinated Science Lab and NCSA drive innovations in scalable computing, near-memory processing, and cloud infrastructure for AI workloads. Ongoing projects include developing resilient memory hierarchies and accelerating large-scale machine learning models through novel architecture designs.

Borivoje Dakicمشاهده پروفایل

دانشیار

• Quantum Information Theory
• Quantum Foundations
• Quantum Tomography
• +۵ مورد دیگر

Dr. Borivoje Dakic is an Associate Professor at the University of Vienna , affiliated with the Faculty of Physics and the Quantum Optics, Quantum Nanophysics and Quantum Information department. His research spans foundational and applied aspects of quantum theory. Operational reconstruction of quantum formalism Quantum interference as a resource for communication Tomography of large-scale quantum systems Macroscopic quantum phenomena His work includes scalable verification techniques for quantum devices and collaborations with experimental teams like Philip Walther’s and Markus Aspelmeyer’s groups. He received the Marko Jarić Prize (2025) for his contributions. Recent projects focus on diagnostics of quantum devices (FWF BeyondC SFB), information-theoretic foundations of quantum interference (FWF P36994), and local operations in quantum field theory (Cluster of Excellence QuantA). His research on quantum coherence in networks and macroscopic entanglement challenges traditional assumptions about quantum-classical boundaries. Publications emphasize resource-efficient tomography, device-independent verification, and foundational frameworks for quantum statistics and field theory. Teaching: Quantum Information (2025W), Theory in Quantum Optics (2025S), VCQ Summerschool Labs: Dakić Group at University of Vienna

• Bioinformatics
• Computer Architecture
• Genome Analysis
• +۳ مورد دیگر

Can Firtina is a Lecturer at ETH Zurich's Department of Information Technology and Electrical Engineering and a Senior Researcher in the SAFARI Research Group. His research focuses on accelerating genome analysis through algorithm-architecture co-design, particularly leveraging hardware-software integration for bioinformatics workloads. He holds a PhD in Electrical and Computer Engineering from ETH Zurich and degrees from Bilkent University. As of Fall 2025, he will join the University of Maryland, College Park (UMD) as an Assistant Professor of Computer Science. Education: PhD in Electrical and Computer Engineering (D-ITET), ETH Zurich MSc in Computer Engineering, Bilkent University BSc in Computer Engineering, Bilkent University Research Interests: His work bridges bioinformatics and computer architecture, emphasizing real-time, accurate, and energy-efficient genome analysis. Key areas include raw nanopore signal processing (e.g., RawHash, Rawsamble), hardware-software co-design for bioinformatics, and scalable metagenomic analysis. His algorithms address noise mitigation and accelerate applications like assembly polishing (Apollo) and alignment remapping (AirLift). Labs & Collaborations: He leads research within the SAFARI Group, collaborating with institutions like NVIDIA, AMD, and Huawei. His contributions span tools like GenASM (approximate string matching) and BLEND (fuzzy seed matching). He also organizes workshops on bioinformatics acceleration and serves on review boards for venues like ISMB and RECOMB. Future Directions: Future work includes end-to-end raw signal analysis without basecalling, reference-free genome assembly, and leveraging emerging hardware for real-time field applications. He will expand these efforts at UMD, hiring students in Fall 2025.

Simon Mooreمشاهده پروفایل

استاد

• Computer Architecture
• Computer Security
• Hardware Security
• +۳ مورد دیگر

Simon Moore is a Professor of Computer Engineering at the University of Cambridge's Department of Computer Science and Technology. He leads the Computer Architecture research group, focusing on secure processors and subsystems, particularly the CHERI project. His work emphasizes formal verification, hardware-software co-design, and scalable security solutions. He is a Fellow and Director of Studies at Trinity Hall, overseeing undergraduate admissions and mentoring in Computer Science. Research Interests: Moore's primary focus is the CHERI secure processor architecture, integrating RISC-V cores with formal verification. His work spans secure hardware design, memory safety, and embedded systems. Notable contributions include the CHERI-RISC-V microarchitecture, CheriABI, and formal verification frameworks. Key Projects: CHERI, CheriBSD, Morello (ARM collaboration) Recent Achievements: Test of Time Award (IEEE Security & Privacy 2025), finalist for Bhattacharyya Award (2022) Grants: Innovate UK Digital Security by Design, DARPA Mission Oriented Resilient Clouds Publications: Over 200 papers on secure architectures, including influential work on CHERI's capability model, formal verification, and hardware security. Recent focus areas include temporal memory safety, embedded system security, and GPU-based capability systems. Labs/Teams: Directs the Computer Architecture Group and collaborates with industry partners like ARM and Microsoft on CHERI implementations.

• Optical Packet/Burst Switching
• High-Speed Optical Signal Processing
• Wireless Optical Networks – Radio-over-fiber access networks
• +۱۱ مورد دیگر

Pleros Nikos is a Professor in the Department of Informatics at Aristotle University of Thessaloniki (AUTH), leading the Photonics Systems and Networks (Phos-Net) research group and co-founding the interdisciplinary Wireless and Photonic Systems and Networks (WinPhoS) research group in 2016 at AUTH’s Center for Interdisciplinary Research and Innovation (C.I.R.I.). His office is located in Kalamaria, Office 15, with office hours Tuesday/Wednesday 10:00-12:00 and Thursday 16:00-17:00. His research spans optical and photonic systems, specializing in Optical Packet/Burst Switching, High-Speed Optical Signal Processing, Wireless Optical Networks (including Radio-over-fiber access networks), and High-Speed WDM/OTDM Optical Transmitters. The WinPhoS group, which integrates departments of Physics, Informatics, and Electrical Engineering, advances applications in integrated photonics, plasmonics, optical interconnects for DataCenters, neuromorphic photonics, and 5G mmWave fiber-wireless systems, supported by state-of-the-art laboratories for optical interconnects and mmWave testing. WinPhoS has participated in over 30 FP7 and Horizon EU research projects during the last 15 years, frequently serving as project coordinators, and maintains global collaborations with institutions and industry across Greece, Europe, the USA, and Japan. Professor Nikos actively mentors PhD students, with current openings in “Photonic Neural Networks and Photonic AI processors”, and oversees research grants focused on next-generation optical networking technologies.

Rohan Tabishمشاهده پروفایل

استادیار

• Real-Time Systems
• Embedded Systems
• Multicore Processors
• +۵ مورد دیگر

Rohan Tabish is an Assistant Professor in the Department of Computer Science at the University of Illinois at Urbana-Champaign (UIUC), specializing in real-time systems, embedded systems, and cybersecurity. His work focuses on developing predictable and secure software frameworks for multi-core and heterogeneous architectures. Education: Ph.D. in Computer Science and Engineering Master's in Computer Science and Engineering B.Sc. in Electrical Engineering with Telecommunications specialization Research Interests: Real-Time Task Scheduling Fault Tolerance in Embedded Systems Inter-Core Communication Frameworks Memory Bandwidth Management Cyber-Physical Systems Scratchpad-Centric Operating Systems Awards: Outstanding Paper & Best Paper Award (RTSS 2020) Outstanding Paper & Best Student Paper Award (RTSS 2020) Best Presentation Award (RTAS 2016) Nominated for Best Paper Award (ECRTS 2019) Teaching: CS 431: Embedded Systems (Instructor, 2015-2018) CS 424: Real-Time Systems (Instructor, 2019) CS 438: Communication Networks (TA, 2019) Labs/Teams: Active member of the Real-Time Systems Lab (RTSL) at UIUC, focusing on safety-critical embedded systems and real-time software frameworks.

• Computer Architecture
• Computer Systems
• Approximate Computing
• +۱۰ مورد دیگر

Pejman Lotfi-Kamran is an Associate Professor at the School of Computer Science, Institute for Research in Fundamental Sciences (IPM), Tehran, where he also serves as the head of the school and director of Turin Cloud Services. His research focuses on computer architecture, systems, approximate computing, and cloud computing, with an emphasis on performance and energy efficiency for big-data applications. His educational background includes: Ph.D. in Computer Science, EPFL (2013) M.Sc. in Electrical and Computer Engineering, University of Tehran (2005) B.Sc. in Electrical and Computer Engineering, University of Tehran (2002) Lotfi-Kamran's research spans computer architecture innovations, including data and instruction prefetching, networks-on-chip, coherence protocols, and many-core processor design. He has pioneered work on scale-out processors, neural acceleration for GPUs, and approximate computing frameworks. His publications appear in top venues such as ISCA, HPCA, MICRO, and IEEE/ACM journals. His recent articles reflect a strong trend in improving system performance through intelligent prefetching, efficient NoC designs, and energy-aware architectures. Key themes include reducing frontend bottlenecks, optimizing cache behavior, and enhancing data delivery in large-scale systems. His work often combines cross-stack insights with hardware-software co-design for real-world impact. Scientific awards and recognitions include: 2017 CADS Best Paper Award 2016 Young Faculty Award from Iran's National Elites Foundation 2012-2013 Intel Ph.D. Fellowship 2012 and 2011 HiPEAC Paper Awards 2011 HPCA Best Student Paper Finalist Multiple academic honors from University of Tehran He has advised several graduate students including Paria Darbani, Ali Ansari, Mohammad Bakhshalipour, and Farid Samandi, many of whom have co-authored significant papers. His teaching spans institutions like Sharif University of Technology, Iran University of Science and Technology, and EPFL, covering advanced computer architecture and multiprocessor systems. He has led research projects such as AxBench and CloudSuite on Simics, and contributed to national initiatives like Iran’s National Grid. He is actively involved in tool development and continues to shape research in next-generation computing systems. He leads the Turin Cloud Services initiative at IPM and is deeply engaged in both theoretical and applied aspects of computer systems research, with ongoing work in neural acceleration, approximate computing, and scalable architectures.

Subramanian Iyerمشاهده پروفایل

استاد

• System Scaling Technology
• Advanced Packaging
• 3D Integration
• +۲ مورد دیگر

Subramanian Iyer is a Distinguished Professor at the University of California, Los Angeles (UCLA), holding the Charles P. Reames Endowed Chair in Electrical Engineering with joint appointments in Electrical and Computer Engineering and Materials Science and Engineering. His laboratory focuses on cutting-edge semiconductor research. Primary research domains include: System Scaling Technology : Innovations in semiconductor miniaturization 3D Integration & Advanced Packaging : Techniques for vertical chip stacking and heterogeneous integration Memory Subsystems : Development of embedded DRAM and novel memory architectures Neuromorphic Computing : Hardware implementations of brain-inspired computing Publication analysis reveals three dominant themes across 35+ years of research: Semiconductor materials innovation (SiGe alloys, silicides, MBE growth) Memory technology evolution (embedded DRAM, eFUSE, low-latency designs) System integration advancements (3D packaging, TSV, heterogeneous integration) Significant honors include: IEEE Fellow (1995) and Daniel Noble Award (2012) National Academy of Inventors Fellow (2017) IBM Fellow (2010) with 30+ invention plateaus IMAPS Educator Award (2021) and Daniel C. Hughes Memorial Award (2020) He leads UCLA's NanoLab facility and has been featured in The New York Times and Wall Street Journal for pioneering chiplet technology. Current work focuses on megachip architectures and open-access semiconductor prototyping.

Mark Heinrichمشاهده پروفایل

دانشیار

• Parallel Computer Architecture
• Heterogeneous Architectures
• Active Memory and I/O Systems
• +۴ مورد دیگر

Mark Heinrich is an Associate Professor in the Department of Computer Science at the University of Central Florida (UCF), where he also serves as Undergraduate Coordinator for CS and IT, and Senior Design Coordinator. He previously held roles at Cornell University and has industry experience co-founding companies like Phanfare and Flashbase. His research focuses on parallel computer architecture, heterogeneous systems, cache coherence protocols, and multiprocessor simulation. Heinrich holds a Ph.D. in Electrical Engineering from Stanford University (1998) under John Hennessy, and a B.S. in Electrical Engineering and Computer Science from Duke University (1991). Research Interests His work spans parallel architectures, active memory systems, scalable cache coherence protocols, and hardware/software co-design. Recent efforts include innovations in persistent memory technologies and multiprocessor simulation methodologies. Teaching In Spring 2020, he taught CS Senior Design I and II courses (COP 4934/4935), with office hours focused on senior design and undergraduate coordination. Professional Background Associate Professor at UCF since 2003 Past roles: Director of UCF's School of Computer Science (2005), Associate Director of EECS (2005-2007) Co-founder of the Cornell Computer Systems Laboratory Contributed to the FLASH multiprocessor architecture and its simulation tools Labs & Projects He has been involved in projects like Active Memory Clusters and architectural support for multiprocessor systems. His work often bridges theoretical computer architecture with practical hardware implementations.

• Parallel File and Storage Systems
• Modular Supercomputing
• Resource Disaggregation and Virtualization
• +۶ مورد دیگر

Sarah Neuwirth is a tenured Professor for Computer Science at Johannes Gutenberg University Mainz (JGU) and a Visiting Researcher at the Jülich Supercomputing Centre. She manages JGU's High Performance Computing (HPC) division, coordinates regional/national HPC activities, and represents JGU in NHR, Gauss-Allianz, and HPC committees. Education : PhD (Dr. rer. nat.) in Computer Science (2018), Heidelberg University Diplom in Computer Science (2012), University of Mannheim Bachelor of Science in Computer Science (2010), University of Mannheim Research Interests : Parallel File and Storage Systems Modular Supercomputing (resource disaggregation/virtualization) Performance Engineering High Performance Computing Networking Reproducible Benchmarking Parallel I/O Publications Trends : Her work focuses on HPC performance modeling, parallel I/O optimization, modular supercomputing, network characterization, and reproducible benchmarks. Key themes include resource disaggregation, automated workflows, and data-intensive distributed applications. Scientific Awards : 2023 PRACE Ada Lovelace Award for HPC ZONTA Science Award 2019 Grants & Leadership : She leads the High Performance Computing division at JGU, participated in European DEEP projects, and serves on SC conference committees.

Zhu Zhichunمشاهده پروفایل

دانشیار

• Computer architecture
• Performance modeling and evaluation
• Energy-efficiency computer designs

Zhu Zhichun is an Associate Professor in the Department of Electrical and Computer Engineering at the University of Illinois at Chicago, College of Engineering. His primary research focuses on computer architecture, performance modeling, and energy-efficient designing of computer systems. Ph.D. in Computer Science from College of William and Mary (2003) B.Sc. in Computer Engineering from Huazhong University of Science and Technology, China (1992) His research interests center around computer architecture , particularly in performance modeling and evaluation , energy-efficiency computer designs , and memory system optimization . He investigates techniques for improving power efficiency, thermal management, and bandwidth utilization in DRAM and PCM memory systems, with a focus on multicore processors and low-power designs. Zhu's publications demonstrate consistent work in memory architecture and power-efficient computing . Key trends include thermal modeling , DRAM optimization , and hybrid memory systems . His collaborations with Zhao Zhang, Jiang Lin, and other researchers highlight interdisciplinary approaches to solving computer architecture challenges.

Kaiyan Qiuمشاهده پروفایل

استادیار

• 3D Printing
• Artificial Organs
• Wearable Electronics
• +۶ مورد دیگر

Kaiyan Qiu is the Berry Family Assistant Professor of Mechanical Engineering at Washington State University , leading interdisciplinary research at the intersection of 3D printing , artificial organs , and flexible electronics . His work combines advanced manufacturing techniques with biomedical innovation. Ph.D. in Fiber Science & Biopolymers from Cornell University (2012) Postdoctoral experience at University of Minnesota, Princeton University, and Dartmouth College Research focuses on: Medical Applications : 3D printed presurgical organ models (prostate, aortic root) with integrated sensors Wearable Electronics : Stretchable tactile sensors and photodetectors for health monitoring Biomimetic Systems : Bioinspired actuators and surfaces for robotics Advanced Printing : Multimaterial and multiscale additive manufacturing Recent publications address machine learning-enabled 3D printing , biomimetic device fabrication , and direct printing on freeform surfaces . Collaborations with Medtronic Inc. and Visible Heart Laboratory at UMN demonstrate clinical impact. Honors include: Berry Family Assistant Professor (2021) Best of 2018 article selection National Textile Center Competition Awards Liu Memorial Scholarship Qiu's lab develops customized 3D printing systems with motion control, ink dispensing, and monitoring subsystems for biomedical and robotics applications.

• Artificial Intelligence
• Machine Learning
• Big Data
• +۵ مورد دیگر

Lingjia Tang is an Assistant Professor in Computer Science with expertise in artificial intelligence, machine learning, big data, and no-code automation. Her research focuses on developing machine learning algorithms for medical data analysis and advancing no-code automation tools to democratize technology access. Research Interests Artificial Intelligence & Machine Learning Big Data Analytics & Graph-Based Retrieval No-Code Automation & User-Centric Systems Data Quality & Ethical AI Considerations Scientific Contributions With over 20 publications in prestigious journals, Dr. Tang's recent work explores: Graph-based retrieval frameworks (GraphRunner, TOBUGraph) LLM calibration and evaluation (SLMEval) Memory subsystem optimization in datacenters Meaning-typed programming paradigms Multi-agent conversational AI systems Awards 2023 Award for contribution to machine learning technologies Teaching Dr. Tang teaches courses in artificial intelligence, algorithms, and computational theory with a dynamic interactive approach. Current Projects Machine learning algorithms for medical diagnosis No-code automation tools for non-technical users

Guillermo Payá Vayáمشاهده پروفایل

استاد

• Embedded Systems
• Processor Architecture
• FPGA Design
• +۵ مورد دیگر

Prof. Dr.-Ing. Guillermo Payá Vayá leads the Chair for Chip Design for Embedded Computing at Technical University of Braunschweig's Faculty of Electrical Engineering, Information Technology, and Physics. His research focuses on processor architecture design, FPGA/ASIC implementations, and optimization techniques for embedded systems, particularly in high-performance, low-power, and radiation-hardened computing domains. Primary research interests include: Application-Specific Instruction Set Processors (ASIPs) and compiler co-design Radiation effects characterization and fault-tolerant hardware Ultra-low-power processor architectures for embedded AI Hardware acceleration of neural networks and computer vision algorithms Memory subsystem optimization and parallel computing techniques Recent publications demonstrate strong emphasis on radiation-hardened electronics (35% of recent works), AI accelerator design (27%), and ultra-low-power systems (20%), with growing interest in biomedical applications. Experimental validation through FPGA prototyping and semiconductor testing is a consistent methodology across research domains. Leads research team investigating: Radiation-tolerant FPGA architectures (Trumann, Weide-Zaage) Vector processor optimization (Gesper, Thieu) Nano-scale controller design (Weißbrich) AI-hardware co-design (Kautz, Beyer)