جستجوی استاد راهنمای دانشگاهی

Chengmo Yangمشاهده پروفایل

استاد

• Embedded Systems
• Design Automation
• Computer Architecture
• +۶ مورد دیگر

Dr. Chengmo Yang is a Professor in the Department of Electrical and Computer Engineering at the University of Delaware, with a joint appointment. She received her PhD and MSc in Computer Science from the University of California, San Diego, and a BSc in Microelectronics from Peking University, China. PhD, University of California, San Diego MSc, University of California, San Diego BSc, Peking University, China Her research focuses on enhancing security, reliability, non-volatility, and energy efficiency in embedded systems, cyber-physical systems (CPS), and Internet-of-Things (IoT). She leads the Computer Architecture, Reliability, and Security (CARES) group and has authored over 70 peer-reviewed publications. Recent publications emphasize neural network accelerators, non-volatile memory (NVM) optimization, and security frameworks for embedded systems. Her work explores fault tolerance, wear leveling, and side-channel attack mitigation in NVM-based FPGAs, STT-RAM, and SSDs. National Science Foundation Career Award (2013) University of Delaware Mid-Career Faculty Excellence in Scholarship Award (2020) Best paper award at ICESS (2019) Three best paper nominations at DAC, DATE, and GLSVLSI (2019) Dr. Yang serves as Associate Editor for IEEE TCAD and ACM TODAES. She is the Diversity & Inclusion Representative for IEEE CEDA and has organized numerous conferences including Technical Program Chair for CODES-ISSS 2022. Her lab has hosted current and former students like Fanruo Meng (PhD candidate), Fateme Hosseini (Qualcomm), and Patrick Cronin (Intel), focusing on graduate-level research in hardware security and reliability.

Rachit Agarwalمشاهده پروفایل

دانشیار

• Systems
• Networking
• Theory of Computing
• +۶ مورد دیگر

Rachit Agarwal is an Associate Professor in the Department of Computer Science at Cornell University, with research focusing on systems, networking, and theoretical problems arising in practical systems. He leads a research group working on resource disaggregation, host architecture, secure cloud storage, and datacenter design. PhD in Computer Science, Cornell University Undergraduate, IIT Kanpur His research spans three major directions: Resource Disaggregation (with $3M NSF and Google awards), Host Architecture (exploring terabit interconnects), and PANCAKE (secure oblivious cloud storage with $1M NSF award). He also contributed to foundational work in Near-optimal Datacenter Design and Data Plane Monitoring . Awards include the Sloan Fellowship, NSF CAREER, IRTF Applied Networking Prize, and multiple best paper awards. His recent publications focus on host network architecture, congestion control, oblivious data access mechanisms, and secure cloud storage systems. He has advised multiple Ph.D. and postdoctoral researchers who now hold faculty positions at leading institutions. Sloan Research Fellowship NSF CAREER award Kavli Fellowship IRTF Applied Networking Research Prize SIGCOMM Best Student Paper Award Usenix Security Distinguished Paper Award Tau Beta Pi Professor of the Year 2025 Rachit has advised numerous students including current Cornell advisees like Midhul Vuppalapati, Shreyas Kharbanda, and Omar Eqbal. Former advisees include Saksham Agarwal (UIUC), Qizhe Cai (UVA), and Mina Tahmasbi Arashloo (University of Waterloo). His research is supported by large NSF grants and industry awards, with deployments in real-world systems and open-source contributions.

Hyesoon Kimمشاهده پروفایل

استاد

• Computer Architecture
• GPU
• Compilers and Runtime Systems
• +۳ مورد دیگر

Hyesoon Kim is a Professor at the Georgia Institute of Technology , affiliated with the College of Computing and leading the HPArch research group . She co-directs the Center for Research into Novel Computing Hierarchies (CRNCH) . Her research focuses on Computer Architecture , GPU , Compilers and Runtime Systems , and Hardware Security , particularly for heterogeneous systems. Contact : hyesoon@cc.gatech.edu Location : 266 Ferst Drive, KACB 2344, Atlanta, GA Research Trends Her recent work spans RISC-V extensions for security, CUDA optimization on softcore GPUs, memory safety techniques, and energy-efficient deep learning architectures. Articles emphasize heterogeneous computing , GPU performance scaling, and IoT -oriented neural network methods. Open Source Projects She leads development of Macsim (heterogeneous architecture simulator) and Vortex (open-source GPU platform).

Tushar Krishnaمشاهده پروفایل

دانشیار

• Computer Architecture
• Interconnection Networks
• Networks-on-Chip
• +۴ مورد دیگر

Tushar Krishna is an Associate Professor in the School of Electrical and Computer Engineering at Georgia Institute of Technology, with a courtesy appointment in the School of Computer Science. He earned his PhD in Electrical Engineering and Computer Science from MIT in 2014, an MSE in Electrical Engineering from Princeton University in 2009, and a B.Tech in Electrical Engineering from IIT Delhi in 2007. His research spans computer architecture, interconnection networks, networks-on-chip (NoC), and AI/ML accelerator systems, with a focus on optimizing data movement in modern computing platforms. His work is funded by NSF, DARPA, IARPA, SRC, Department of Energy, Intel, Google, Meta, Qualcomm, and TSMC. His papers have been cited over 17,000 times, with three receiving IEEE Micro's Top Picks recognition, one earning an honorable mention, and four winning best paper awards. Dr. Krishna leads the Synergy Lab at Georgia Tech and has developed several influential tools including ASTRA-sim for distributed AI/ML training, MAESTRO and SCALE-sim for accelerator design space exploration, and Garnet2.0 for NoC simulation. His recent work focuses on large language model acceleration, distributed training systems, and neuro-symbolic AI architectures. He has received numerous teaching and research awards including induction into the HPCA Hall of Fame (2022), the Class of 1940 Teaching Effectiveness Award (2018), and the Roger P. Webb Outstanding Mid-career Faculty Award (2024). HPCA Hall of Fame Inductee (2022) Roger P. Webb Outstanding Mid-career Faculty Award (2024) Richard M. Bass/Eta Kappa Nu Outstanding Junior Teacher Award (2023) Roger P. Webb Outstanding Junior Faculty Award (2021) Class of 1940 Course Survey Teaching Effectiveness Award (2018) Dr. Krishna currently serves as Associate Director for the Center for Research into Novel Computing Hierarchies (CRNCH) and co-chair of the Chakra Execution Traces and Benchmarks Working Group. He has held the ON Semiconductor (Endowed) Junior Professorship at Georgia Tech (2019-2021) and has been a visiting professor at MIT EECS, Harvard University CS, and a researcher at Intel's VSSAD group.

Bahar Asgariمشاهده پروفایل

استادیار

• Computer Architecture
• Domain-Specific Architecture Design
• Near Memory Processing
• +۳ مورد دیگر

Bahar Asgari is an Assistant Professor in the Department of Computer Science at the University of Maryland, College Park. She holds appointments in CS, UMIACS, and ECE, and directs the Computer Architecture and Systems Lab (CASL). Her research focuses on domain-specific architecture design, near memory processing, and reconfigurable computing. Before joining UMD, she worked at Google, contributing to system optimization and memory utilization strategies. Education: Ph.D., Georgia Institute of Technology, 2021. Research Interests: Developing energy-efficient architectures for sparse problems, scientific computing acceleration, FPGA optimizations, and reconfigurable hardware systems. Her work addresses challenges in memory efficiency, parallelization, and hardware-software co-design across domains like machine learning and IoT. Key Awards: 2024 UMD Excellence in Teaching Award 2023 DOE Early Career Award Advising & Grants: Supervises 9 graduate students and leads projects sponsored by NSF, DOE, and industry partnerships. Her lab explores systolic arrays, near-data processing, and fault-tolerant computing. Labs/Teams: Directs CASL, which builds next-generation computing systems through hardware innovation and algorithm-architecture co-design.

• Computer Architecture
• Datacenter Systems
• Cloud-Native Server Architecture
• +۷ مورد دیگر

Babak Falsafi is a Full Professor at the School of Computer and Communication Sciences (IC) at EPFL, leading the Parallel Systems Architecture Laboratory (PARSA). He is a renowned expert in computer architecture, datacenter systems, and cloud-native server design. His research focuses on post-Moore era computing, emphasizing heterogeneous architectures, energy efficiency, and scalable IT infrastructure. Falsafi is the founder of EcoCloud, an EC-sponsored industrial-academic consortium investigating sustainable information technology. He holds ACM and IEEE fellowships, a Sloan Research Fellowship, and has contributed to major projects like Optimus Prime (data transformation acceleration), AstriFlash (flash-based online service systems), and Midgard (virtual memory re-design). His work spans hardware-software co-design, memory systems, and security. Falsafi advises numerous PhD students and collaborates with industry partners such as Google and Cavium. Key achievements include pioneering scalable multiprocessor architectures, snoop filters in IBM BlueGene, and spatial memory streaming in ARM cores. His lab develops open-source tools like QFlex for server simulation. He frequently presents at top conferences (HPCA, ISCA, MICRO) and chairs workshops on post-Moore infrastructure. Teaching roles include leading courses in computer architecture and parallel systems across multiple EPFL departments (SIN, EDIC, SSC, SMA). His work addresses datacenter challenges like the 'data tax' and mitigating latency through specialized accelerators.

Hiren Patelمشاهده پروفایل

استاد

• Real-Time Embedded Systems
• Computer Architecture
• Hardware for Machine Learning/AI
• +۹ مورد دیگر

Dr. Hiren Patel is a Professor in the Department of Electrical and Computer Engineering at the University of Waterloo. He holds a Doctorate in Computer Engineering from Virginia Tech and previously worked as a postdoctoral fellow at UC Berkeley under Edward A. Lee. His research focuses on real-time embedded systems, computer architecture, machine learning hardware, and cybersecurity. He teaches courses like ECE 150 (Programming), ECE 320/429 (Computer Architecture), and ECE 327 (Digital Systems). Research Interests: Cyber-physical systems and hybrid architectures Hardware/software co-design methodologies Predictable cache coherence protocols IoT and edge computing systems Security in embedded and real-time systems Recent work emphasizes cache coherence solutions for safety-critical systems and GPU acceleration strategies. His publications address challenges in multicore predictability, FPGA bandwidth optimization, and autonomous robotics orchestration. No specific awards are listed, though his extensive publication record indicates significant contributions to embedded systems research. He currently oversees graduate student applications focusing on his core research areas.

José F. Martínezمشاهده پروفایل

استاد

• Computer Architecture
• Microprocessor Design
• Multiprocessor and Multicore Architectures
• +۵ مورد دیگر

José F. Martínez holds the Lee Teng-hui Professorship of Engineering at Cornell University's College of Engineering, where he leads research in computer architecture and systems. His roles include Vice Chair of ACM SIGARCH, IEEE Fellow, and past leadership roles in ISCA, MICRO, and IEEE Computer Society journals. He has received prestigious awards such as the NSF CAREER Award, IBM/Qualcomm Faculty Awards, and multiple teaching accolades including Tau Beta Pi Professor of the Year (2011). Education: Licenciado en Informática de Sistemas (1996), Universidad Politécnica de Valencia M.S. (1999) and Ph.D. (2002) in Computer Science, University of Illinois at Urbana-Champaign His research focuses on computer architecture , including microprocessors, multiprocessors, memory subsystems, embedded systems, and processing-in-memory (PIM) innovations. He co-leads the DARPA/SRC ACE Center for Evolvable Computing and NSF's CROPPS Center, and previously co-founded Cornell's Institute for Digital Agriculture (CIDA). His work bridges hardware-software co-design and sustainable computing. Key Contributions: Advancing energy-efficient multiprocessor architectures Developing PIM frameworks like PUMICE and Membrane Market-based resource allocation systems (e.g., XChange, ReBudget) His advising spans over 15 graduate students and has guided Merrill Presidential Scholars. Current research explores evolvable computing paradigms and AI hardware acceleration, reflecting his dual focus on foundational architecture and applied systems innovation.

Morteza Fayaziمشاهده پروفایل

استادیار

• Electronic Design Automation (EDA)
• Machine Learning (ML) in Analog Circuit Design
• System-on-Chip (SoC) Design Automation
• +۳ مورد دیگر

Morteza Fayazi is an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Utah, with an adjunct position in the Kahlert School of Computing. His research focuses on Electronic Design Automation (EDA), applying machine learning to automate analog and mixed-signal circuit design, and developing high-performance computing systems. He holds a B.Sc. from Sharif University of Technology, and M.S.E./Ph.D. degrees from the University of Michigan. His research interests include AI-driven EDA, RF/circuit automation, and energy-efficient processors. Key achievements include the MEDAL lab’s work on terahertz radars, systolic-array processors (e.g., DAP and Versa), and open-source frameworks like FASCINET and Tablext. He has received awards such as the 2024 College of Engineering Dean’s ETR Fund and the 2017 Outstanding Undergraduate Thesis Award. Teaching responsibilities include multiple iterations of the Digital System Design course (ECE/CS 3700). His work spans over 15 peer-reviewed articles in IEEE Transactions, ACM, and top conferences like ICCAD and VLSI-SOC, emphasizing automation, efficiency, and AI integration in hardware design.

• Embedded Machine Learning
• High-Performance Computing
• Computer Architecture
• +۶ مورد دیگر

Holger Fröning is a full professor at Heidelberg University’s Institute of Computer Engineering (ZITI), where he leads the Hardware and Artificial Intelligence (HAWAII) Lab. His research focuses on embedded machine learning , high-performance computing , and hardware-software co-design , with emphasis on resource efficiency, power optimization, and emerging architectures like analog , photonic , and resistive memory systems. He has held leadership roles including Managing Director of ZITI (2023–present) and Dean of Studies for Computer Science (2019–2022) , and has collaborated with institutions such as NVIDIA Research, Chinese Academy of Sciences, and Graz University of Technology. Research Trends : His recent publications explore Bayesian neural networks , green machine learning , analog computing noise mitigation , and GPU/FPGA optimization . Articles highlight photonic computing for AI , memory-efficient training , and hardware-aware DNN compression . Scientific Awards : 2025 HiPEAC Paper Award (Nature Computational Science) 2014 Google Faculty Research Award Multiple Best Paper Awards (IPDPS, ICPP, ECML-PKDD workshops) Leadership & Service : Organized workshops (WEML, ITEM, F4HD), chaired tracks at EuroPar and ISC, and served on program committees for ICPR, ECAI, and FPL. Education & Affiliations : PhD and MSc from University of Mannheim (2007/2001). Sponsors include DFG, FWF, FFG, NVIDIA, SAP, and XILINX.

Antonio Gonzálezمشاهده پروفایل

استاد

• Computer Architecture
• Microarchitecture
• Compilers
• +۷ مورد دیگر

Antonio González is a full Professor at the Barcelona School of Informatics (FIB), Universitat Politècnica de Catalunya (UPC), where he is affiliated with the Department of Computer Architecture. He leads the Microarchitecture and Compilers (ARCO) research group, focusing on robust and energy-efficient computing systems, including general-purpose processors, GPUs, and cognitive computing architectures. His research spans computer architecture, microarchitecture, compilers, GPU design, and deep learning acceleration, with a strong emphasis on energy efficiency and memory optimization. His work integrates hardware and compiler techniques to enhance performance in modern computing systems. The recent publications highlight a strong trend in energy-efficient DNN acceleration, GPU microarchitecture, memory systems, and near-data processing. His team explores novel quantization methods, adaptive caching, and architectural extensions for vision and AI workloads, published in top-tier venues such as MICRO, ISCA, and IEEE/ACM journals. ACM Fellow (2020) ICREA Academia Award (2014, 2019, 2024) UPC Duran Farell Award (2008) HiPEAC 2024 Paper Award (twice) González has supervised several PhD students and leads competitive R&D+i projects, including those funded by ICREA and the European Research Council. His research group collaborates extensively within UPC and with international institutions. He is actively involved in advancing computer architecture through innovation in simulation, hardware design, and AI acceleration. He is a member of IEEE and ACM, and his work continues to influence both academic and industrial developments in high-performance and energy-efficient computing.

Tulika Mitraمشاهده پروفایل

استاد

• Hardware-Software Co-design
• Real-Time Embedded Systems
• Energy-Efficient Computing
• +۷ مورد دیگر

Professor Tulika Mitra is the Dean of the School of Computing and Vice Provost (Special Projects) at the National University of Singapore (NUS). She holds the Provost’s Chair Professor in the Department of Computer Science and has been instrumental in shaping academic policies and strategic initiatives at NUS since joining in 2001. PhD in Computer Science, Stony Brook University (2000) M.E. in Computer Science, Indian Institute of Science (1997) B.E. in Computer Science, Jadavpur University (1995) Her research focuses on hardware-software co-design for energy-efficient computing systems, particularly in real-time embedded systems, heterogeneous architectures, and AI accelerators. She leads major research programs such as the NRF Competitive Research Programme on Low-Power Edge Accelerators and the MOE Tier-3 Programme on Green AI , collaborating with industry leaders like ARM, AMD, and Meta. Her recent publications highlight innovations in CGRA optimization , sparse attention mechanisms , photonic-digital hybrid architectures , and low-power ML inference . These works often integrate compiler techniques, architectural design, and real-time constraints for edge computing applications. Scientific Awards : ESWEEK Test-of-Time Award (2022), ACM SIGDA Distinguished Service Award, IEEE CEDA Outstanding Service Recognition Award, Teaching Excellence Award (2006), and multiple best paper recognitions. Education Leadership : Spearheaded the Computer Engineering (CEG) Programme at NUS, a joint initiative between Engineering and Computing. As a mentor , she has supervised over 25 PhD students , many now in prominent academic or industrial roles. Her research group eCO Lab focuses on embedded computing challenges, while her grant collaborations include projects on 5G base stations, reconfigurable architectures, and IoT-optimized SoCs.

H.-S. Philip Wongمشاهده پروفایل

استاد

• Nanotechnology
• Semiconductor Technology
• Solid-State Devices
• +۵ مورد دیگر

H.-S. Philip Wong is the Willard R. and Inez Kerr Bell Professor in the School of Engineering at Stanford University, where he has been since 2004. He holds the rank of Professor in the Department of Electrical Engineering and serves as the Director of the Stanford Nanofabrication Facility. Prior to Stanford, he spent 16 years at IBM’s T.J. Watson Research Center and served as Vice President of Corporate Research at TSMC (2018–2020), remaining as Chief Scientist in an advisory role thereafter. Leadership roles include founding the Stanford SystemX Alliance and leading the Microelectronics Commons AI Hardware Hub funded by the CHIPS Act. Research focuses on nanotechnology, semiconductor devices, and next-generation computing architectures, including carbon nanotube electronics, 3D integration (N3XT/MOSAIC), and neuromorphic computing. Awarded IEEE Fellow (2001), the IEEE Andrew S. Grove Award, and the J.J. Ebers Award for contributions to electron devices. His work spans device physics, fabrication, and system integration, with over 600 publications. Key contributions include advancements in phase-change memory, carbon nanotube transistors, and compute-in-memory systems. He advises numerous students and collaborates with industry through initiatives like the Stanford Non-Volatile Memory Technology Research Initiative. Recent efforts emphasize AI hardware acceleration, cryo-CMOS for quantum computing, and scalable memory architectures. His lab innovations include CellChips for synthetic biology and hyperdimensional computing using 3D RRAM.

• Computer Architecture
• Machine Learning
• Approximate Computing
• +۳ مورد دیگر

Hadi Esmaeilzadeh is an Associate Professor at the University of California, San Diego in the Department of Computer Science and Engineering . He leads the Alternative Computing Technologies (ACT) Laboratory and serves as Associate Director of the Center for Machine Integrated Computing and Security (MICS) . Previously, he was an Assistant Professor at Georgia Institute of Technology. Ph.D., Computer Science and Engineering, University of Washington (2013) Research focuses on computer architecture , machine learning acceleration , and approximate computing His work has produced 15+ publications spanning IEEE Micro Top Picks , CACM Research Highlights , and ISCA . Key projects include: Tabla : Cross-stack ML acceleration framework DnnWeaver : Open-source DNN acceleration platform Major honors include: IEEE TCCA Young Computer Architect Award ISCA Hall of Fame Qualcomm Innovation Fellowship Georgia Tech PURA Award Teaching roles: CSE 141: Introduction to Computer Architecture CSE 240D: Accelerator Design for Deep Learning CSE 240A: Principles of Computer Architecture

Vijay Kumarمشاهده پروفایل

استاد

• Robotics
• Multi-Robot Systems
• Micro Aerial Vehicles
• +۶ مورد دیگر

Vijay Kumar is the Nemirovsky Family Dean of Penn Engineering at the University of Pennsylvania, with faculty appointments in the Departments of Mechanical Engineering, Computer and Information Science, and Electrical and Systems Engineering. He is a leading figure in robotics and computer architecture research. Research Interests include robotics, particularly multi-robot systems and micro aerial vehicles (MAVs), as well as computer architecture innovations for machine learning, GPU acceleration, and datacenter efficiency. His work spans theoretical foundations and practical applications in autonomous systems and hardware optimization. Scientific Awards include: 1991 NSF Presidential Young Investigator Award 1996 Lindback Award for Distinguished Teaching 2012 ASME Mechanisms and Robotics Award 2014 Engelberger Robotics Award 2017 IEEE George Saridis Leadership Award Multiple best paper awards at DARS, ICRA, and RSS conferences Editorial Leadership includes serving as Editor of the ASME Journal of Mechanisms and Robotics and Advisory Board Member of AAAS Science Robotics Journal . His GRASP Lab team developed foundational frameworks for micro UAV testbeds and swarm robotics.