Alice Wang is an Assistant Professor of Instruction in the Department of Computer Science at the University of Texas at Dallas (UT Dallas), affiliated with the Erik Jonsson School of Engineering and Computer Science. Her research focuses on low-power electronics, energy harvesting systems, and advanced circuit design for mobile and embedded applications. She has contributed to innovations in ultra-low-power (ULP) SoCs, wireless sensor networks, and energy-efficient processor architectures. Key research interests include optimizing energy consumption in 3D-ICs, developing self-powered systems using multimodal energy harvesting, and improving thermal and power management in integrated circuits. Her work spans topics such as low-voltage circuit design, wake-up receiver architectures, and adaptive voltage scaling techniques for mobile processors. Her publications highlight advancements in low-power radio design, thermal-aware system architectures, and hardware-software co-optimization strategies. Recent work emphasizes industrial IoT applications, machine health monitoring systems, and energy-efficient embedded computing solutions. No academic awards or grants are explicitly mentioned in the provided texts. She has advised no students listed in the current data. Her research often intersects with industry challenges in battery-operated devices and scalable microsensor networks.
Lu Peng holds the Yahoo! Founder Chair in Science and Engineering at Tulane University. His research spans computer architecture with focus on GPU optimization, quantum computing, and blockchain acceleration. Peng develops specialized hardware architectures for emerging computing paradigms, including quantum processors, blockchain processing units (BPUs), and efficient GPU memory systems. Recent innovations include GeauxTrace blockchain contact tracing and high-throughput GPU database indexing techniques. Awarded the ORAU Powe Award (2007) and IEEE conference best papers (2019, 2001), Peng maintains active research in computer systems design. He teaches graduate and undergraduate courses in computer architecture while directing research on next-generation computing paradigms.
Hazem Ali is a Senior Lecturer at Halmstad University's School of Information Technology. He holds a Ph.D. in Electrical and Computer Engineering from Faculdade de Engenharia da Universidade do Porto (FEUP) and an M.Sc. in Computer Science and Engineering from Halmstad University. His research focuses on embedded systems, real-time systems, and dataflow programming models. He has expertise in hardware/software co-design, parallel computing, and optimization of real-time applications. Education: Ph.D. in Electrical and Computer Engineering (FEUP, Portugal) M.Sc. in Computer Science and Engineering (Halmstad University, Sweden) Recent publications highlight his work in cybersecurity for autonomous vehicles, GPU acceleration of MIMO systems, and optimization of dataflow models. His projects include ELLIIT B02 (Beyond 5G Wireless) and CyberInfra (Cybersecure Traffic Infrastructure). Proficiency in tools includes MATLAB, C/C++, Java, VHDL, and dataflow languages like CAL and Sigma-C, with extensive international experience in Sweden, Portugal, and Egypt.
Daniel Chillet is a Professor in the Electronics Department at the National School of Applied Sciences and Technology (ENSSAT) , part of the University of Rennes 1. He has held significant administrative roles, including Director of Studies at ENSSAT from 2012 to 2015 and scientific leadership in international collaborations such as the USTH master’s program in Hanoi. Education: Not explicitly detailed in the provided text. Research Interests focus on reconfigurable architectures, real-time scheduling, and energy-efficient embedded systems. His work addresses dynamic reconfiguration for memory hierarchy optimization, energy modeling of FPGAs, and spatio-temporal task scheduling in 3D heterogeneous multi-core systems. He has pioneered the integration of optical networks in chip-level communication and developed neural network-based scheduling mechanisms. Teaching Activities include digital electronics, VHDL language, processor architecture, and real-time operating systems. He has developed pedagogical tools (e.g., JSimVEM, JSimRISC) to illustrate advanced RISC techniques and real-time methodologies like SART. Responsibilities span academic leadership roles at ENSSAT, national committee memberships (CNU Section 61), and international coordination of the USTH master’s program in Hanoi. He chairs workshops like RAPIDO and participates in organizing conferences such as DASIP and PATMOS. Research Projects include collaborations with Thomson CSF, ANR-funded initiatives (Open-People, FosFor), and CNRS-supported efforts. His work involves system-level exploration of reconfigurable architectures, fault management, and optical interconnects for 3D MPSoC. Advising: Supervised 12 PhD theses (e.g., Hai Khuat, Robin Bonamy) and mentored numerous master’s students (e.g., Rim Abid, Gia-Tam Phan). Conference Participation: Member of program committees for DCIS, RAW, ARC, GRETSI, and others. Organizer and General Chair for RAPIDO workshops (2018–2021).
Mario Badr is an Assistant Professor (Teaching Stream) in the Department of Computer Science at the University of Toronto, part of the Faculty of Arts and Science. His research focuses on computer architecture, with an emphasis on simulation tools for evaluating multi-core, heterogeneous, and energy-harvesting systems. He has contributed to methodologies for analyzing memory behavior, synchronization performance, and cache coherence in modern architectures. Key research areas include parallel computing, performance analysis of GPU offloading, and energy-efficient computing models like the EH framework. His work often involves developing synthetic traffic models (e.g., SynFull) to assess architectural designs under realistic conditions. These tools enable early-stage exploration of trade-offs in processor architectures, particularly for mobile and embedded systems. Dr. Badr’s publications span topics such as cache behavior modeling, multi-core scalability, and intermittent computing. His research bridges theoretical analysis and practical implementation, with applications in both academic and industry contexts. While no specific awards or grants are listed, his contributions to architecture evaluation frameworks reflect a strong focus on advancing computational efficiency and system design.
Lieven Eeckhout is a Professor at Ghent University, Belgium, in the Department of Electronics and Information Systems (ELIS), where he leads the PerformanceLab research group. His work spans computer architecture, performance evaluation and modeling, workload characterization, dynamic resource management, CPU/GPU microarchitecture, and sustainability. He has supervised a dozen PhD students and postdocs, with alumni now in academia (e.g., assistant professors at TU Eindhoven, ANU) and industry (e.g., Intel, Huawei). Education : PhD in Computer Science (Ghent University, 2002) Awards : ACM Fellow (2021), IEEE Fellow (2018), 2017 ACM SIGARCH Maurice Wilkes Award, 2017 OOPSLA Most Influential Paper Award, 2024 IEEE CAL Best Paper Award, Distinguished Artifact Evaluation Award at ASPLOS 2024, and multiple Hall of Fame/Top Pick recognitions. Research focuses on computer architecture and hardware/software interface , with recent emphasis on sustainability and processor design . Key projects include the Sniper multi-core simulator and ERC-funded initiatives like LSC (Load Slice Core) and DPMP (Dependable Performance Management). Articles highlight trends in GPU memory systems , vector runahead , and carbon-aware architectural models . Scientific honors include 2024 IEEE CAL Best Paper Award Distinguished Artifact Evaluation at ASPLOS 2024 IEEE/ACM MICRO 2023 Best Paper Award ISCA@50 25-Year Retrospective Selection ACM Fellow (2021) IEEE Fellow (2018) Maurice Wilkes Award (2017) IBM Belgium Prize for Informatics (2003) As a research advisor , he has mentored numerous PhD students, including Benyamin Eslami, Jaime Roelandts, and Hossein SeyyedAghaei. His grants include ERC Starting (2011-2017) and Advanced Grants (2018-2023). The PerformanceLab group explores topics like multi-core simulation , GPU architecture , and energy-proportional systems , with collaborations across institutions (e.g., TU Eindhoven, Intel, ANU).
Chen Liu is a Professor in the Department of Electrical & Computer Engineering at the Wallace H. Coulter School of Engineering & Applied Sciences, Clarkson University. His research focuses on runtime software behavior modeling via hardware-level data, with applications in multi-core architectures and cybersecurity. Ph.D., Electrical and Computer Engineering, University of California - Irvine (2008) M.S., Electrical Engineering, University of California - Riverside (2002) B.E., Electrical Engineering, University of Science and Technology of China (2000) Dr. Liu's research bridges processor architecture, embedded systems, and hardware-software co-design. Key areas include multi/many-core multi-threading , power-aware computing , operating system micro-architecture interaction , and reconfigurable computing . His work emphasizes security and resource optimization through hardware acceleration and virtualization. Over the past decade, Dr. Liu has pioneered hardware/software integrated approaches for runtime behavior modeling, advancing domains like many-core EEG processing, energy-efficient prefetching in mobile systems, and cloud-based virtual machine management. His collaborations with institutions such as Intel and the Air Force Research Lab underscore his impact in embedded and parallel computing. Air Force Research Lab (AFRL) Summer Faculty Fellow (2015-2016) Air Force Research Lab (AFRL) Visiting Faculty Research Fellow (2013) Dr. Liu has secured two NSF grants: the BRIGE grant (2011-2016) for broadening participation in engineering and the MRI grant (2016-2019) for research infrastructure. He leads the Cybersecurity, Autonomous System, and Machine Learning Engineering Lab (CAMEL), driving experimental studies in heterogeneous computing and runtime behavior analysis.
Seyed Majid Zahedi is an Assistant Professor in the Department of Electrical and Computer Engineering at the University of Waterloo. His research focuses on the intersection of computer architecture, computer systems, and theoretical computer science, with particular emphasis on game theory applications in distributed systems and resource allocation fairness. Education: PhD in Computer Science, Duke University, USA (2018) MSc in Computer Engineering, University of Tehran, Iran (2012) BSc in Computer Engineering, University of Tehran, Iran (2009) Research Interests: Zahedi explores advanced topics such as multi-agent systems, computational sprinting, and incentive mechanisms for distributed resource management. His work bridges theoretical foundations with practical implementations in data centers and multiprocessor systems. Teaching: Zahedi has taught courses including Real-Time Operating Systems (ECE 350), Systems Programming and Concurrency (ECE 252), and Special Topics in Computer Software (ECE 750). He emphasizes hands-on learning through lab projects and quizzes. Awards: Zahedi has received several accolades, including the Best Paper Award at HPCA 2018 and recognition in IEEE Micro Top Picks for contributions to resource fairness in multiprocessor systems. Advising & Grants: He currently advises over a dozen graduate and undergraduate students, focusing on projects like incentive-compatible blockchain protocols (Algorand) and cooperative load management (Malcolm). His research has been supported by grants for cybersecurity innovations.
Xing Cai is a Professor at the Department of Informatics, University of Oslo, specializing in Scientific Computing and Machine Learning. His academic career spans several decades with a consistent focus on high-performance computing and its applications to complex scientific problems. He maintains an active research profile with numerous publications in top-tier journals and conferences. Professor Cai's research interests encompass parallel programming and high-performance computing, performance modeling and optimization, automated code generation, heterogeneous computing, and numerical methods for solving partial differential equations. His work extends to specialized applications in computational cardiology, computational geoscience, and biomedical computing. His research bridges theoretical computer science with practical applications in medicine and earth sciences, demonstrating exceptional interdisciplinary reach. An analysis of his recent publications (2019-2024) reveals a strong trend toward leveraging novel hardware architectures (GPUs, AI processors, specialized accelerators) for scientific computing, with particular emphasis on cardiac modeling applications. His work shows increasing sophistication in hardware-aware algorithm design, with publications spanning from fundamental performance modeling to domain-specific applications. The interdisciplinary nature of his work is evident in the diverse range of journals and conferences where he publishes, from computer science venues to specialized medical and geoscience publications. Professor Cai leads or participates in several significant research projects including the EuroHPC Centre of Excellence: Numerical Modeling of Cardiac Electrophysiology at the Cellular Scale (MICROCARD-2), High resolution simulation of cardiac electrophysiology on realistic whole-heart geometries, Maelstrom Associate Team, ODISSEE, Simula-Berkeley Education and Research collaboration (SIMBER), and aCG eX3: Experimental Infrastructure for Exploration of Exascale Computing. These projects reflect his leadership in both computational methodology development and domain-specific applications. His research group maintains strong collaborations with medical researchers, particularly in cardiac electrophysiology, and with geoscientists working on reservoir simulation. The publications list demonstrates consistent mentorship of junior researchers, with frequent co-authorship patterns suggesting an active supervision of PhD and postdoctoral researchers. His work on the EMI model for cardiac tissue represents a significant contribution to computational cardiology with potential clinical applications. The laboratory environment surrounding Professor Cai's work appears to be well-equipped for high-performance computing research, with access to advanced hardware platforms including GPU clusters, AI processors, and specialized accelerators. His publications on the use of Graphcore IPUs, Xeon Phi processors, and NVIDIA architectures indicate a well-resourced research environment capable of experimenting with cutting-edge hardware.
Antonio Flores Gil is an Assistant Professor at the Computer Engineering Department within the University of Murcia (Spain). Contact: aflores@um.es, Phone: +34 868 884638. Research Interests : Processor microarchitecture Multicore systems Energy-efficient architectures His publications focus on heterogeneous interconnects , energy consumption reduction , and message management optimization in tiled CMP architectures. Key topics include network-on-chip design, address compression, and hardware prefetching techniques. Groups : ACCA Group (Advanced Communication and Computer Architecture) GACOP (Parallel Computing and Architecture Group, Univ. Murcia)
Pavlos Petoumenos is a Lecturer (Assistant Professor) in the Department of Computer Science at the University of Manchester and a Research Fellow of the Royal Academy of Engineering. He leads research within the Advanced Processor Technology (APT) group, focusing on compiler optimization and energy-efficient computing. Previously, he worked as a Research Associate and Senior Researcher at the University of Edinburgh under Hugh Leather. His research centers on compilers, runtime systems, and development tools designed to help programmers write fast, energy-efficient programs with minimal effort. With electronic systems consuming 10% of global electricity (projected to reach 20% by 2030), his work addresses the critical challenge of bridging the complexity gap between programmers and modern energy-efficient hardware. Key research areas include compiler optimization, machine learning applications in compilation, code size reduction, and quantum-classical programming integration. His recent publications reveal strong trends in applying machine learning to compiler optimization, particularly through active learning techniques and deep learning models. The research spans multiple domains including function merging, branch fusion, loop transformations, and energy profiling, with significant contributions to quantum programming language design. His work consistently targets real-world applications in multicore processors and interactive mobile environments. Award highlights include: Best Paper Award at CGO 2019 Distinguished Paper Award at ISSTA 2018 Best Paper Award at PACT 2017 Best Paper Award at CGO 2017 Best Paper Award at IISWC 2014 Royal Academy of Engineering Research Fellowship Petoumenos actively contributes to the research community through mentoring PhD students, organizing the biennial International Workshop on Code Optimisation for Multi and Many-Cores (COSMIC), and co-hosting the Compucast podcast where he serves as chief editor. His collaborations span multiple institutions including the University of Edinburgh, University of Lancaster, and University of St Andrews. He has secured significant research impact through tools like BenchPress and F3M that address practical challenges in compiler design and optimization. He leads the Advanced Processor Technology group and contributes to the Compucast podcast, which features interviews with computer science researchers, academic and industry news, and technical discussions. The podcast represents a collaboration between multiple UK universities and serves as an important outreach platform for computer science research.
Andreas Gerstlauer is a Professor and holder of the Cullen Trust for Higher Education Endowed Professorship in Engineering #6 at The University of Texas at Austin. He serves as the Associate Chair for Academic Affairs in the Chandra Family Department of Electrical and Computer Engineering. His academic appointments include membership in the Architecture, Computer Systems, and Embedded Systems (ACSES) research area and the Integrated Circuits & Systems (ICS) research area. Dr. Gerstlauer received his Dipl.-Ing. (M.S.) degree in Electrical Engineering from the University of Stuttgart, Germany in 1997 and M.S. and Ph.D. degrees in Information and Computer Science from the University of California, Irvine in 1998 and 2004, respectively. Prior to joining UT Austin in 2008, he was an Assistant Researcher in the Center for Embedded Computer Systems (CECS) at UC Irvine. His research focuses on embedded systems, cyber-physical systems, and the Internet of Things, with particular emphasis on electronic system-level design methods, system modeling, design languages, and embedded hardware/software synthesis. His work spans from novel hardware/software fabrics and System-on-Chip architectures to system-level design automation methods and tools, with special emphasis on underlying system modeling foundations. His research group, the System-Level Architecture and Modeling (SLAM) Lab, investigates resource-constrained and application-specific embedded, high-performance, and edge computing systems. Dr. Gerstlauer's publication record shows a consistent trajectory in advancing system-level design methodologies, with recent work focusing on IoT applications, deep learning inference at the edge, power modeling using machine learning techniques, and advanced simulation frameworks for heterogeneous architectures. His research bridges the gap between theoretical design methodologies and practical implementation, with commercial applications used by organizations including JAXA and NEC Toshiba Space Systems. Humboldt Research Fellowship (2016-2017) Best Research Paper Award at DAC (2016) Best Paper Award at SAMOS (2015) Outstanding Paper Award at ECRTS (2023) IEEE HSTTC Top Pick in Hardware Security (2021) Best Paper Award at MLCAD (2021) Dr. Gerstlauer has successfully mentored numerous Ph.D. and Master's students who have gone on to prominent positions at companies including Google, NVIDIA, Apple, AMD, Facebook, Intel, and Samsung. His research has been supported by major funding agencies including NSF, DOE, SRC, Sandia National Labs, and industry partners such as AMD, ARM, Intel, Qualcomm, and Samsung. He has served in leadership roles for major conferences including General Co-Chair for ESWEEK 2020-2021 and Program Committee Chair for CODES+ISSS 2015-2016. The SLAM Lab, under his direction, currently pursues active research in neuromorphic computing system co-design, accelerator-rich heterogeneous system architectures, and predictive modeling for next-generation heterogeneous computer system design. The lab maintains strong industry partnerships and has produced multiple open-source software tools including QLA-RTS, DeepThings, LIPPo, and NoSSim that have been adopted by both academic and industrial researchers.
Andy D. Pimentel is a Full Professor at the University of Amsterdam, where he chairs the Parallel Computing Systems (PCS) group within the Systems and Networking Lab at the Informatics Institute. His research focuses on multi-core and multi-processor computer systems, with emphasis on design, programming, and run-time management. Dr. Pimentel earned his PhD in Computer Science in 1998 and MSc in Computer Science in 1993, both from the University of Amsterdam. His educational background laid the foundation for his extensive work in computer architecture and embedded systems. His research interests span a wide range of topics including multi-core embedded systems, system-level design and simulation, design space exploration, performance and power analysis, system dependability, hardware/software co-design, run-time resource management, and Edge AI. His work consistently addresses the extra-functional aspects of computing systems such as performance, energy consumption, and system dependability, while also considering the productivity of designing and programming these complex systems. Analyzing his recent publications reveals a clear trajectory toward sustainable and efficient computing systems. His work has evolved from foundational research in embedded systems design space exploration to cutting-edge research in Edge AI, distributed deep learning, and energy-efficient computing. His publications demonstrate strong interdisciplinary connections between computer architecture, artificial intelligence, and sustainable computing. IEEE CEDA Outstanding Service Recognition Award DATE Fellow Award Professor Pimentel has held significant leadership roles in the academic community, serving as Chair of the Board for the Advanced School for Computing and Imaging (ASCI) since 2021, and as a Board member of ICT Research Platform Nederland (IPN) since 2020. He has organized major conferences including serving as General Chair for Design Automation and Test in Europe (DATE) 2024 and IEEE/ACM Embedded Systems Week 2026. His extensive service to the community demonstrates his leadership in the field of computer architecture and embedded systems. At the University of Amsterdam, Professor Pimentel leads the Parallel Computing Systems group, which investigates the design, programming, and run-time management of multi-core and multi-processor systems. The group's research emphasizes modeling, analysis, and optimization of performance, power/energy consumption, and system dependability, while also focusing on improving the productivity of designing and programming these complex systems.
Elliott Forbes is an Assistant Professor and Director of the Computer Engineering program at the University of Wisconsin-La Crosse's Computer Science & Computer Engineering Department. He holds a PhD in Computer Engineering from North Carolina State University (2016), with a focus on computer architecture. His research emphasizes heterogeneous multi-core processors, thread migration latency, and energy efficiency. He has developed tools like the RISC-V assembler 'dt' and the pipeline analysis tool 'dptv'. Education: BS (Michigan Tech, 2005), MS (NC State, 2008), PhD (NC State, 2016). Industry experience includes roles at Intel, Unisys, and Smiths Aerospace. Awards: IEEE Senior Member (2020), Best Paper Award at ICCD-34 (2016), MIT Lincoln Labs Fellowship (2007-2008). He teaches courses ranging from introductory computer systems to advanced topics in architecture and compiler design.
Estela Suarez is a Professor of High Performance Computing at the University of Bonn's Computer Science Department and holds leadership roles at the Jülich Supercomputing Centre (JSC) in Forschungszentrum Jülich. Her work focuses on advancing modular supercomputing architectures, heterogeneous systems, and application optimization for exascale computing. She currently serves as Chair of the EuroHPC Joint Undertaking's Research and Innovation Advisory Group (RIAG) and leads the Next Generation Architectures and Prototypes research group at JSC. Education includes a PhD in Physics from the University of Geneva (2010) and a Master's in Physics (Astrophysics specialization) from Universidad Complutense de Madrid (2004). She has held senior research positions at JSC since 2010 and has led major EU-funded projects like DEEP, DEEP-ER, and DEEP-SEA. Research interests include HPC system design, hardware-software co-design, and energy-efficient supercomputing architectures. She was awarded the University of Bonn's 2023/2024 teaching award and actively contributes to initiatives like the European Processor Initiative (EPI) and the NUMERIQS consortium. Current projects include optimizing exascale systems for Earth system modeling (IFCES2), AI-driven data analytics (AIDAS), and modular supercomputing software (DEEP-SEA). During her 2024/2025 sabbatical, she is not accepting new students. Her work is published in journals like Geoscientific Model Development and conferences such as ISC and EuroHPC.
