Daniel Chillet

Daniel Chillet is a Professor in the Electronics Department at the National School of Applied Sciences and Technology (ENSSAT), part of the University of Rennes 1. He has held significant administrative roles, including Director of Studies at ENSSAT from 2012 to 2015 and scientific leadership in international collaborations such as the USTH master’s program in Hanoi.

• Education: Not explicitly detailed in the provided text.

Research Interests focus on reconfigurable architectures, real-time scheduling, and energy-efficient embedded systems. His work addresses dynamic reconfiguration for memory hierarchy optimization, energy modeling of FPGAs, and spatio-temporal task scheduling in 3D heterogeneous multi-core systems. He has pioneered the integration of optical networks in chip-level communication and developed neural network-based scheduling mechanisms.

Teaching Activities include digital electronics, VHDL language, processor architecture, and real-time operating systems. He has developed pedagogical tools (e.g., JSimVEM, JSimRISC) to illustrate advanced RISC techniques and real-time methodologies like SART.

Responsibilities span academic leadership roles at ENSSAT, national committee memberships (CNU Section 61), and international coordination of the USTH master’s program in Hanoi. He chairs workshops like RAPIDO and participates in organizing conferences such as DASIP and PATMOS.

Research Projects include collaborations with Thomson CSF, ANR-funded initiatives (Open-People, FosFor), and CNRS-supported efforts. His work involves system-level exploration of reconfigurable architectures, fault management, and optical interconnects for 3D MPSoC.

Advising:
• Supervised 12 PhD theses (e.g., Hai Khuat, Robin Bonamy) and mentored numerous master’s students (e.g., Rim Abid, Gia-Tam Phan).

Conference Participation:
• Member of program committees for DCIS, RAW, ARC, GRETSI, and others.
• Organizer and General Chair for RAPIDO workshops (2018–2021).