Hyesoon Kim is a Professor at the Georgia Institute of Technology , affiliated with the College of Computing and leading the HPArch research group . She co-directs the Center for Research into Novel Computing Hierarchies (CRNCH) . Her research focuses on Computer Architecture , GPU , Compilers and Runtime Systems , and Hardware Security , particularly for heterogeneous systems. Contact : hyesoon@cc.gatech.edu Location : 266 Ferst Drive, KACB 2344, Atlanta, GA Research Trends Her recent work spans RISC-V extensions for security, CUDA optimization on softcore GPUs, memory safety techniques, and energy-efficient deep learning architectures. Articles emphasize heterogeneous computing , GPU performance scaling, and IoT -oriented neural network methods. Open Source Projects She leads development of Macsim (heterogeneous architecture simulator) and Vortex (open-source GPU platform).
Rakesh Kumar is a Professor and John Bardeen Faculty Scholar in the Electrical and Computer Engineering Department at the University of Illinois at Urbana-Champaign. His work focuses on computer architecture, system-level design automation, and low-power computing. PhD in Computer Engineering from University of California, San Diego BS in Electrical Engineering from IIT Kharagpur His research spans all layers of the computing stack, with key contributions to flexible computer systems , waferscale computing , error-resilient architectures , and approximate computing . He has pioneered work on voltage-reliability tradeoffs and peak power management techniques. Recent publications highlight trends in space microdatacenters , printed microprocessors , and neural graph accelerators . His work on plastic chips was recognized as one of the three biggest semiconductor headlines of 2022 by IEEE Spectrum. IEEE Fellow (2024) ISCA Influential Paper Award MICRO Test-of-Time Award ICCAD Ten Year Retrospective Most Influential Paper Award Best Paper Awards at CASES, SELSE, HPCA He has received teaching accolades including the Stanley H. Pierce Faculty Award and Ronald W. Pratt Outstanding Teaching Award . His research group explores hardware-software co-design for emerging applications in AI, IoT, and sustainable computing.
Kristofer Pister is a Professor in the Department of Electrical Engineering and Computer Sciences at the University of California, Berkeley. He co-directs the Berkeley Sensor and Actuator Center (BSAC) and the Ubiquitous Swarm Lab. His career spans groundbreaking innovations in Micro/Nano Electro Mechanical Systems (MEMS), Control Systems, and Low-Power Circuits, with a focus on Smart Dust and synthetic insects. Education: Ph.D. and M.S. in EECS from UC Berkeley (1992, 1989); B.A. in Applied Physics from UC San Diego (1986). His research areas include MEMS , Control Systems , Robotics , and Integrated Circuits , with recent work on self-powered micro-sensors, crystal-free radios, and interplanetary swarm networks. Key awards include the ISA Albert F. Sperry Founder Award (2009) , Alexander Schwarzkopf Prize (2006) , and the NSF CAREER Award (1996) . He has authored numerous influential publications in wireless sensor networks and microrobotics. His lab, Ubiquitous Swarm Lab , explores distributed robotics and swarm intelligence. Pister emphasizes open collaboration in research, ethical conduct in academia, and efficient resource utilization for graduate students.
Ozcan Ozturk is a Professor in the Computer Science and Engineering and Electronics Engineering programs at Sabancı University's Faculty of Engineering and Natural Sciences. Previously, he held professorships at Bilkent University and adjunct roles at North Carolina State University. His expertise spans heterogeneous computing, parallel systems, processor architecture, and compiler optimization. He earned his Ph.D. from Penn State University, with prior academic roles at the University of Florida and internships at Intel and Marvell. Education: Ph.D. in Computer Science and Engineering (2007), Pennsylvania State University M.S. in Computer Engineering (2002), University of Florida B.Sc. in Computer Engineering (2000), Bogazici University Research interests include accelerator technologies, GPU-based systems, multicore processors, and compiler optimizations. His work focuses on improving parallelization efficiency, energy optimization, and reliability in heterogeneous architectures. He leads funded projects like 'Machine Learning for Compiler Flags' and 'Graph Accelerator Design'. Notable awards include the Bilkent Teaching Award (2019), BAGEP (2018), and HiPEAC Paper Award (2016). He serves on editorial boards of IEEE and ACM journals and chairs major conferences like ASPLOS and ICS. Grants and collaborations include partnerships with Huawei, Intel, NVIDIA, and TÜBİTAK. He advises over 20 students and has supervised projects in safety-critical systems, FPGA accelerators, and compiler-directed optimizations. His lab develops domain-specific architectures, including RISC-V extensions for graph processing.
Dr. Alessandro Ottaviano is a Researcher affiliated with the Department of Digital Integrated Circuits and Systems at ETH Zürich. His work focuses on advanced computer architecture and embedded systems, particularly in the domains of RISC-V processors, real-time systems, and heterogeneous computing. He contributes to the design of time-predictable virtual memory solutions, mixed-criticality systems, and energy-efficient hardware-software interfaces. Key research areas include modular processor architectures, hardware monitoring for safety-critical applications, and power management in high-performance computing (HPC) systems. His recent projects involve developing controllers for 2.5D systems-in-package and creating open-source networking solutions for mixed-criticality environments. Ottaviano’s work often emphasizes open-source hardware design and scalable system-level approaches to address challenges in autonomous systems and edge computing. He collaborates on advancements in interrupt handling for virtualized systems, peripheral event linking for IoT devices, and FPGA-based thermal emulation for many-core processors. His research bridges theoretical computer architecture principles with practical implementations in embedded and real-time systems.
Caroline Trippel is an Assistant Professor in the Departments of Computer Science and Electrical Engineering at Stanford University. Her research focuses on ensuring correctness and security in computer systems through formal methods, with particular emphasis on hardware verification, memory consistency models, and mitigating vulnerabilities like Spectre/Meltdown. She previously worked at Facebook’s FAIR SysML group before joining Stanford. Education: PhD in Computer Science, Princeton University BS in Computer Engineering, Purdue University Her work has influenced the RISC-V ISA memory consistency model and produced tools like CheckMate, which automatically synthesizes hardware exploits for security verification. She explores privacy-preserving ML, ML-driven hardware optimizations (e.g., neural recommendation), and datacenter reliability. Her research has earned awards including the 2020 ACM SIGARCH Dissertation Award and NVIDIA Fellowship. Key contributions include: Formal analysis of RISC-V memory models Exploitation synthesis frameworks (CheckMate) Hardware-software contracts for security Defenses against microarchitectural side-channel attacks Current projects include: VeriCoder: LLM-enhanced RTL code verification Multi-μPATH synthesis for security validation Near-data processing (RecSSD) for recommendation systems
Daniel Müller-Gritschneder is an Adjunct Teaching Professor (Privatdozent) at the Technical University of Munich (TUM), affiliated with the Chair of Electronic Design Automation. He leads the 'Electronic System Level' research group, focusing on embedded systems, TinyML, virtual prototyping, and hardware resilience. He temporarily served as head of the Chair of Real-Time Systems (2019–2020) and holds a senior membership in IEEE. His research spans: TinyML : Optimizing neural network inference for microcontrollers. Virtual Prototyping : Fast simulation for embedded software development (e.g., ETISS simulator). Runtime Verification : Hardware monitoring for safety-critical systems. Fault Tolerance : Cross-layer resilience against soft errors. Design Automation : NoC synthesis and RISC-V toolchain optimization. His publications emphasize RISC-V-based systems, TinyML deployment, fault injection, and embedded AI. Recent works show trends toward compiler-assisted security, thermal management, and automated design-space exploration for edge devices. Awards: Best Paper Award (SiPS 2019) Habilitation Award (Bund der Freunde der TUM, 2019) 2nd Best Paper (SMACD'15) Best Paper nominations at DAC'07, DATE'10, Analog'10, NOCS'13 He advises researchers in the Electronic System Level group and contributes to EU projects (e.g., Scale4Edge). His lab develops tools like ETISS, MLonMCU, and Seal5 for RISC-V and TinyML ecosystems.
Sonia Lopez Alarcon is an Associate Professor in the Department of Computer Engineering at the Kate Gleason College of Engineering, Rochester Institute of Technology (RIT). She has been a faculty member since 2009, teaching core courses like Computer Organization and developing quantum computing curricula including the new CMPE-257 undergraduate course and CMPE-757 graduate course. Her research bridges computer architecture and quantum computing with emphasis on practical quantum circuit implementation. Her educational background includes a Bachelor of Physics and Master's in Device Physics from the University Complutense of Madrid (2002), followed by a PhD in Computer Engineering (2009) where she researched cache hierarchy in simultaneous multithreaded architectures. During her studies, she gained industry experience at Lucent Technologies and Fundetel working on integrated circuit design. Dr. Lopez Alarcon's primary research focuses on Quantum Computing and heterogeneous hardware solutions, specifically quantum circuit compilation processes, scalability challenges, and error resilience techniques. She investigates how to translate theoretical quantum algorithms into executable circuits while managing noise and resource constraints, with applications in optimization problems and physics simulations. Her work connects computer engineering principles to emerging quantum technologies. Analysis of her publication timeline shows a strategic shift from traditional computer architecture (2015-2018 cache/HLS research for GPU/heterogeneous systems) to quantum computing (2019-2021). Recent work explores quantum algorithms for combinatorial optimization (Grover's), quantum simulation of physical systems, and machine learning applications, reflecting her adaptation to the rapidly evolving quantum landscape while maintaining her architectural expertise. Her teaching excellence has been recognized through multiple awards: Kate Gleason College of Engineering Exemplary Performance in Teaching Award (2016, 2017, 2020) Computer Engineering Most Effective Teacher Award (2016) She actively mentors graduate students including Mark Danza (MS Computer Engineering candidate 2025), with whom she collaborated on quantum machine learning research featured in Quantum Zeitgeist (May 2025). She contributes to RIT's quantum information science minor launched in 2022, developing curriculum and supervising student research in this emerging field. Dr. Lopez Alarcon leads quantum computing research efforts within RIT's Department of Computer Engineering, collaborating with colleagues like Cory Merkel on quantum algorithm applications. Her work is supported through her personal research website and integration into university-wide quantum initiatives, positioning her at the forefront of academic quantum computing education and research.
Ashish Venkat is an Associate Professor in the Department of Computer Science at the University of Virginia, part of the School of Engineering and Applied Science. He holds a Ph.D. from UC San Diego and has established himself as a leading researcher in computer architecture, compilers, and computer security. Research Interests: His research focuses on cross-disciplinary hardware and software techniques to build secure, high-performance computing systems. He investigates robust exploit mitigations that maintain energy efficiency and programmability, with a particular emphasis on speculative execution, memory safety, hardware security, and privacy-preserving computing. He also explores the application of machine learning to detect security threats and model execution behavior. Publication Trends: His recent publications (2020–2025) demonstrate a strong focus on hardware-based security, particularly microarchitectural vulnerabilities (e.g., micro-op cache attacks), memory safety via microcode capabilities, and secure accelerators for bioinformatics. There is a consistent trend of publishing in top-tier venues like ISCA, MICRO, IEEE S&P, and USENIX Security, often featuring novel hardware/software co-design solutions. Scientific Awards: NSF CAREER Award (2023) NSF CRII Award (2018) IEEE Micro Top Pick (2019) IEEE Design & Test Top Pick (2020, 2021) HPCA Best Paper Runner-Up (2019) DATE Best Paper Nominee (2023) UVA Research Achievement Award (2023) ISCA Prolific Author of the Decade (2013–2022) Advising and Grants: He actively mentors graduate and undergraduate students, many of whom have pursued advanced degrees or joined leading tech companies. He has secured significant funding as PI or co-PI from NSF, DARPA, SRC, and Intel, including a $4.9M DARPA HERCULES grant and an NSF CAREER award. His projects focus on holistic security solutions, speculative optimization, and privacy-preserving machine learning frameworks. Labs and Teams: He leads a research group focused on secure and efficient computing systems, collaborating with researchers at institutions like UC San Diego, UC Riverside, and UC Irvine, as well as industry partners including Intel and IBM.
Yamine Ait-Ameur is a Full Professor in Data Engineering at ISAE-ENSMA (Institut Supérieur de l'Aéronautique et de l'Espace - École Nationale Supérieure de Mécanique et d'Aérotechique). He maintains dual laboratory affiliations with LIAS (Laboratoire d'Ingénierie des Applications de la Connaissance et des Systèmes) at both ENSIP (École Nationale Supérieure d'Ingénieurs de Poitiers) and ISAE-ENSMA campuses, reflecting his cross-institutional research activities. Professor Ait-Ameur's research program centers on formal methods for data engineering, with particular expertise in Event-B modeling applied to ontology-based database systems and multimodal human-computer interaction. His work bridges theoretical computer science with practical engineering applications, developing frameworks like OntoDB/OntoQL that enable semantic data representation and querying. His research trajectory shows evolution from foundational work in formal verification of numerical computations (1990s) to sophisticated applications in semantic web technologies, industrial automation systems, and multimodal interfaces (2000s-present). The publication record reveals strong thematic continuity across three decades, with recent work emphasizing formal verification of interactive systems (2013-2017), semantic data engineering methodologies, and multimodal interface design. His scholarly output demonstrates consistent international collaboration, particularly with researchers in Spain, Tunisia, and other European countries, as evidenced by co-authored publications and conference organization. Professor Ait-Ameur has played significant editorial roles including guest editing special issues of Data and Knowledge Engineering (2010) and Computers in Industry (2014), and co-organizing the Models and Data Engineering (MEDI) conference series. His research has practical applications in industrial automation, geological modeling, and transportation systems, as indicated by multiple publications addressing real-world implementation challenges.
Jennie E. Brand is a Professor of Sociology and Professor (by courtesy) of Statistics and Data Science at the University of California, Los Angeles (UCLA). She co-directs the Center for Social Statistics (CSS) and serves as President of the Association of Population Centers (APC). Her affiliations include the Population Association of America (PAA), International Sociological Association (ISA), and editorial boards of Social Forces , Sociological Methodology , and Science Advances . Research Interests include social stratification, inequality, causal inference, and the socioeconomic impact of higher education. She explores Access to and returns from higher education Consequences of job displacement and disruptive events Machine learning applications in social science Intergenerational mobility and family effects Scientific Awards include the ASA Mathematical Sociology Outstanding Publication Award (2024), Sociological Research Association membership (2019), and the ASA Methodology Leo Goodman Mid-Career Award (2016). Grants awarded by NICHD, NIH, NSF, and Robert Wood Johnson Foundation support her work on population research, causal inference, and health disparities. She has mentored numerous graduate students, including Ph.D. recipients at NYU, Stanford, and Oxford.
Xiaoguang Wang is an Assistant Professor in the Department of Computer Science at the University of Illinois Chicago. His research spans systems and software security, focusing on heterogeneous CPU architectures, secure software systems, and virtualization-based security frameworks. He actively mentors PhD and Master’s students and offers funded research opportunities for UIC students. University of Illinois Chicago, Department of Computer Science Research: Systems & Software Security, Heterogeneous Architectures, Virtualization His work includes projects like sMVX (multi-variant execution), Dapper (live program rewriting), and DynaCut (dynamic program customization). Recent publications address cross-architecture process migration, Linux kernel security, and using large language models (LLMs) for software security. He teaches advanced courses such as CS 487: Building Secure Computer Systems and CS 594/561: Adv. Linux Kernel Programming , emphasizing hands-on kernel development and security techniques. Grants from the U.S. Office of Naval Research and NSF support his work on secure systems and cross-architecture security solutions.
Jonathan Balkind is an Assistant Professor in the Department of Computer Science at the University of California, Santa Barbara (UCSB). His research focuses on the intersection of computer architecture, programming languages, and operating systems, with an emphasis on pragmatic system design and open-source hardware. He leads the ArchLab at UCSB and is affiliated with the OpenPiton project, an open-source manycore research framework. Education includes a PhD and MA in Computer Science from Princeton University (adviser: Prof. David Wentzlaff), an MSci in Computing Science from the University of Glasgow (advisers: Prof. Joseph Sventek and Dr. John O'Donnell), and exchange studies at UCSB. His work has been supported by awards such as the NSF Early CAREER Award (2023) and the Open Hardware Trailblazer Fellowship (2022). Research interests span heterogeneous computing, cache-coherent systems, FPGA integration, and domain-specific architectures. Notable projects include the 25-core Piton chip, the CIFER SoC with embedded FPGA, and the DECADES manycore processor. Recent publications address fused-kernel operating systems (Stramash), control logic synthesis, and hyperloop data-center architectures. His awards reflect contributions to open-source hardware and academic mentorship, including Siebel Scholarship (2018), Gordon Y.S. Wu Fellowship (2013–2017), and multiple teaching/research recognitions. He actively collaborates with industry (e.g., Microsoft Research, ARM) and advises on open-source projects.
Dr. Yang Xing is a Senior Lecturer in Applied Artificial Intelligence for Engineering at Cranfield University's Centre for Autonomous and Cyberphysical Systems, where he also directs the HUMAX Lab focused on human-centered autonomous vehicle validation. He holds a PhD from Cranfield University (2018) and an MSc with Distinction in Control Systems from the University of Sheffield (2014). Previously, he was a Research Associate at the University of Oxford (2020-2021) and Research Fellow at Nanyang Technological University (2019-2020). His research centers on human-autonomy collaboration frameworks with four key pillars: Cognitive autonomous systems using trustworthy AI Computer vision for human behavior/intention modeling Multimodal foundation models for autonomous driving Deep learning for sustainable transportation systems His recent publications (2022-2025) demonstrate strong trends in AI-driven transportation research : 40% focus on trajectory prediction and behavior modeling, 30% on computer vision applications, 20% on human-AI collaboration frameworks, and 10% on energy optimization. Key thematic evolutions include increased use of transformer architectures, graph neural networks for interaction modeling, and simulation-to-real transfer learning. Awards and Honors: IEEE Outstanding Associate Editor Award (TNNLS 2023-2024) Best Paper Award, China National Intelligence Technology Conference 2019 IEEE Outstanding Service Award, Smart World Congress 2023 Best Workshop Paper, IEEE IV 2018 He currently advises PhD student Isa Ismail and has secured funding from the Royal Society, EPSRC, DSTL, SAAB, QinetiQ, and Thales. As lab director of HUMAX, he leads projects on human-AI teaming for autonomous systems.
Sandro Bartolini serves as Associate Professor in the Department of Information Engineering and Mathematical Sciences at the University of Siena, Italy, where he teaches advanced courses in computer architecture and parallel programming while leading cutting-edge research in high-performance computing systems. His academic journey began with a cum laude Laurea in Computer Engineering followed by a PhD in Computer Science and Engineering from Università di Pisa. Education: PhD in Computer Science and Engineering, Università di Pisa Laurea in Computer Engineering (cum laude), Università di Pisa Research Focus: His work centers on photonic interconnects for chip multiprocessors , energy-efficient software optimization for multi-core/GPU architectures, and performance-portable parallel programming models . Current investigations span cryptographic acceleration, blockchain algorithms, and hardware/software co-design for emerging computing paradigms, with strong emphasis on practical implementations bridging theoretical advances and real-world applications. Publication Trends: Recent publications (2019-2023) reveal three dominant threads: (1) Photonic network innovations addressing energy bottlenecks in chip multiprocessors, (2) The PHAST library ecosystem enabling seamless CPU/GPU programming across domains from autonomous vehicles to UAV navigation, and (3) Hardware accelerator designs for convolutional networks and cryptographic workloads. These works consistently target performance-portability challenges in heterogeneous computing environments. Grants and Collaborations: As principal investigator for the Italian Ministry-funded PHOTONICA project, he established international research partnerships with Murcia University, Columbia University, and Hong Kong University of Science and Technology, while securing industry collaborations with STMicroelectronics, Intel Munich, IBM, and IMEC. He has also managed complex IT system deployments for Siemens Italy, RAI (Italian public broadcasting), and SpaceDys. Academic Leadership: Bartolini serves as Associate Editor for the Eurasip Journal of Embedded Computing and actively contributes to the European HiPEAC network. His research group at Siena maintains strong industry ties for technology transfer, particularly in photonic interconnect validation and parallel programming frameworks for next-generation computing systems.
