John Wickerson is a Senior Lecturer in the Department of Electrical and Electronic Engineering at Imperial College London. His research spans formal methods, concurrency, and hardware/software synthesis. Academic Rank: Senior Lecturer Affiliation: Imperial College London His research interests include concurrency semantics, weak memory models, transactional memory, GPU and FPGA programming, and high-level synthesis for hardware accelerators. These areas intersect formal verification, programming language design, and hardware-software interface optimization. The publications of John Wickerson reflect trends in formalizing memory models, improving hardware synthesis reliability, and testing concurrency frameworks. His work addresses challenges in quantum compiler validation, GPU workgroup progress, and weak memory persistency across Intel, ARM, and C++ architectures. He actively contributes to academic communities as a Publicity Co-Chair and Session Chair in conferences like POPL and as a Committee Member in SPLASH and PLDI. His GitHub repository activity and X (Twitter) presence further demonstrate his engagement in technical dissemination.
Nate Foster is a Professor of Computer Science at Cornell University and a Visiting Researcher at Jane Street . During 2023-24, he also holds a Visiting Professor position at EPFL in the Data Center Systems Laboratory. His research focuses on Programming Languages and Networking , with significant contributions to formal verification of network data planes and domain-specific language design. Awarded NSF CAREER Award , Sloan Research Fellowship , ACM SIGCOMM Rising Star Award , and ACM SIGPLAN Robin Milner Award Active in program committees for conferences like POPL, PLDI, SPLASH, and ICFP Research Trends : His recent work explores intersections of programming language theory with networking, including symbolic verification tools like KATch , infinite-state network analysis with StacKAT , and active learning frameworks for network automata. He applies formal methods to practical challenges in software-defined networking and hypervisor verification. Scientific Awards : NSF CAREER Award Sloan Research Fellowship ACM SIGCOMM Rising Star Award ACM SIGPLAN Robin Milner Award Academic Leadership : Serves as Session Preview Co-Chair for POPL 2024 and organizes workshops like RPLS 2025. He has chaired tutorials on P4 programming and mentored researchers through PLMW programs.
Michael Norrish is an Associate Professor at the School of Computing, Australian National University (ANU) , specializing in formal methods, programming language semantics, and interactive theorem proving. His career spans roles at NICTA, Data61, and ANU, with a focus on mechanised mathematics and verified systems. PhD in Computer Science (University of Cambridge, 1999) Undergraduate degree from Victoria University of Wellington His research bridges interactive theorem-proving (ITP) systems like HOL4 with real-world systems verification, particularly in programming languages and compilers. He leads the CakeML project, developing a verified compiler for functional languages. His work intersects formal verification with practical system design, including projects on reproducibility debt in scientific software and verified processors. Recent publications highlight verified compilation techniques, reproducibility challenges, and Kolmogorov complexity formalization. He actively participates in conference program committees (e.g., CPP, PLDI) and promotes trustworthy systems development through tools like HOL4. Current affiliations: ANU, CakeML Project, Trustworthy Systems Research Group (UNSW) Collaborations: Chalmers University (postdoc opportunities), seL4 microkernel ecosystem
Klaus von Gleissenthall is a tenured Assistant Professor in Computer Science at Vrije Universiteit Amsterdam, affiliated with the Theory Group and VUSec security lab. He holds a joint appointment with CWI's Computer Security group. Previously, he was a post-doc at UCSD and completed his PhD at TUM under a Microsoft Research scholarship. His research integrates programming languages , security , and systems to develop formally verified, low-overhead solutions for hardware/software correctness. Key focus areas include: Side-channel attack mitigation via leakage contracts Refinement-type systems for hardware verification Byzantine fault tolerance in distributed systems Publications demonstrate strong emphasis on hardware security (45% of recent papers), formal methods (30%), and distributed systems (25%), with consistent appearances in top-tier venues (S&P, CCS, OOPSLA). Awards & Honors: ERC Starting Grant (€1.5M, 2024) Intel Hardware Security Award Honorable Mention (2020, 2024) Distinguished Paper Awards: CCS'23, OOPSLA'23, POPL'21 He advises four PhD students and two post-docs, supported by his ERC grant. Current projects include refinement types for hardware and pre-silicon leak detection. His lab collaborates with VUSec and CWI, focusing on scalable verification tools like LLVM Blade and methodologies for constant-time execution guarantees.
Cătălin Hrițcu is a tenured faculty member and head of the Formally Verified Security group at the Max Planck Institute for Security and Privacy (MPI-SP) in Bochum, Germany. He also serves as Adjunct Professor in the Faculty of Computer Science at Ruhr University Bochum (RUB), where he is affiliated with HGI and the CASA Cluster of Excellence. His educational background includes: PhD from Saarland University in Saarbrücken, Germany Habilitation from ENS Paris Hrițcu's research focuses on developing rigorous formal techniques for security. His primary interests span three interconnected areas: Formal methods for security: secure compilation, compartmentalization, memory safety, speculative execution defenses, information flow control, and security protocols Programming-languages techniques: program verification, machine-checked proofs, dependent types, formal semantics, and property-based testing Design and verification of security-critical systems: compilation chains, reference monitors, tagged hardware architectures, and high-assurance cryptography His recent publications reveal a strong trajectory toward addressing real-world security challenges through formal methods, with increasing emphasis on hardware security aspects like speculative execution vulnerabilities and memory safety. Hrițcu has received significant scientific recognition: ERC Starting Grant on formally secure compilation Distinguished Paper Award at CSF 2025 for FSLH: Flexible Mechanized Speculative Load Hardening Distinguished Paper Award at CSF 2021 for SSProve As an advisor, Hrițcu has mentored numerous PhD students and postdoctoral researchers who have gone on to successful academic careers. His group receives substantial funding through projects like ERC SECOMP. He has co-authored volumes of the Software Foundations textbook series and actively teaches courses at RUB. Hrițcu leads the Formally Verified Security research group at MPI-SP, which includes PhD students, postdocs, and research interns working on cutting-edge problems at the intersection of programming languages and security. The group has made significant contributions to verification tools including F* and Coq, with applications in secure compilation and cryptographic verification.
Shing-Chi Cheung is a Professor of Computer Science and Engineering at the Hong Kong University of Science and Technology (HKUST), School of Engineering. He founded the CASTLE research group and co-founded the International Workshop on Automation of Software Testing (AST) in 2006. His leadership includes serving as General Chair of FSE 2014 and chairing multiple APSEC conferences. His research focuses on software quality enhancement through program analysis, testing, debugging, and AI techniques, targeting Android apps, open-source software, deep learning systems, smart contracts, and spreadsheets. Current projects include metamorphic testing frameworks, binary analysis tools, and vulnerability detection systems for emerging technologies. His publication portfolio demonstrates consistent contributions to software engineering since 2016, with recent work emphasizing AI-integrated testing methodologies, smart contract security, and deep learning system reliability. Key trends show increasing focus on cross-language analysis, data visualization quality, and compiler-level verification for modern software stacks. Distinguished Member of the ACM Fellow of the British Computer Society Editorial board member: Science of Computer Programming (SCP), Journal of Computer Science and Technology (JCST) Former editorial board member: IEEE Transactions on Software Engineering (2006-2009), Information and Software Technology (2012-2015) Four patents in China and the United States Cheung actively mentors through the CASTLE research group and serves on program committees for major conferences including ICSE, ESEC/FSE, and ISSTA. His work bridges academic research with practical applications through industry collaborations and tool development. He has contributed to numerous workshops and symposia as steering committee member and program chair.
Chao Zhang is a Tenured Associate Professor at Tsinghua University, specializing in software security, system security, data security, and AI security. He leads the VUL337 research group and serves as the coach of the Blue-Lotus CTF team. His educational background includes a Ph.D. in Computer Science from Peking University (2008-2013), a B.S. in Mathematical Science from Peking University (2004-2008), and a postdoctoral position at UC Berkeley (2013-2016). Dr. Zhang's research focuses on Software Security , System Security , Data and AI Security , Program Analysis , and Vulnerability Discovery . His work spans binary code analysis, fuzzing techniques, blockchain security, and AI security. His recent publications demonstrate a strong emphasis on developing novel frameworks for vulnerability detection, binary code analysis, and securing AI systems against adversarial attacks. His publication trends show a consistent focus on practical security solutions with increasing attention to AI security challenges. Over the past decade, he has published extensively in top security conferences including IEEE S&P, USENIX Security, CCS, NDSS, and ISSTA, with a significant acceleration in publications since 2020. Tencent CSS TSec Professional Prize (2nd place, 2019) Tencent CSS TSec Breakthrough Prize (1st place, 2018) DARPA Cyber Grand Challenge CFE, 2nd in exploiting (2016) DARPA Cyber Grand Challenge CQE, 1st in defense (2015) Microsoft BlueHat Prize Contest's Special Recognition Award (2012) 5th place in Defcon CTF 2017 2nd place in Defcon CTF 2016 5th place in Defcon CTF 2015 Dr. Zhang leads the VUL337 research group at Tsinghua University, which focuses on vulnerability discovery and security analysis. He also serves as the coach of the Blue-Lotus CTF team and is a member of the V group of LiST. His research has received significant attention in the security community, with numerous publications in top-tier security venues and practical contributions to vulnerability discovery and mitigation techniques.
Shangwen Wang is an Assistant Professor in the School of Computer Science at National University of Defense Technology (NUDT) in Changsha, China. He earned his Bachelor's degree in June 2017, Master's degree in December 2019, and Ph.D. in December 2023, all from NUDT. During his graduate studies, he was supervised by Professor Xiaoguang Mao. From May 2022 to July 2023, he was a visiting student at Southern University of Science and Technology under Professor Yepang Liu. His educational background includes: Ph.D. in Software Engineering, NUDT (2020.3-2023.12), supervised by Prof. Xiaoguang Mao Visiting Scholar, SUSTech (2022.5-2023.7), supervised by Prof. Yepang Liu M.A. in Software Engineering, NUDT (2017.9-2019.12), supervised by Prof. Xiaoguang Mao B.A. in Software Engineering, NUDT (2013.9-2017.6) Wang's research focuses on program repair, program comprehension, mining software repositories, software maintenance and evolution, software testing, and AI for Software Engineering. His work bridges traditional software engineering techniques with modern AI approaches, particularly leveraging large language models for various software engineering tasks. He has made significant contributions to automated program repair, fault localization, vulnerability detection, and code generation. His research demonstrates a strong emphasis on empirical validation and practical applicability to real-world software development challenges. His recent publications show a clear trend toward integrating large language models with traditional software engineering tasks. The 15 most recent articles reveal a focus on applying LLMs to program repair, fault localization, vulnerability detection, and code generation, while maintaining strong empirical foundations. His work spans both theoretical advancements and practical tool development, with applications in software security, testing, and maintenance. His notable achievements include: CCF Outstanding Doctoral Dissertation (CCF优博) 2024 Outstanding Doctoral Graduates, NUDT, 2023 Multiple distinguished paper awards including ACM SIGSOFT Distinguished Paper Award (ISSTA'24) and IEEE TCSE Distinguished Paper Awards (ICSME'22, SANER'22) Prestigious scholarships from NUDT throughout his academic career As an active member of the software engineering community, Wang serves on numerous program committees for top conferences including ICSE, ASE, ESEC/FSE, and ISSTA. He has also contributed to teaching as a teaching assistant for courses such as Compiler, Python Programming, Discrete Mathematics, and C++ Programming. His research group appears to be actively mentoring students, as evidenced by his role as corresponding author on multiple student-led publications. Wang maintains an active research presence with collaborations across multiple institutions in China. His work demonstrates a clear trajectory from traditional program analysis techniques toward integrating cutting-edge AI approaches, particularly large language models, into software engineering practices.
Gang (Gary) Tan is a Professor in the Computer Science and Engineering Department at Pennsylvania State University, co-directing the Institute for Networking and Security Research (INSR). His research bridges computer security, formal methods, and programming languages to develop practical solutions for software vulnerabilities and AI fairness. Education: B.E. in Computer Science from Tsinghua University Ph.D. in Computer Science from Princeton University Dr. Tan specializes in applying compiler techniques and formal verification to security challenges, with seminal work on cache side-channel attacks and fairness in machine learning. His Security of Software (SOS) Group develops frameworks that integrate theoretical guarantees into real-world systems, emphasizing measurable security outcomes and ethical AI. Recent projects focus on quantifying bias in neural networks and mitigating speculative execution vulnerabilities. Analysis of his 2021-2025 publications reveals a strategic pivot toward AI security, where he pioneers methods for fairness testing (e.g., information-theoretic debugging) and repair (e.g., NeuFair). Concurrently, his security work evolves from foundational side-channel research (SpecSafe, 2021) toward hardware-software co-design solutions, demonstrating consistent innovation across theoretical and applied domains. Scientific Awards: James F. Will Career Development Professorship NSF CAREER Award Google Research Award (two instances) Distinguished Reviewer Award at 2018 IEEE Symposium on Security and Privacy Outstanding Research Award at Penn State Ruth and Joel Spira Excellence in Teaching Award Best Paper Award at PLDI 2024 Dr. Tan leads the SOS Group with funding from NSF (including CAREER), DARPA (ISAT study group membership), and industry partners like Google. His grants support interdisciplinary projects spanning secure compilation, fairness engineering, and hardware security, while his teaching excellence award reflects commitment to pedagogy in core systems courses. He co-directs Penn State's Institute for Networking and Security Research (INSR), fostering collaboration between systems, security, and AI researchers. The SOS Group maintains active partnerships with industry security teams and contributes to open-source tools for vulnerability detection, with recent work expanding into fairness certification for machine learning pipelines.
Soner Onder is a Professor in the Department of Computer Science at Michigan Technological University, with an affiliated appointment in the Electrical and Computer Engineering department. His work focuses on computer architecture, programming languages, and simulation techniques, contributing significantly to processor design and memory systems research. Dr. Onder received his PhD in Computer Science from the University of Pittsburgh in 1999. His academic career has established him as a leading researcher in computer architecture with publications spanning two decades in top-tier conferences. Dr. Onder's research spans multiple areas of computer architecture and compiler design, with emphasis on processor design, memory systems, and compiler optimizations. He has made significant contributions to memory disambiguation techniques, branch prediction mechanisms, and energy-efficient processor designs. His work often bridges hardware and software domains, exploring how compiler techniques can better exploit architectural features. Recent research focuses on memory dependence prediction, recovery mechanisms for mispredictions, and energy-efficient data access patterns, with his "Future Gated Single Assignment Form" representing an innovative approach to program representation that bridges compiler design and architectural support. US Patent 7747993: Methods and systems for ordering instructions using future values (2010) Dr. Onder has advised numerous PhD students to completion, including Scott Pomerville (2024), Gorkem Asilioglu (2020), Omkar Javeri (2020), and Zhaoxiang Jin (2018). His research has been supported by grants including "Statically Controlled Asynchronous Lane Execution (SCALE)" and "Vectorized Instruction Space (VIS)" projects. He developed the FAST (Flexible Architecture Simulation Tool) for architectural research and continues to lead an active research program with publications appearing in top-tier venues through 2018. Dr. Onder leads research in computer architecture with a focus on practical implementations. His FAST simulation tool provides a flexible platform for testing architectural innovations. His work often involves collaboration with both compiler researchers and hardware designers to create holistic solutions to performance bottlenecks in modern processors, demonstrating the interdisciplinary nature of his research that bridges hardware and software concerns in computer system design.
