Devanshi Upadhyaya is a Researcher at the Institute of Computer Architecture and Computer Engineering under the University of Stuttgart. Her work focuses on hardware security, cryptographic circuit protection, and formal methods for analyzing vulnerabilities in embedded systems. She is actively engaged in advancing secure hardware design principles through research in side-channel attacks, fault injection, and logic locking mechanisms. Her research interests include cryptographic circuit security, formal verification of hardware systems, and securing neural network accelerators. She has contributed to developing frameworks that assess vulnerabilities in mixed-signal and approximate computing architectures, emphasizing practical defenses against both software and hardware-based attacks. Notable projects include optimizing waveform accurate fault attacks and enabling power side-channel simulations for AI hardware accelerators. Her work bridges theoretical security models with real-world hardware implementation challenges. Devanshi holds a M.Sc. degree and is affiliated with the Hardware Oriented Computer Science department at the University of Stuttgart, where she collaborates on interdisciplinary projects involving cryptography, embedded systems, and machine learning hardware.
