Tianqi Chen is an Assistant Professor at the Machine Learning Department and Computer Science Department of Carnegie Mellon University (CMU), with a courtesy appointment as a Professor in the Electrical and Computer Engineering Department within the College of Engineering. His research focuses on scalable machine learning systems, compiler optimization, and efficient deep learning frameworks. He holds a PhD from the Paul G. Allen School of Computer Science & Engineering at the University of Washington. Key contributions include the creation of XGBoost, Apache TVM, and MLC-LLM—widely adopted systems for machine learning and large language models. His work bridges algorithmic innovation with high-performance computing, emphasizing efficient deployment, quantization, and edge computing. Recent publications highlight advancements in LLM serving (e.g., WebLLM, Flashinfer), compiler-driven optimizations (e.g., TVM, Relax), and low-latency inference techniques (e.g., Magicdec, Tilus). These efforts address scalability, energy efficiency, and cross-platform compatibility in modern AI systems. Chen’s research has been applied to diverse domains, including music AI, browser-based inference, and microservice architectures for LLMs. His work underscores the importance of system-level thinking in advancing AI capabilities.
Kian-Lee Tan is a Tan Sri Runme Shaw Senior Professor and Professor of Computer Science at the School of Computing, National University of Singapore (NUS). He holds a Ph.D. (1994), M.S. (1992), and B.Sc. (1st Class Honours) from NUS. His academic career spans decades of contributions to database systems and data analytics. Ph.D. in Computer Science, National University of Singapore (1994) M.S. in Computer Science, National University of Singapore (1992) B.Sc. in Computer Science (1st Class Honours), National University of Singapore As a leading researcher in database systems, Tan focuses on query processing and optimization in multiprocessor/distributed systems, database performance, security, and multimedia information retrieval. His work extends to computational biology applications like genome databases and real-time influence analysis on social streams. His recent publications highlight trends in GPU-accelerated graph analytics, trajectory pattern mining, and computational journalism. These works emphasize parallel processing, performance optimization, and social/media data analysis. IEEE Technical Achievement Award (2013) President Science Awards, Singapore (2011) NUS Graduate School Excellent Mentor Award (2010/2011) Outstanding University Researchers Award (1997/1998) Tan has supervised numerous research projects and mentored students contributing to database systems. He secured significant grants including a US$1 million Ripple Foundation grant (2024) for financial technology education. His editorial roles include ACM Transactions on Database Systems and IEEE Transactions on Knowledge and Data Engineering. He leads the FinTech Lab at NUS Computing and has served on the VLDB Endowment Board (2012-2017). His work bridges database foundations with emerging applications in AI, fintech, and computational journalism.
Priyanka Raina is an Assistant Professor of Electrical Engineering at Stanford University, with a courtesy appointment in Computer Science. She leads the Stanford Accelerate research group, focusing on domain-specific hardware architectures and agile hardware-software co-design. Her work emphasizes high-performance, energy-efficient accelerators for emerging technologies. Education: B.Tech. from IIT Delhi (2011), M.S. and Ph.D. from MIT (2013/2018). Postdoctoral experience includes NVIDIA Research (2018) and Amazon Visiting Academic (2023–present). Awards include the Sloan Research Fellowship (2024), NSF CAREER Award (2023), and Terman Faculty Fellowship (2018). Research Interests: Domain-specific architectures, near-memory computing, design productivity, and machine learning acceleration. Her group develops frameworks like AHA (Agile Hardware) for efficient accelerator design and compilers. Awards: Over 10 major awards, including best paper recognitions at VLSI, MICRO, and JSSC. Active roles as Associate Editor for IEEE JSSC and Program Chair for IEEE Hot Chips (2020). Advising & Teaching: Supervises multiple PhD and MS students in hardware design, CGRAs, and ML accelerators. Teaches VLSI design courses (EE271/272/372) and oversees independent studies in embedded systems and chip design. Labs & Collaborations: Affiliated with Stanford PORTAL Center, AHA Center, and SystemX Alliance. Projects include MINOTAUR (edge AI accelerator), Amber (CGRA-based SoC), and EMBER (RRAM macros).
Kaiyuan Yang is an Associate Professor in the Department of Electrical and Computer Engineering at Rice University, leading the Secure and Intelligent Micro-Systems (SIMS) Lab. His research focuses on low-power integrated circuits and bioelectronic implants for applications like the Internet of Everything and medical devices. He holds a B.S. from Tsinghua University (2012) and M.S./Ph.D. degrees from the University of Michigan (2017). Research Interests: Low-power digital/analog/mixed-signal systems Bioelectronics and implantable devices Hardware security and PUF design Mixed-signal computing and emerging materials Recent work emphasizes magnetoelectric-powered implants, secure backscatter communication, and in-memory computing architectures. His publications span top venues like IEEE ISSCC, IEDM, and ACM MobiCom. Awards: 2022 NSF CAREER Award 2022 IEEE Top Picks in Hardware Security 2016 IEEE SSCS Predoctoral Achievement Award Dr. Yang serves on editorial boards for IEEE TVLSI and program committees for ISSCC/CICC. His lab develops miniature, secure, and energy-efficient systems for healthcare and IoT applications.
Vijay Raghunathan is a Professor in the Department of Electrical and Computer Engineering at Purdue University's College of Engineering. His work focuses on hardware and software architectures for embedded systems, wireless sensors for IoT, and wearable/implantable electronics with emphasis on low power design, energy harvesting, emerging memory technologies, and secure system design. Academic Rank: Professor Department: Electrical and Computer Engineering University: Purdue University Research Focus: Energy-efficient embedded systems, IoT, wearable devices His research explores low power design at both board-level and system-on-chip scales, micro-scale energy harvesting , and reliable/secure system design for medical devices. Recent work focuses on Processing-in-Sensor/Memory for battery-free AIoT devices, state space models for neural processing units, and security coprocessor integration in autonomous systems. Analysis of his publications reveals trends in energy-efficient neural network acceleration , approximate computing for edge inference , and compute-in-memory architectures . Key subfields include collaborative edge-cloud partitioning , sparse DNN accelerators , and security frameworks for medical devices. Vijay's work also addresses energy-accuracy tradeoffs in multimodal cognitive systems and intermittent computing using non-volatile memory technologies. His contributions span from microcontroller energy management to security protocols for implantable electronics.
Rakesh Kumar is a Professor and John Bardeen Faculty Scholar in the Electrical and Computer Engineering Department at the University of Illinois at Urbana-Champaign. His work focuses on computer architecture, system-level design automation, and low-power computing. PhD in Computer Engineering from University of California, San Diego BS in Electrical Engineering from IIT Kharagpur His research spans all layers of the computing stack, with key contributions to flexible computer systems , waferscale computing , error-resilient architectures , and approximate computing . He has pioneered work on voltage-reliability tradeoffs and peak power management techniques. Recent publications highlight trends in space microdatacenters , printed microprocessors , and neural graph accelerators . His work on plastic chips was recognized as one of the three biggest semiconductor headlines of 2022 by IEEE Spectrum. IEEE Fellow (2024) ISCA Influential Paper Award MICRO Test-of-Time Award ICCAD Ten Year Retrospective Most Influential Paper Award Best Paper Awards at CASES, SELSE, HPCA He has received teaching accolades including the Stanley H. Pierce Faculty Award and Ronald W. Pratt Outstanding Teaching Award . His research group explores hardware-software co-design for emerging applications in AI, IoT, and sustainable computing.
Muhannad S. Bakir is the Dan Fielder Professor in the School of Electrical and Computer Engineering at Georgia Institute of Technology and serves as the Director of the 3D Systems Packaging Research Center. His research focuses on heterogeneous integration of microsystems, including 2.5D and 3D ICs and packaging technologies, with significant contributions to advanced cooling systems, electrical and photonic interconnects, and biosensor integration with CMOS. Dr. Bakir's research interests span heterogeneous microsystem design and integration, advanced cooling and power delivery for emerging architectures, electrical and photonic interconnect technologies, biosensor technologies, and nanofabrication. His work addresses critical challenges in next-generation electronics, enabling polylithic integration that concatenates heterogeneous ICs of various functionalities while mimicking monolithic-like densities. His research particularly focuses on co-design of thermal technologies, power delivery networks, and signaling networks for silicon nanoelectronic systems. His recent publications demonstrate strong trends in fused-silica stitch-chip technology for heterogeneous integration, with particular emphasis on RF and mm-wave applications, power delivery for AI accelerators, and thermal management solutions. His work bridges electrical engineering, materials science, and thermal management to solve critical bottlenecks in computing performance and efficiency. 2013 Intel Early Career Faculty Honor Award 2012 DARPA Young Faculty Award 2011 IEEE CPMT Society Outstanding Young Engineer Award 2012 National Academy of Engineering Frontiers of Engineering Symposium Invited Participant 2015 IEEE CPMT Society Distinguished Lecturer 2014 Best Paper of the IEEE Transactions on Components Packaging and Manufacturing Technology More than 25 conference and student paper awards Twelve issued US Patents Dr. Bakir leads the Integrated 3D Systems Lab (I3DS) at Georgia Tech, which is actively researching advanced packaging, interconnects, electrical and thermal design, and system integration. His team has received significant recognition for their work, including multiple best paper awards from major conferences like ECTC, IITC, and CICC. The lab is currently seeking postdoctoral researchers and research faculty to advance next-generation electronics through collaborative research. His lab focuses on enabling the next phase of Moore's Law through polylithic integration, which concatenates heterogeneous ICs of various functionalities (digital, analog, photonic, and mm-wave) using advanced off-chip '2.5D' and '3D' heterogeneous interconnects and packaging. This work impacts applications in high-performance computing, machine learning, edge intelligence, autonomous vehicles, augmented/virtual reality, and healthcare.
Giacomo Indiveri is a dual Professor at the Faculty of Science of the University of Zurich and the Department of Information Technology and Electrical Engineering of ETH Zurich . He serves as the Director of the Institute of Neuroinformatics at both institutions. Indiveri holds an M.Sc. in Electrical Engineering (1992) from the University of Genoa and a Ph.D. in Computer Science (2004) from the same university. Primary Affiliation: University of Zurich (Faculty of Science, Institute of Neuroinformatics) Secondary Affiliation: ETH Zurich (Department of Information Technology and Electrical Engineering) Indiveri's research bridges neuroscience , computer science , and machine learning to develop neuromorphic cognitive systems . His work focuses on spike-based learning , recurrent neural networks , and analog/digital circuit design for real-time sensory-motor systems . He integrates emerging memory technologies into fault-tolerant event-based architectures, enabling brain-inspired computing paradigms in applications like robotics and medical monitoring. His recent publications emphasize neuromorphic hardware for epileptic seizure detection , spiking neural networks in robotic painting , and scalable processors with on-chip learning . These works explore biologically plausible neurons , delay lines , and memory arrays for temporal processing, with applications in healthcare , edge computing , and adaptive control . Scientific Awards & Recognitions: 2021 IEEE Biomedical Circuits and Systems Best Paper Award Senior Member of IEEE Society ERC Fellow with three European Research Council grants Indiveri's group at the Institute of Neuroinformatics develops event-based systems for real-world validation of brain-inspired computing. His work includes multi-core processors , feedback optimizers , and dynamic routing architectures , supported by grants for advancing neuromorphic technologies .
Affiliation & Education Scott Hauck is a Professor at the University of Washington's Department of Electrical & Computer Engineering and an Adjunct Professor in Computer Science & Engineering. He leads the Adaptive Computing Machines and Emulators (ACME) Lab . He earned his BS in EECS from UC Berkeley (1990), and MS/PhD in CSE from the University of Washington (1992/1995). Research Focus Dr. Hauck specializes in FPGA-based reconfigurable computing with applications in: Quantum Computing: FPGA controllers for trapped-ion quantum systems enabling precise laser control and quantum state readout. Medical Imaging: Portable radiation sensors for personalized cancer therapy and PET scanner enhancements. High-Energy Physics: FPGA readout systems for ATLAS pixel detectors at CERN's Large Hadron Collider. AI Acceleration: Real-time machine learning inference for scientific applications via projects like hls4ml. His work bridges hardware innovation with computational physics, emphasizing real-time processing and low-latency systems. Publication Trends Recent research focuses on FPGA-accelerated machine learning for particle physics (e.g., transformer networks for LHC trigger systems) and quantum computing instrumentation. Earlier work established foundations in reconfigurable computing architectures and medical imaging electronics. Awards & Recognition Distinguished Teaching Award, University of Washington (2010) Advising & Funding Leads the ACME Lab with extensive funding from NSF, DARPA, NIH, DOE, and industry partners including Intel, Xilinx, and Microsoft. Mentored over 30 MS/PhD students in VLSI, reconfigurable systems, and scientific computing. Collaborations & Labs Directs the ACME Lab (EE1-307), collaborating with UW Radiology (Prof. Robert Miyaoka), UW Physics (Prof. Shih-Chieh Hsu), and Drexel University (Prof. Josh Agar). Projects include quantum control systems, LHC readout electronics, and medical sensor networks.
Dmitri Strukov is a Professor at the University of California, Santa Barbara in the Department of Electrical and Computer Engineering. His work spans material science, electrical engineering, and computer science, focusing on novel computing paradigms using emerging memory devices. Education: PhD in Electrical and Computer Engineering from SUNY Stony Brook, MS in Applied Physics and Mathematics from Moscow Institute of Physics and Technology. Research Interests include neuromorphic computing , non-volatile memory applications , and mixed-signal circuits for machine learning and hardware security. His group develops memristive crossbar arrays and 3D NAND flash for energy-efficient systems. Scientific Leadership features Fellow of IEEE and Distinguished Lecturer roles. His work has been recognized with best paper awards at ASPLOS’19 and Computing Frontiers’13. Students: Mentored PhD graduates in neurocomputing, security, and memristor design including Z. Fahimi, S. Larimian, M.R. Mahmoodi, and X. Guo. Grants: Funded by AFOSR, ARO, DARPA, NSF, and industry leaders like Google and Samsung. Labs: Utilizes UCSB’s nanofabrication center and advanced tools for memristor characterization.
Judith Driscoll is Professor of Materials Science at the University of Cambridge in the Department of Materials Science & Metallurgy. She holds the prestigious Royal Academy of Engineering Chair in Emerging Technologies and serves as a Visiting Staff Member at Los Alamos National Laboratory. As the founding Editor-in-Chief of APL Materials, she has significantly contributed to the materials science community. Dr. Driscoll's research focuses on Energy Efficient Oxide Materials for Information and Communications Technologies and energy devices. Her work spans the development of non-volatile memory, resistive switching devices, and ferroelectric materials for neuromorphic computing applications. She investigates oxide thin films for applications ranging from data storage to energy generation and conversion, with particular emphasis on creating more energy-efficient device technologies to handle the exponential growth of data-centric applications. Her recent publications demonstrate strong trends in developing novel oxide-based memory devices with improved energy efficiency, particularly for AI applications. The work shows significant progress in hafnium-zirconium oxide ferroelectrics, resistive switching mechanisms, and vertically aligned nanocomposite structures for enhanced device performance. These innovations address critical challenges in reducing the unsustainable energy demands of modern computing, particularly for artificial intelligence systems. Fellow of the Royal Academy of Engineering Fellow of the Materials Research Society Fellow of the American Physical Society Fellow of IOM3, IOP, and Women Engineers Society Fellow of the American Academy of Arts and Sciences Recipient of ERC Advanced Grant Editor-in-Chief of APL Materials Dr. Driscoll leads a vibrant research group that has secured significant funding including her Royal Academy of Engineering Research Chair, an ERC Advanced Grant, and an ECCS-EPSRC grant in collaboration with researchers from the USA. She has founded the Cambridge Centre for Neuromorphic Computing (Neucam) in 2023. Her group operates world-leading growth equipment including pulsed laser deposition with RHEED control, high temperature oxide sputtering, and spatial ALD systems. She collaborates extensively across the University of Cambridge and with international partners to solve complex materials challenges, with her group's role often being to identify optimal materials for functional goals, predict fabrication methods, and then create and characterize these materials.
Yannis Chronis is an incoming Assistant Professor at the Department of Computer Science , ETH Zurich (starting August 2025), where he will join the ETH Systems Group . Prior to this, he spent 3 years as a Systems Researcher at Google's Systems Research Group in Sunnyvale, USA. He holds a Ph.D. in Computer Science from the University of Wisconsin-Madison (advised by Prof. Jignesh Patel) and a Bachelor's/Master's from the University of Athens, Greece (advised by Prof. Yannis Ioannidis). His research focuses on optimizing databases and data processing for modern hardware through software-hardware co-design. Key areas include database efficiency in memory-centric architectures, learned query optimizers, and cloud resource management. His work is supported by a Facebook Fellowship and has been recognized with the EDBT 2016 Medal for best paper. Teaching: Taught CS 564 - Database Management Systems at UW-Madison (Spring 2022). Service: Served on program committees for SIGMOD, VLDB, CIDR, and others, and chairs the CIDR Proceedings Committee. Key Publications: His recent work includes studies on memory-centric computing for databases, cardinality estimation benchmarks, and adaptive query processing techniques.
Paul Prucnal is a Professor of Electrical and Computer Engineering at Princeton University, affiliated with the Princeton Materials Institute (PMI). He leads the Lightwave Communications Research Lab, focusing on ultrafast optical techniques for communication networks and neuromorphic photonics. His research spans optical security, CDMA networks, nonlinear signal processing, and photonic neurons. Education: Ph.D., Columbia University (1979) M.Phil., Columbia University (1978) M.S., Electrical Engineering, Columbia University (1976) A.B., Bowdoin College, summa cum laude (1974) Research Interests: Optical Network Security (eavesdropping/jamming countermeasures) Optical CDMA for broadband networks Silicon photonic neuromorphic computing RF interference cancellation in wireless systems Photonic spiking neurons mimicking biological organisms Awards: National Academy of Inventors Fellow (2017) 10+ teaching awards including Princeton's President's Award (2015) OSA/IEEE Fellowships (1992, 1997) Labs/Teams: Leads the Lightwave Communications Lab, collaborating with government/industry partners. Lab alumni like Prof. Bhavin Shastri have achieved international recognition. Grants/Publications: Over 350 journal papers, 22 U.S. patents. Authored/co-authored Neuromorphic Photonics (2017) and edited Optical Code Division Multiple Access (2019). Current projects include photonic tensor processors and real-time RF signal processing.
Jingtong Hu is an Associate Professor at the Swanson School of Engineering, University of Pittsburgh, where he also holds the William Kepler Whiteford Faculty Fellowship. His research focuses on Cyber-Physical Systems and Infrastructure Security, with significant contributions to embedded systems, non-volatile memory architectures, and hardware/software co-design for energy-constrained environments. Dr. Hu received his PhD from the University of Texas at Dallas (2007-2013) and his Bachelor of Engineering from Shandong University (2003-2007). His research spans multiple interdisciplinary areas including energy harvesting systems, non-volatile processors, FPGA acceleration, and machine learning at the edge. His recent publications demonstrate a strong focus on algorithm-hardware co-design, particularly for vision transformers, federated learning, and non-volatile memory systems. His work often addresses the challenges of implementing AI on resource-constrained edge devices, with emphasis on energy efficiency, reliability, and performance optimization. The trend in his publications shows increasing focus on sustainable AI processing, heterogeneous computing architectures, and personalized machine learning for IoT applications. Selected Awards: IEEE Transactions on Computer-Aided Design Donald O. Pederson Best Paper Award (2021) ACM SIGDA Meritorious Service Award (2019) Multiple Best Paper Award nominations at top conferences including DAC, ASP-DAC, and CODES+ISSS Dr. Hu's research has been supported by multiple grants focusing on energy-efficient computing, non-volatile memory systems, and hardware acceleration for machine learning. His collaborative work spans numerous institutions and involves interdisciplinary teams working at the intersection of computer architecture, embedded systems, and artificial intelligence. His publications show extensive collaboration with researchers at the University of Pittsburgh, particularly with Albert K. Jones and Yiyu Shi. His laboratory work focuses on implementing practical systems for energy harvesting powered devices, non-volatile processors, and hardware accelerators for machine learning applications. Current projects appear to emphasize sustainable AI processing at the edge, heterogeneous FPGA acceleration, and personalized federated learning for health monitoring applications.
Soheil Salehi is a tenure-track Assistant Professor in the Department of Electrical and Computer Engineering at the University of Arizona, with a joint appointment in Systems and Industrial Engineering. He is the Director of the Privacy-preserving, Intelligent, and Secure Computing (PRISM) Lab, established in August 2022. Prior to this, he was an NSF-Sponsored Computing Innovation Fellow and Postdoctoral Research Fellow at the University of California, Davis. Ph.D., Electrical and Computer Engineering, University of Central Florida, 2020 M.S., Electrical and Computer Engineering, University of Central Florida, 2016 B.S., Isfahan University of Technology, Iran, 2014 Dr. Salehi's research focuses on the intersection of hardware, AI, and security. His work spans hardware and AI-enabled security in IoT , Generative AI for hardware design and security , neuromorphic and biologically-inspired AI hardware , emerging spin-based devices , reconfigurable architectures , low-power VLSI circuits , and digital twins and mixed reality for semiconductor workforce development . He also explores the application of Generative AI in personalized education . His recent publications, spanning 2023–2025, reveal a strong trend toward integrating AI and machine learning into hardware security and design. Key themes include automated secure IC design flows , AI-driven hardware obfuscation , firmware and side-channel attack analysis , security in neuromorphic and spiking neural networks , and educational frameworks using digital twins and generative models . His work appears in top venues like DAC, ICCAD, USENIX Security, IEEE TCAS-I, and ISCAS. Outstanding Reviewer Award, IEEE/ACM Design Automation Conference (DAC), 2023 Best Presentation of the Symposium Award, UC Davis Postdoctoral Research Symposium, 2021 UCF Excellence by a Graduate Teaching Assistant (University-Level), 2016 Nominated for 30-under-30 Award, UCF, 2020 Nominated for Postdoctoral Research Excellence Award, UC Davis, 2022 Dr. Salehi has secured significant research funding as PI and Co-PI, including a $300K NSF SaTC EAGER grant on Generative AI-based Personalized Cybersecurity Tutor, a $174,000 University of Arizona PIF Award, and multiple RII grants totaling over $198K. He has also received industry funding from CHEST. He actively mentors students and leads the PRISM Lab, which focuses on privacy-preserving and intelligent secure computing. His service includes roles as Technical Program Committee (TPC) Member and Session Chair at premier conferences such as DAC, ICCAD, CCS, NDSS, and GLSVLSI. The PRISM Lab, under his direction, conducts cutting-edge research in secure and intelligent hardware systems, with applications in IoT, edge computing, and workforce development. The lab emphasizes interdisciplinary collaboration and innovation in both research and education.
