Nader Abu-Alrub is an Assistant Teaching Professor at the Department of Applied Computing , Michigan Technological University , where he serves as Lab Supervisor and Safety Liaison. His expertise spans Power Electronics , Digital Design with FPGA , and Robotics , with research focusing on Odometry , Autonomous Vehicles , and Fluidics . Research Interests: Robotics and Mechatronics State Estimation for Autonomous Systems Electrical Machinery and Drive Systems Digital Design with FPGA Fluidics and System Modeling Contact: nabualru@mtu.edu | Office: EERC 417 | Phone: 906-487-4305
Tommaso Foscale is a Lecturer at the Department of Control and Computer Science (DAUIN), Politecnico di Torino. He is also a third-year PhD student in Computer and Control Engineering, affiliated with the Electronic CAD & Reliability group. PhD in Computer and Control Engineering (2022–2025) MSc in Computer Engineering, cum laude (2021) His research focuses on testing techniques for automotive systems on chip , with specific expertise in: Wafer-level and manufacturing testing FPGA-based test equipment design Single-event upset (SEU) injection Cost-effective characterization of SoCs Recent publications highlight trends in multi-site testing optimization and reliability engineering for automotive electronics. He has contributed to IEEE symposia on test strategies and functional safety. As a teaching assistant, he collaborates on Operating Systems courses for Computer Engineering and Computer Science Engineering programs (2023–2025). His research group actively explores fault tolerance and embedded systems testing.
Dr. Fengwei An is an Associate Professor at the Shenzhen-Hong Kong Institute of Microelectronics , Southern University of Science and Technology (SUSTech). He earned his Ph.D. in Engineering from Hiroshima University (2013) , following a Master's (2010) and Bachelor's (2006) from Qingdao University of Science and Technology. Current Role : 2025-Present - Associate Dean and Associate Professor, SUSTech Shenzhen-Hong Kong Institute of Microelectronics Prior Academic Roles : 2017-2018 - Associate Professor, Hiroshima University; 2013-2017 - Assistant Professor, Hiroshima University Industry Experience : 2018-2019 - Chief Engineer, Panasonic Semiconductor Co., Ltd., Japan Research Interests focus on low-power edge artificial intelligence chip design for computer vision, including: Ultra-large-scale digital integrated circuit design System-on-Chip (SoC) integration Image processing and recognition Machine learning hardware Autonomous driving applications High-speed motion tracking systems Publications include over 80 top-tier journal/conference papers (e.g., TCAS-I/II, ESSCIRC, APCCAS) on AI accelerators, stereo vision processors, and sensor interfaces, with 15 recent articles highlighting advancements in stereo matching, video denoising, and reconfigurable coprocessors. Scientific Awards : 2023 - SUSTech Outstanding Teaching Award 2022 - APCCAS Best Paper Nomination 2022 - PrimeAsia Bronze Leaf Award 2020 - Wu Wenjun Artificial Intelligence Science and Technology Award (Second Prize) Patents : 9 Chinese and 3 Japanese inventions in AI chip design, stereo matching systems, and sensor interfaces.
Aqib Javed serves as a Teaching Fellow (Lecturer) in Electrical Engineering at Ulster University's School of Computing, Engineering and Intelligent Systems, based at the Derry~Londonderry campus. His research focuses on applying spiking neural networks to solve critical challenges in networks-on-chip architectures, structural health monitoring systems, and emerging healthcare technologies. Dr. Javed's primary research domains include neural networks, networks-on-chip optimization, hardware engineering implementations, structural health monitoring, deep learning methodologies, and machine learning applications. His work demonstrates particular expertise in developing neuromorphic computing solutions for real-time systems where conventional AI approaches face latency or power constraints. Analysis of his publication history reveals a clear research trajectory: early work concentrated on networks-on-chip traffic prediction (2020-2021), expanded into structural health monitoring hardware systems (2020-2021), then progressed to neuromorphic datasets for sensory fusion (2023), with recent publications pivoting toward edge intelligence applications in cardiac healthcare (2025). This evolution shows increasing specialization in deploying spiking neural networks at the hardware edge for time-sensitive applications. No scientific awards were documented in the available materials. Information regarding student advising responsibilities or research grant acquisitions was not present in the source documentation. Dr. Javed maintains active research collaborations within Ulster University's neuromorphic engineering group, working closely with Professor Jim Harkin, Professor Liam McDaid, and Dr. Jinghai Liu on hardware acceleration projects for artificial intelligence systems, with laboratory work centered around FPGA implementations of spiking neural network architectures.
Professor Liam McDaid serves as Interim Research Director at Ulster University's School of Computing, Engineering and Intelligent Systems (Magee Campus, Derry~Londonderry). His leadership spans computational neuroscience and neuromorphic engineering projects addressing global challenges through the UN Sustainable Development Goals framework. Research focuses on computational neuroscience and neural engineering , with expertise in spiking neural networks, astrocyte modeling, hardware implementations (FPGAs/Networks-on-Chip), and biomedical applications. His work integrates computer hardware with biological systems for fault-tolerant computing and medical diagnostics. Key publications reveal trends in neuromorphic hardware for real-time fault detection (RISC-V systems), medical AI for cardiac/adrenal diagnostics, and event-driven sensing . Research bridges computer engineering with neuroscience to solve healthcare infrastructure challenges. Prize 'Biotechnology' category in Northern Ireland Science Park 25K Award (2011) IgniteNI's global Accelerator Programme (2021) Life and Health Startup Company of the Year 2019 (InventNI) Prize Asthma (2019) Leads major projects including AI-EPOCMON (cardiac diagnostics), Nervous Systems (neural interfaces), and microwave thermal therapy for hypertension. Supervises PhD researchers in neural engineering while directing industry collaborations with healthcare technology focus. Maintains active partnerships across Europe in neuromorphic computing and medical device development. Directs research teams advancing spiking neural networks for hardware security and medical applications, with recent work on adrenal segmentation pipelines and RISC-V watchdog mechanisms. Future initiatives focus on expanding AI-driven point-of-care diagnostics and neuromorphic infrastructure monitoring systems.
Jason Cong holds the Volgenau Chair for Engineering Excellence at UCLA's Samueli School of Engineering. With over 500 publications and leadership in 100+ research projects, he revolutionized FPGA design through polynomial-time logic mapping and High-Level Synthesis (HLS). His lab's AutoESL technology became the foundation of AMD/Xilinx's commercial tools. Education Peking University: Undergraduate Degree University of Illinois at Urbana-Champaign: MS in Computer Science University of Illinois at Urbana-Champaign: PhD in Computer Science Research Focus Cong pioneers domain-specific acceleration across deep learning, medical imaging, genomic sequencing, and data compression. His customizable computing architectures demonstrate orders-of-magnitude energy efficiency improvements over conventional CPUs. Quantum computing and scalable algorithm design constitute emerging research vectors. Honors and Impact ACM Breakthrough Award (2025) for FPGA automation IEEE Noyce Medal for semiconductor contributions Dual Fellow: ACM & IEEE National Academy of Engineering member Newton Award for EDA technical impact Commercialization Founded Aplus Design Automation (FPGA algorithms) and AutoESL (acquired by Xilinx/AMD). Current tools power industry-standard FPGA synthesis workflows enabling C/C++ programmability.
Dr. Miron Kłosowski serves as an Assistant Professor at the Department of Microelectronic Systems within the Faculty of Electronics Telecommunications and Informatics at Gdańsk University of Technology. His primary workplace is located in Building A of the Faculty, room 309, where he conducts research and teaching activities in microelectronic systems and image sensor technologies. Dr. Kłosowski obtained his "dr inż." (Doctor of Engineering) degree on January 23, 2001, in the field of Electronics (Technology) from the Faculty of Electronics Telecommunications and Informatics. His academic journey has focused on the intersection of analog circuit design and digital image processing. His research program centers on advanced microelectronic systems with particular emphasis on image sensors and analog-to-digital conversion architectures. Dr. Kłosowski's work bridges theoretical circuit design with practical applications in imaging technology through: CMOS image sensor architecture and optimization for reduced noise Innovative analog-to-digital converters with embedded processing capabilities Low-power circuit design techniques for sensor interfaces Digital correction methods for image sensor non-uniformities Field-programmable gate array implementations for real-time signal processing Massively parallel imaging array architectures Analysis of Dr. Kłosowski's publication record (2017-2024) reveals a consistent research trajectory toward more integrated, efficient solutions for digital pixel sensors. His most recent work demonstrates significant advancements in on-the-ramp processing techniques that enable simultaneous image acquisition and filtering. The research spans both theoretical circuit innovations and practical implementations with applications in biomedical imaging and general-purpose camera technology. His educational contributions include adapting hardware teaching methodologies to remote environments during the pandemic, as documented in his IEEE Transactions on Education publication. Dr. Kłosowski maintains an extensive teaching portfolio across multiple engineering disciplines, regularly instructing courses in programmable circuits, FPGA applications, and digital signal processing. His teaching responsibilities span undergraduate and graduate programs in Electronics and Telecommunications, Informatics, and Biomedical Engineering, with consistent course offerings through the 2024/25 academic year. He participates in research initiatives including the HAPADS project (Highly Accurate and Autonomous Programmable Platform for Providing Air Pollution Data Services to Drivers and Public), which is funded through Norwegian and EEA funds under the Applied Research Program. This project is realized through the Department of Microelectronic Systems under agreement NOR/POLNOR/HAPADS/0049/2019-00.
Hao Zhang is a Research Fellow at the School of Electrical and Data Engineering, Faculty of Engineering and Information Technology, University of Technology Sydney (UTS). He is affiliated with the Global Big Data Technologies Centre (GBDTC) at UTS, where he conducts cutting-edge research in high-speed wireless communications and FPGA-based real-time implementation. His work focuses on advancing terahertz and millimeter wave communication systems for next-generation wireless applications. Hao Zhang's educational background includes: Ph.D. in Engineering from the University of Technology Sydney (2019) M.Eng. in Electronics and Communication Engineering from Xidian University, China (2014) B.Eng. in Electronics and Communication Engineering from Xidian University, China (2011) Hao Zhang's research primarily centers on high-speed wireless communications, with a specific focus on real-time implementation using field-programmable gate arrays (FPGAs). His current work explores enhancing algorithm deployment efficiency on FPGAs through advanced LLM-assisted hardware design methodologies, leading to significant improvements in algorithm-hardware co-design and overall system performance. His expertise spans terahertz communication systems, millimeter wave technologies, signal processing, and wireless system implementation. Zhang's research has practical applications in 6G communications, point-to-point links, backhaul networks, and intersatellite communications where atmospheric attenuation is minimal. Analysis of Zhang's recent publications reveals a strong focus on pushing the boundaries of high-speed wireless communication, particularly in the terahertz spectrum. His work consistently demonstrates real-time implementations achieving data rates of 30-50 Gbps, with increasing sophistication in signal processing techniques. The research shows a progression from basic system demonstrations to more advanced implementations incorporating interference suppression, full-duplex capabilities, and nonlinearity mitigation. His publications span both journal articles in prestigious IEEE transactions and conference presentations at major international venues, indicating strong recognition in the wireless communications research community. Hao Zhang has collaborated extensively with researchers across various institutions, particularly within the University of Technology Sydney ecosystem. His work often involves interdisciplinary collaboration between signal processing experts, antenna designers, and hardware implementation specialists. While specific grant information isn't detailed in the provided text, his consistent publication record suggests active funding support for his research activities in high-speed wireless communications. Zhang is part of the Global Big Data Technologies Centre (GBDTC) at UTS, which appears to be a multidisciplinary research center focused on advanced communication technologies. His work within this center involves close collaboration with other researchers working on various aspects of wireless communication systems, from theoretical signal processing to practical hardware implementation. The center likely provides the specialized laboratory facilities necessary for terahertz and millimeter wave research, including advanced signal generators, spectrum analyzers, and FPGA development platforms.
Yuriy V. Pershin is a Professor in the Department of Physics and Astronomy at the McCausland College of Arts and Sciences, University of South Carolina. His research focuses on emerging memory devices (e.g., memristors, memcapacitors), unconventional computing paradigms, and 2D materials like graphene. He leads experimental and theoretical investigations into device fabrication, nonlinear dynamics, and nanoscale phenomena. Research Interests: Emerging Memory Devices: Designing memristive systems with memory retention capabilities, modeling their electrical behavior, and exploring their applications in low-power circuits. Unconventional Computing: Developing computing architectures that integrate memory and logic (e.g., neuromorphic networks), demonstrated through FPGA implementations and memristive neural networks. 2D Materials: Studying graphene kinks and antikinks as nanoscale motion carriers, with applications in nanoelectromechanical systems (NEMS). Key contributions include defining rigorous tests for ideal memristors, optimizing Joule-loss reduction in memristive systems, and proposing hardware implementations of memcomputing. His work bridges fundamental physics with applied engineering, leveraging tools like SPICE modeling and molecular dynamics simulations. Publications emphasize theoretical rigor and experimental validation, often addressing controversies in memristor characterization. Notable themes include noise-induced chaos in memcomputing, synchronization in memristive networks, and graphene-based electromechanical systems. Awards and Grants: No specific awards listed, though his work reflects sustained research funding in nanotechnology and device physics. Collaborations span academia and industry, focusing on practical applications of novel materials and circuits. Labs/Teams: His laboratory focuses on interdisciplinary projects at the intersection of physics, electronics, and materials science, with ongoing efforts in device fabrication, circuit emulation, and theoretical modeling.
Dr. Horacio Rostro González is an Assistant Professor in the Department of Industrial Engineering at IQS School of Engineering, Ramon Llull University. His research focuses on neural network implementations using field-programmable gate arrays (FPGAs), with applications in robotics, motor imagery systems, and industrial automation. Research Focus: Development of hardware-accelerated AI systems for pattern recognition, robot locomotion control, and human-machine interfaces. Key projects include neuromorphic computing for spatio-temporal classification and AI-driven photonics parameter optimization. Projects: Member of the Industrial Engineering Research Group (GEPI), working on offshore wind farm data analysis using machine learning and renewable energy prediction systems.
Dr. Lixuan Lu is a Professor in the Department of Energy and Nuclear Engineering at Ontario Tech University, affiliated with the Energy Systems and Nuclear Science Research Centre (ERC). Their research focuses on nuclear power plant instrumentation, control systems reliability, and risk-informed maintenance strategies. Dr. Lu holds a PhD in Electrical and Computer Engineering from the University of Western Ontario (2005), and prior degrees from Beijing Institute of Technology (MES 2001, BES 1998). Education: PhD (2005), MES (2001), BES (1998) in Automatic Control/Electrical Engineering Research Interests Dr. Lu investigates advanced control methodologies for nuclear facilities, including networked control systems reliability, safety-critical instrumentation, and risk assessment for non-coherent systems. Key applications include CANDU reactor control, hydrogen production via thermochemical cycles, and FPGA-based instrumentation. Their work bridges theoretical reliability analysis with practical implementation in nuclear energy systems. Publications Recent work emphasizes risk-informed maintenance strategies, FPGA systems for nuclear instrumentation, and hydrogen production plant modeling. Key contributions address safety-critical control systems, probabilistic safety assessment using Petri nets, and reliability evaluation of standby systems. Dr. Lu collaborates on projects integrating supercritical water-cooled reactors (SCWR) with copper-chlorine thermochemical cycles for hydrogen co-generation. Awards & Grants No specific awards or grants listed in the provided materials. Dr. Lu’s research is supported through institutional and collaborative initiatives. Labs & Teams Affiliated with the Energy Systems and Nuclear Science Research Centre (ERC), focusing on interdisciplinary energy solutions.
Aristides Efthymiou is an Assistant Professor at the Department of Computer Engineering and Informatics, University of Ioannina. He holds a PhD from the University of Manchester (2002) and has held academic positions at the University of Edinburgh (2004–2011) and research roles at the Institute of Microelectronics, National Center for Scientific Research 'Demokritos,' and Integrated Systems Development SA. His research focuses on microarchitecture, digital systems design, and VLSI circuits. Education: Bachelor's and postgraduate diploma in Computer Science, University of Crete (1993–1995) PhD in Computer Science, University of Manchester (2002) Research interests include approximate computing, visible light communications (VLC), and energy-efficient circuit design. He is a member of the VLSI Systems and Computer Architecture Laboratory (VCAS), contributing to projects like the Artemis Program on supply chain traceability. His work spans over 25 international publications, emphasizing hardware optimization and signal processing in VLC systems. Awards: None explicitly mentioned. Lab and Team: Leads the VCAS lab, collaborating with faculty members like Professors George Tsiatouchas and Chrysovalantis Kavousianos. Supervises doctoral candidates in areas like approximate multipliers and VLC systems.
Louise Helen Crockett is a Senior Lecturer in the Department of Electronic and Electrical Engineering at the University of Strathclyde, Faculty of Engineering. She completed both her undergraduate and postgraduate studies at the same institution and has been a member of the academic staff since 2007, progressing from Research Fellow to Senior Lecturer in 2025. She is an active member of the Strathclyde Software Defined Radio (StrathSDR) research group, where she leads a team of researchers and PhD students, and contributes to multiple industry-facing research projects. Her educational background includes a Doctor of Philosophy (PhD) in Code Division Multiple Access Applied to SpeckNets and a Master of Engineering (MEng) in Electronic & Electrical Engineering with Business Studies (with distinction), both from the University of Strathclyde. Louise's research is centered on the hardware implementation of Digital Signal Processing (DSP) systems for wireless communications, with a focus on Field Programmable Gate Arrays (FPGAs), System on Chip (SoC) devices, and AMD/Xilinx RFSoC technologies. She also works on design methodologies and tools for FPGA-based systems. Her teaching encompasses Hardware Description Language (HDL) design, Simulink-based workflows, and FPGA programming, with an emphasis on practical industry-relevant skills. She has co-authored several books, including Software Defined Radio with Zynq UltraScale+ RFSoC (2023), and develops training materials for broader academic and professional use. Her recent publications reflect a strong trend in FPGA-accelerated signal processing, 5G/6G physical layer implementation, RFSoC applications, and machine learning for modulation classification. These works demonstrate a consistent focus on bridging theoretical algorithms with real-world hardware deployment, particularly in advanced wireless systems and spectrum utilization. She has received the Best Student Paper Award on 29 May 2018. This award was shared with her advisees, highlighting her role in mentoring high-impact research. Louise supervises final-year undergraduate, MSc, and PhD students, and is actively involved in research projects funded by EPSRC, including the Industrial CASE Account and initiatives on spectrum sharing for 5G/6G. She also leads professional training activities, such as short courses on RFSoC and PYNQ, further extending her impact beyond the university. She leads a research team within the StrathSDR group, which focuses on SDR, FPGA-based DSP, and next-generation wireless systems. Her team collaborates on open innovation platforms and contributes datasets and codebases to support reproducible research.
Dr. Zhiru Zhang is a Professor in the School of Electrical and Computer Engineering at Cornell University and a member of the Computer Systems Laboratory. His research focuses on new algorithms, methodologies, and design automation tools for heterogeneous computing systems, with recent publications centering on high-level synthesis (HLS), hardware specialization for machine learning, and programming models for software-defined FPGAs. Dr. Zhang earned his Ph.D. in Computer Science from UCLA, where he co-founded AutoESL based on his dissertation research on HLS. AutoESL was acquired by Xilinx (now AMD), and its HLS tool evolved into Vivado HLS (now Vitis HLS), which is widely used for designing FPGA-based hardware accelerators. He also holds a B.S. in Computer Science from Peking University and an M.S. in Computer Science from UCLA. Dr. Zhang's research interests span hardware design, high-level synthesis, FPGA acceleration, machine learning acceleration, heterogeneous computing systems, and computer architecture. His work bridges the gap between software algorithms and hardware implementation, focusing on creating efficient design automation tools that enable specialized hardware for emerging applications, particularly in AI and machine learning. His recent publications demonstrate strong trends in differentiable programming for hardware design, sparse computation optimization, and efficient implementation of large language models on FPGAs. Dr. Zhang has received numerous prestigious awards including being named an IEEE Fellow, the Intel Outstanding Researcher Award, AWS AI Amazon Research Award, Facebook Research Award, Google Faculty Research Award, DAC Under-40 Innovators Award, Rising Professional Achievement Award from UCLA, DARPA Young Faculty Award, IEEE CEDA Ernest S. Kuh Early Career Award, and NSF CAREER Award. His papers have won multiple Best Paper Awards from top conferences including ASPLOS (2025), ISPD (2025), FPGA (2024, 2022, 2021, 2019), AutoML (2024), FCCM (2018), ACM TODAES (2012), and Top Picks in Hardware and Embedded Security (2020). His papers on HLS scheduling and application-specific instruction-set processor (ASIP) compilation have been inducted into the ACM/SIGDA TCFPGA Hall of Fame for the classes of 2022 and 2023, respectively. On the teaching side, Dr. Zhang has received the Ruth and Joel Spira Award for Excellence in Teaching (2018) and twice the Michael Tien'72 Excellence in Teaching Award (2016, 2022), the highest recognition for teaching in the College of Engineering. He teaches courses including ECE 5775/6775: High-Level Digital Design Automation, ENGRD/ECE 2300: Digital Logic and Computer Organization, ECE 6980: Special Topics on Hardware Acceleration of Deep Learning, ENGRG 1050: Freshman Engineering Seminar, and ECE 5950: Special Topics on High-Level Digital Design Automation. Dr. Zhang leads an active research group with numerous PhD students and postdocs. His current students include Jordan Dotzel, Jie Liu, Zichao Yue, Yixiao Du, Yaohui Cai, Andrew Butt, Hongzheng Chen, Jiajie Li, Niansong Zhang, Matthew Hofmann, Zhanqiu Hu, Vesal Bakhtazad, and Grace Dinh. His alumni have gone on to successful careers at companies like NVIDIA, Google, AWS AI, Meta, Microsoft, and academic positions at universities including University of Illinois Chicago and Zhejiang University. The group has received multiple research grants from industry partners including AWS, Intel, and Google.
Dr. Marcin Ziembicki serves as an Assistant Professor at the Institute of Radioelectronics and Multimedia Technology within the Faculty of Electronics and Information Technology at Warsaw University of Technology. His research integrates experimental particle physics with advanced detector development, focusing on neutrino interactions and nuclear phenomena through major international collaborations. His primary research interests include: Neutrino oscillation physics and cross-section measurements Development of photomultiplier-based detection systems for water Cherenkov experiments Analysis of hadronic final states in deep-inelastic scattering Spin-dependent asymmetries in polarized targets Real-time FPGA-based data acquisition systems Recent publications demonstrate concentrated activity in T2K and Hyper-Kamiokande neutrino experiments, with significant contributions to oscillation parameter measurements, neutron capture studies in oxygen targets, and detector calibration techniques. His work spans theoretical modeling and hands-on hardware implementation, particularly in FPGA-based readout systems for particle detectors. With 168 publications and an h-index of 49 (Scopus), his experimental work has advanced precision measurements in neutrino physics. He has supervised 7 promoted theses and participated in 14 research projects, including the T2K Near Detector upgrade and Hyper-Kamiokande photosensor development. Dr. Ziembicki maintains active roles in the COMPASS spin physics collaboration and the AMBER experiment, where he develops specialized electronics for hadron spectroscopy. His technical expertise bridges particle physics with electrical engineering, particularly in signal processing and detector electronics design for high-radiation environments.
