جست‌وجوی استاد و پژوهشگر

Moritz Weißbrichمشاهده پروفایل

پژوهشگر

• Processor Architecture
• Low-power Electronics
• Approximate Computing
• +۳ مورد دیگر

M.Sc. Moritz Weißbrich is a Researcher at the Chair for Chip Design for Embedded Computing , part of the Institute of Theoretical Computer Science at Technische Universität Braunschweig. Holding an M.Sc. in Electrical Engineering and Information Technology from Leibniz Universität Hannover, his academic focus spans high-performance/low-power processor architectures , approximating arithmetic circuits , and stochastic computation techniques for fault-tolerant systems. His research portfolio includes 20+ peer-reviewed publications since 2017, with recent work on Nano-scale controllers for FPGA systems Biomedical sensor design in 22nm FDSOI Energy-aware VLIW processor optimization Stochastic timing analysis frameworks He has been developing ultra-low-power embedded solutions since 2021, following prior research assistant roles at Leibniz Universität Hannover's Institute of Microelectronic Systems (2017-2021). Key technical contributions appear in venues like Springer LNCS , IEEE RFIC Symposium , and Journal of Systems Architecture , focusing on processor customization , energy harvesting systems , and radiation-hardened circuit design . His work addresses challenges in autonomous computing, harsh environment electronics, and precision agriculture applications.

Luca Pezzarossaمشاهده پروفایل

دانشیار

• Real-Time Systems
• Digital Microfluidics
• Compiler Optimizations
• +۷ مورد دیگر

Luca Pezzarossa is an Associate Professor in the Department of Applied Mathematics and Computer Science at the Technical University of Denmark (DTU). His research focuses on real-time systems, embedded computer systems, digital microfluidics, compiler optimizations, and hardware accelerators. He leads projects such as the Edu4Chip: Joint Education for Advanced Chip Design in Europe initiative and supervises PhD students in areas like compiler optimizations for neural networks and speech enhancement algorithms. His academic journey includes contributions to interdisciplinary fields, combining computer engineering with biomedical applications such as biochip design and PCR optimization. He actively engages in open-source tool development, particularly using the Chisel framework for hardware design education and research. Key research themes include: Real-time systems and time-predictable architectures Compiler-driven optimizations for constrained devices Digital microfluidics for lab-on-a-chip systems Edge computing and TinyML applications Recent publications highlight innovations in microplastic detection on edge devices, dynamic channel pruning for speech enhancement, and parallel execution engines for digital microfluidics. His work aligns with sustainable development goals through environmental applications and energy-efficient technologies. Current projects involve: PhD Supervision: Andrea Cerioli (Compiler Optimizations), Riccardo Miccini (AI-to-Neural Network Mapping), Ehsan Khodadad (Time-predictable Systems) Research Grants: EU-funded Edu4Chip (2023–2025), multiple industry-academia collaborations Labs and teams: Leads the Embedded Systems Engineering group at DTU, focusing on interdisciplinary hardware-software co-design for real-world applications. Active in developing open-source frameworks for education and research.

Mark C. Jeffreyمشاهده پروفایل

استادیار

• Computer Architecture
• Parallel Computing
• Computer Systems
• +۳ مورد دیگر

Mark C. Jeffrey is an Assistant Professor in the Edward S. Rogers Sr. Department of Electrical and Computer Engineering at the University of Toronto, cross-appointed to the Department of Computer Science. His research focuses on computer architecture and systems, aiming to simplify parallel programming for software engineers through novel compilers and large-scale multicore architectures. Previously, he was a Research Scientist at Facebook AI Research and earned his PhD from MIT under Daniel Sanchez. He holds a MASc and BASc from the University of Toronto. Education: PhD in Computer Science, MIT (2019) MASc in Computer Engineering, University of Toronto (2011) BASc in Engineering Science, University of Toronto (2009) Research interests include parallel computing, compilers, multicore architectures, and energy-efficient systems. His work bridges hardware-software co-design to enable scalable parallelism in modern systems. Notable awards include the George M. Sprowls PhD Thesis Award (2nd place, 2019), Best Paper at NoCArc 2023, and a Best Paper Award at ARC 2010. He teaches advanced courses in computer architecture and parallel programming (ECE1755, ECE552). His GitHub repository bf-intersect explores Bloom filter configurations for address-set disambiguation, tied to his SPAA 2011 and MASc thesis work.

• Formal Verification
• Parallel Programming
• Programming Languages
• +۳ مورد دیگر

Frédéric LOULERGUE is a Full Professor at the University of Orléans, affiliated with the LIFO (Laboratoire d'Informatique Fondamentale d'Orléans) laboratory and part of the LMV research team (Languages, Models, and Verification). His work focuses on formal methods for programming languages, parallel computing, and cybersecurity. He leads research in verified parallel frameworks, distributed systems reconfiguration, and TPM software stack validation. Contact him at frederic.loulergue@univ-orleans.fr or visit his homepage at https://www.univ-orleans.fr/lifo/Members/loulergu/ . Research interests include formal verification of parallel algorithms, deductive program analysis with tools like Frama-C and Coq, and the development of formally verified distributed systems. Recent work emphasizes combining deductive verification with shape analysis, runtime monitoring for security properties, and formalizing decentralized reconfiguration languages in Maude. His publications span topics from verified parallel functional programming (SyDPaCC framework) to cybersecurity in Trusted Platform Modules (TPM). He collaborates on frameworks like WhyBSML for scalable parallel computing and Concerto-D for distributed reconfiguration. No scientific awards are listed, but his contributions are highlighted through extensive peer-reviewed publications and conference activities. Labs/Teams: Member of LIFO's LMV team, contributing to the formal methods research group. Involved in cross-disciplinary projects on cloud computing security and high-performance parallel programming.

Luis Cezeمشاهده پروفایل

استاد

• Computer Architecture
• Programming Languages
• Machine Learning Systems
• +۴ مورد دیگر

Luis Ceze is a Full Professor at the University of Washington's Paul G. Allen School of Computer Science and Engineering, holding the Edward D. Lazowska Endowed Professorship. He leads research groups focusing on hardware/software systems (Sampa), machine learning systems (SAMPL), and DNA-based computing (MISL). Additionally, he co-founded and serves as CEO of OctoML, a company advancing AI infrastructure. His work bridges computer architecture, programming languages, machine learning, and biological systems to innovate computing paradigms. Education : PhD in Computer Science from UIUC (2007), MEng and BEng in Electrical Engineering from University of São Paulo (Brazil). Research Interests : Approximate computing, DNA data storage, molecular programming, and systems for machine learning. Key projects include TVM (deep learning compiler), APPROXBENCH, and molecular computing frameworks. Publications : Over 150 peer-reviewed papers spanning systems, architecture, and biology. Recent work emphasizes DNA storage scalability, neural network optimization, and hybrid molecular-electronic computing. Awards : ACM SIGARCH Maurice Wilkes Award (2020), multiple IEEE Micro Top Picks, and recognition for contributions to approximate computing and DNA storage. Grants & Industry : Supported by Microsoft, Intel, Google, and NSF. Active in startups and venture partnerships (Madrona Venture Group). Labs/Teams : Molecular Information Systems Lab (MISL), SAMPL/Sampa groups. Collaborates across UW, industry, and international institutions.

Christophe Dubachمشاهده پروفایل

دانشیار

• Data-Parallel Language Design
• Hardware Design Space Exploration
• Heterogeneous Computing
• +۴ مورد دیگر

Christophe Dubach is an Associate Professor at McGill University, jointly appointed in the Department of Electrical and Computer Engineering (ECE) and the School of Computer Science (CS). He holds a Canada CIFAR AI Chair at Mila. Previously, he was a Reader (Associate Professor) at the University of Edinburgh until 2019. His research focuses on data-parallel language design, high-level code generation for parallel hardware (GPUs/FPGAs), hardware design space exploration, and applying machine learning to these areas. He has advised numerous PhD and MSc students on topics like FPGA-based high-level synthesis, neural networks, and compiler optimization. Education: PhD in Informatics (2009, University of Edinburgh), MSc in Computer Science (2005, EPFL, Switzerland). Teaching includes courses on compiler design, computer organization, and high-level synthesis. His projects include Lift (a functional IR for GPU code generation) and High-Level Synthesis of Neural Networks on FPGAs. Collaborators include Michel Steuwer, Lu Li, and others in the fields of compilers, machine learning, and parallel computing.

Manya Ghobadiمشاهده پروفایل

دانشیار

• Computer Networks
• Machine Learning Systems
• Cloud Infrastructure
• +۴ مورد دیگر

Manya Ghobadi is an Associate Professor in the Department of Electrical Engineering and Computer Science at MIT, affiliated with the Computer Science & Artificial Intelligence Laboratory (CSAIL). Her research focuses on efficient systems for machine learning, cloud infrastructure, and reconfigurable networks. She holds appointments in both the School of Engineering and the Department of EECS at MIT. Education: PhD from the University of Toronto, prior experience at Microsoft Research and Google before joining MIT. Research Interests: Systems for ML, cloud infrastructure, data center networks, optical networks, hardware-software co-design, and network optimization. Publications: Over 50+ papers in top venues including SIGCOMM, NSDI, HotNets, and MLSys, with awards such as the NSF CAREER and Sloan Fellowship. Students: Advises 10+ PhD candidates including Mingran Yang (Microsoft Research Fellow) and Sudarsanan Rajasekaran. Awards: Sloan Fellowship, ACM SIGCOMM Rising Star, Optica Simmons Memorial Speakership. Labs/Teams: Leads research on photonic computing (NetBlocks, Lightning) and network optimization (Cassini, TopoOpt). Collaborates with industry partners like Juniper and Google.

Jean-Baptiste Jeanninمشاهده پروفایل

استادیار

• Verification of cyber-physical systems
• Logics and semantics of programming languages
• Programming with coinductive types
• +۳ مورد دیگر

Jean-Baptiste Jeannin is an Assistant Professor in the Department of Aerospace Engineering at the University of Michigan — Ann Arbor, leading the MARVL group. He is also affiliated with the departments of Computer Science and Engineering and Robotics. His research focuses on formal verification of cyber-physical systems, logics and semantics of programming languages, and coinductive programming types. He holds a Ph.D. in Computer Science from Cornell University (2013) and a Diplôme d'Ingénieur from École polytechnique (2007), with prior roles at Samsung Research America and Carnegie Mellon University. His research interests include verification of aerospace applications, program logics, and formal methods applied to robotics and distributed systems. Notable work includes formally verified algorithms for collision avoidance, network consensus protocols, and numerical methods. He teaches courses such as AERO 552 (Aerospace Information Systems) and EECS 590 (Advanced Programming Languages). Jeannin's recent publications emphasize formal verification in hybrid systems, rounding error analysis, and hardware-software co-design. His work bridges theoretical foundations with practical applications in autonomous systems, cybersecurity, and computational physics. Collaborations include projects on certified approximations of mathematical functions and verified distributed system protocols.

Nektarios Kozyrisمشاهده پروفایل

استاد

• Parallel and Distributed Systems
• Computer Architecture
• High-Performance Computing
• +۵ مورد دیگر

Nektarios Kozyris is a Professor of Computer Science and former Dean of the School of Electrical and Computer Engineering at the National Technical University of Athens (NTUA). He holds a PhD and Diploma in Electrical and Computer Engineering from NTUA. His research focuses on parallel and distributed systems, computer architecture, high-performance computing, and cloud infrastructure. He has authored over 180 papers and contributed to major projects like the Okeanos public cloud and Synnefo open-source software. Kozyris has led EU initiatives such as ACTiCLOUD and EuroEXA, and advises startups like Arrikto. He is a senior member of the ACM, IEEE Computer Society, and co-founder of the Greek Free/Open Source Software Society (GFOSS). His academic roles include teaching courses on computer architecture, operating systems, and distributed systems. Awards include Best Paper Awards at IPDPS 2001 and CCGRID 2013, and Intel's recognition for research in transactional memory. He actively contributes to conferences as a PC member and co-chair, and has supervised numerous PhD students in areas like distributed systems and sparse matrix computations. Kozyris pioneered the ~okeanos cloud infrastructure and advanced storage systems like Pithos. His work on GridTorrent and XOROS demonstrates innovation in data management and peer-to-peer systems. Current research includes elastic resource provisioning, quantum machine learning, and FPGA-based acceleration. His labs at NTUA and collaborations with institutions like ICCS and IMIS drive advancements in computing systems and software engineering.

Waleed Meleisمشاهده پروفایل

دانشیار

• Combinatorial optimization
• Machine Learning
• Large-scale machine learning
• +۷ مورد دیگر

Waleed Meleis is an Associate Professor in the Department of Electrical and Computer Engineering at Northeastern University and serves as Vice Provost for Graduate Education. He holds an MS and PhD from the University of Michigan and a BSE from Princeton University. His primary research focuses on combinatorial optimization, machine learning, assistive technology, and large-scale social experimentation platforms like Volunteer Science. He pioneered the Enabling Engineering student group, which designs assistive devices for individuals with disabilities, supported by over $350K in external funding. His leadership roles include Interim Vice Provost for Oakland Campus and Associate Dean for Graduate Education, driving significant enrollment growth and program development. Notable awards include multiple Martin W. Essigmann Teaching Awards and the Eta Kappa Nu Professor of the Year Award. His work bridges technical innovation with societal impact, particularly in healthcare and education. Education: PhD, Computer Science and Engineering, University of Michigan, 1996 MS, Computer Science and Engineering, University of Michigan, 1992 BSE, Electrical Engineering, Princeton University, 1990 Research: Combines algorithm design for engineering problems (e.g., cloud computing, spectrum management), social science experimentation platforms, and assistive technology development for rehabilitation. Leadership: Vice Provost for Graduate Education since 2023 Interim Vice Provost and Academic Lead for Oakland Campus (2023–2024) Associate Dean for Graduate Education (2020–2022) Awards: Recognized for teaching excellence and innovation in education across multiple years, including the 2010 Eta Kappa Nu Professor of the Year Award. Publications: Over 50 peer-reviewed papers in areas spanning reinforcement learning, distributed systems, and biomedical engineering. Grants: Secured funding from NSF, Army Research Lab, and private foundations for projects including Volunteer Science and Enabling Engineering initiatives. His interdisciplinary Dialogue of Civilizations course explores scientific revolutions, blending historical and computational perspectives. Enabling Engineering has delivered 60+ projects with clinical partners, emphasizing inclusive engineering education.

Rajit Manoharمشاهده پروفایل

استاد

• Asynchronous VLSI Design
• Concurrency
• Formal Methods
• +۵ مورد دیگر

Rajit Manohar is the John C. Malone Professor of Electrical & Computer Engineering at Yale University, with appointments in Applied & Computational Mathematics and Computer Science. He is a core member of the interdisciplinary Computer Systems Lab (CSL), which bridges ECE and CS departments. His research focuses on asynchronous VLSI design, neuromorphic computing, and hardware-software co-design. Education: Manohar holds a B.S., M.S., and Ph.D. from the California Institute of Technology. His academic career spans over two decades, with notable contributions to asynchronous circuit theory and neuromorphic engineering. Research Interests: Manohar's work emphasizes energy-efficient asynchronous architectures, concurrency control, and biologically inspired computing. He explores topics like formal methods for circuit verification, cognitive systems, and dynamic sensor networks. His lab develops tools like Fluid (asynchronous synthesis) and Neurobench (neuromorphic benchmarking). Publications: Recent work includes advancements in asynchronous logic synthesis (Maelstrom), neuromorphic frameworks (Neurobench), and scalable brain-computer interfaces (SCALO). His research often intersects NSF-funded projects in energy-aware computing and neuromorphic systems. Awards: Inaugural Misha Mahowald Prize (2025), MIT TR35 (2000s), IBM Goldberg Award (2023) Grants & Labs: Manohar leads NSF-supported initiatives in carbon-aware networking and neuromorphic hardware. The Computer Systems Lab collaborates across disciplines to advance sustainable computing and neuro-inspired architectures.

• Quantum Information Systems
• Quantum Simulators
• Quantum Error Correction
• +۴ مورد دیگر

Michael Gullans is an Adjunct Assistant Professor in the Department of Physics, Department of Computer Science, and the Institute for Advanced Computer Studies (UMIACS) at the University of Maryland. He is also a physicist in the Nanoscale Device Characterization Division at NIST. His research focuses on quantum information systems, quantum simulators, and fault-tolerant computing, emphasizing error correction, noise mitigation, and statistical physics applications in many-body quantum dynamics. Gullans holds a PhD from Harvard University (2013) and has held postdoctoral positions at QuICS and Princeton University. His work bridges theoretical quantum computing and experimental implementations, with contributions to quantum error correction protocols, analog quantum simulation, and the interplay of disorder and noise in quantum systems. Recent publications address scalable quantum architectures, low-depth random circuits, and hybrid fermion-qubit systems. He teaches advanced courses on quantum technology and quantum error correction. Key collaborations include NIST, QuICS, and institutions exploring silicon spin qubits and reconfigurable atom arrays. His research aims to advance fault-tolerant quantum computation and reliable quantum simulators for studying complex systems.

Arvindمشاهده پروفایل

استاد

• Computer Architecture
• Parallel Computing
• Memory Systems
• +۳ مورد دیگر

Arvind is the Johnson Professor of Computer Science and Engineering at MIT and a member of CSAIL (Computer Science and Artificial Intelligence Laboratory). He holds a B.Tech. from IIT Kanpur (1969), M.S. and Ph.D. from the University of Minnesota (1972-1973). His research focuses on computer architecture, parallel computing, memory models, and hardware synthesis. He pioneered dataflow architectures and developed the pH programming language. Notable projects include the Monsoon dataflow machine and Sandburst, a semiconductor company for 10G-bit Ethernet routers. Arvind has received prestigious awards like the IEEE Harry H. Goode Memorial Award (2012) and ACM Fellow (2007). He co-founded Bluespec Inc. and managed collaborations like Nokia-CSAIL (2006-2010). His work spans academia and industry, emphasizing scalable systems and secure computing. Research interests include synthesis/verification of digital systems, graph algorithms, and weak memory models. Current projects explore next-gen Graph AI systems and financial security applications.

• Computer Architecture
• Computer Systems
• Compilers
• +۸ مورد دیگر

José Cano Reyes is a Senior Lecturer (Associate Professor) at the University of Glasgow's School of Computing Science, leading the Glasgow Intelligent Computing Lab (gicLAB) and serving as deputy Head of the GLAsgow Systems Section (GLASS). His academic career includes postdoctoral roles at the University of Edinburgh (2014-2018) and Universitat Politècnica de Catalunya (2012-2013), with a PhD and engineering degree from Universitat Politècnica de Valencia (2004-2012). He has held visiting and guest lecturer positions at Edinburgh and Glasgow across computer architecture, compilers, and embedded systems topics. Research focuses on hardware-software co-design for edge AI, including DNN acceleration (FPGA/GPU), encrypted AI systems, and secure mission-critical SoCs. Key projects include EU's dAIEDGE, EPSRC IDEAL, and UKRI AppControl. He leads over 15 research staff and students in areas like quantization, sparsity exploitation, and robust AI deployment. Notable contributions span 100+ peer-reviewed publications across top venues (ISCA, IJCNN, IEEE TPDS) and 3 authored books on ad hoc networks and embedded systems. Academic service includes organizing 20+ conferences (ISPASS, Euro-Par, ASPLOS) and serving on editorial boards for ACM TACO and IEEE TPDS. His educational efforts include teaching Computer Architecture (Year 4), Computer Systems (Year 1), and supervising over 20 PhD/MSc students since 2017.

Dustin Richmondمشاهده پروفایل

استادیار

• Computer Architecture
• FPGA
• RISC-V
• +۴ مورد دیگر

Dustin Richmond is an Assistant Professor in the Department of Computer Science and Engineering at the Baskin School of Engineering, University of California, Santa Cruz. His work focuses on secure, usable hardware systems with applications in FPGA acceleration, RISC-V architectures, and side-channel analysis. Email: drichmond@ucsc Office: Engineering 2, Room 221 Research Interests: Secure hardware systems FPGA-based computing Manycore processors High-level synthesis Side-channel vulnerabilities Notable Article Trends: Recent publications emphasize cloud FPGA security, manycore design optimization, and hardware security. Earlier works focus on RISC-V acceleration, OpenCL compiler enhancements, and heterogeneous computing systems. GitHub Contributions: Maintains open-source projects like RISC-V-On-PYNQ and PYNQ-HLS, addressing FPGA programming challenges and RISC-V integration. Active in resolving community issues related to toolchain compatibility and hardware-software interfaces.