Benny Åkesson is a Professor by Special Appointment at the University of Amsterdam, holding the Chair of Design Methodologies for Cyber-physical Systems since 2019. He is also a Senior Research Fellow at ESI (TNO) in Eindhoven. His research focuses on design methodologies for cyber-physical systems, particularly model-based engineering and real-time systems. Åkesson has authored over 60 peer-reviewed papers and two books on memory controllers for real-time embedded systems. He has held positions at Eindhoven University of Technology, Czech Technical University, and CISTER/INESC TEC in Porto. Education: MSc from Lund Institute of Technology (2005), PhD from Eindhoven University of Technology (2010). Research interests span cyber-physical systems, real-time systems, and embedded systems design. Notable contributions include work on mixed-criticality scheduling, memory controllers, and real-time resource management. Awards include the Outstanding Paper Award at RTNS 2019 and Best Paper Award at ESTIMedia 2015. Labs/Teams: Active in CISTER/INESC TEC Research Unit and ESI (TNO), collaborating on projects involving real-time embedded systems and cyber-physical architectures.
Christos Kozyrakis is a Professor in the Departments of Electrical Engineering and Computer Science at Stanford University. His research focuses on computer architecture, computer systems, and cloud computing, with contributions to energy-efficient systems, machine learning infrastructure, and database-oriented operating systems. He leads the MAST research group and directs the Stanford Platform Lab. Education: Bachelor's Degree in Computer Science, University of Crete PhD in Electrical Engineering and Computer Sciences, University of California, Berkeley Research Interests: Kozyrakis explores cloud management, machine learning systems, energy-efficient architectures, and hardware-software co-design. Notable projects include DBOS (a database-oriented OS), the MAST group's work on serverless computing and storage systems, and energy-proportional data center design. Awards: ACM SIGARCH Maurice Wilkes Award ISCA Influential Paper Award NSF Career Award Okawa Foundation Research Grant ACM and IEEE Fellowships Advising & Grants: Supervised over 20 PhD and master's students, with notable alumni contributing to academia and industry. Supported by NSF, DARPA, SRC, Google, Microsoft, and other industry collaborations. Labs & Teams: Leads the MAST research group and directs the Stanford Platform Lab, focusing on cutting-edge systems research and prototyping.
Prof. Rainer Grauer is a Professor of Theoretical Physics at Ruhr University Bochum, specializing in computational plasma physics. His research focuses on numerical simulations of magnetized plasmas, magnetic reconnection, turbulence, and adaptive grid refinement techniques. He leads the research group FOR 1048 on cosmic magnetic fields and has held roles such as spokesperson of the Simulation Laboratory Plasma Physics and organizer of international academic events. Education: 1976–1983: Studies in Physics at University of Düsseldorf 1983: Diploma in Physics (Title: MHD stability of tokamaks with elliptical cross-section) 1988: PhD in Physics (Title: Interaction between tearing modes near a bifurcation point) 1994: Habilitation in Physics (Title: Singularities in ideal incompressible flows with swirl) Research Interests: His work spans plasma dynamics, high-performance computing, and astrophysical applications. Key areas include cache-coherent parallel computing, penalty methods for complex geometries, and Vlasov simulations on GPU clusters. Theoretical contributions to turbulence modeling in both Eulerian and Lagrangian frameworks are central to his research. Awards & Recognition: Recipient of the Bennigsen Promotion Prize (1992) Intel/HP IPF Award (2001) XXL Project Award for BlueGene CPU hours (2009) Professional Activities: Organized DPG Spring Conference on Plasma Physics (2002) Member of the Board of Directors at Ruhr University Computing Centre (since 2003) Co-organizer of academic schools on computational astrophysics and MHD dynamos Labs & Collaborations: Leads the Chair of Computational Plasma Physics and collaborates with institutions like FZ Jülich through the Simulation Laboratory Plasma Physics.
Dr. Ali Hurson is a Professor in the Department of Electrical and Computer Engineering at Missouri University of Science and Technology. His research spans high-performance computing, pervasive computing, mobile databases, personalized education, intelligent transportation systems, and cyber-physical systems. PhD, Computer Science, University of Central Florida MS, Computer Science, University of Iowa BS, Physics, University of Tehran Dr. Hurson’s research focuses on mobile data access systems, cybersecurity for critical infrastructure, and educational technologies. His work addresses challenges in data dissemination, power management, and fault propagation in heterogeneous systems. His recent publications emphasize agent-based modeling for cyber attacks, predictive analytics in education, and fault tolerance in cyber-physical systems. Trends include integration of machine learning, security frameworks, and sustainable computing. Editor-in-Chief, Advances in Computers Editor-in-Chief, Journal of Sustainable Computing and Communication Dr. Hurson has secured over $3 million in grants from NSF, DOE, DOT, and industry partners. He has held academic roles at Penn State University and the University of Oklahoma, transitioning to Missouri S&T in 2007.
Qing Yang is a Professor at the University of Rhode Island's College of Engineering , specializing in Electrical, Computer and Biomedical Engineering. His research spans Computer Architectures , Hardware/Software Designs for AI , Machine Learning , Data Storage , and Computer Networks . Ph.D., Computer Engineering, University of Louisiana, Lafayette, 1988 M.A., Electrical Engineering, University of Toronto, 1985 B.S., Computer Science, Huazhong University of Science and Technology, China, 1982 Yang's work focuses on advanced computing systems, including FPGA optimization, in-sensor processing for ADAS, and secure die-to-die communication architectures. His publications highlight innovations in storage systems, graph processing acceleration, and thermal monitoring for data centers. Recent research trends emphasize AI hardware acceleration , runtime security mechanisms , and smart storage solutions , with articles published in venues like FPGA, IEEE NAS, and ACM Transactions on Storage. Yang has secured multiple National Science Foundation grants for projects such as "Introducing a New In-Sensor Computing Architecture for Intelligent 3-D Imaging Systems." His inventions in data recovery and cache coherence have resulted in 14 U.S. patents , several of which were commercialized through a startup.
Jiong He is a researcher affiliated with Nanyang Technological University, Singapore, focusing on optimizing database systems and data processing through heterogeneous computing architectures. PhD thesis (2016) on high-performance databases using CPU-GPU coupling Key research areas: GPU/FPGA acceleration, real-time analytics, stream processing His work bridges hardware-software co-design with 15+ peer-reviewed publications in top venues like SIGMOD, VLDB, FPGA, and ICDCS since 2013. 2022: Micro-architecture analysis for OLAP on persistent memory 2020: Heterogeneity-aware scheduling for cloud analytics 2019: Frameworks for stream processing and DNN mapping to FPGAs
Reto Achermann is an Assistant Professor in the Department of Computer Science at the University of British Columbia (UBC), affiliated with the Systopia Lab. His research focuses on resilient and efficient systems at the intersection of operating systems, applied formal methods, and hardware models. He holds a PhD from ETH Zurich and previously served as a Postdoctoral Research Fellow at UBC under Prof. Margo Seltzer. Education: PhD in Computer Science from ETH Zurich (advised by Prof. Timothy Roscoe), MSc in Computer Science from ETH Zurich. Research interests include memory and storage systems, formal verification, device drivers, and software synthesis. He contributed to the Barrelfish OS project, particularly in memory management and hardware abstractions. Key achievements: Won distinguished artifact awards at ASPLOS'25 and SOSP'24 for 'Velosiraptor' and 'Verus'. Received UBC's Faculty of Science Excellence in Service Award for educational contributions. Served on program committees for ASPLOS, PLDI, EuroSys, and USENIX ATC. Current roles: Actively supervises graduate students in thesis-based MSc/PhD programs. Engages in interdisciplinary research and collaborates on grants. Previously advised undergraduate research projects and directed studies.
Tianyin Xu is an Assistant Professor in the Department of Computer Science at the University of Illinois at Urbana-Champaign (UIUC), with a courtesy appointment in the Department of Electrical and Computer Engineering (ECE). His research focuses on ensuring reliability and security in large-scale cloud and datacenter systems, with particular emphasis on configuration management, system verification, and distributed system resilience. He has held positions including a year at Facebook's Core Systems and completed his PhD at the University of California San Diego. Dr. Xu teaches courses such as CS 598(XU) on Cloud-Scale System Reliability, CS 523 (Advanced Operating Systems), and CS 423 (Operating Systems Design). He actively contributes to academic communities through roles like co-editing the SIGOPS Blog, serving on program committees for conferences like NSDI, OSDI, and EuroSys, and organizing the UIUC Systems Research Seminar. His research has been recognized with awards including the 2025 Best Paper Award at ASPLOS, 2024 Jay Lepreau Best Paper Award, and NSF CAREER Award. His work has led to impactful contributions like the Sieve framework for testing configuration changes and the Rex tool for kernel extension safety. Dr. Xu advises a vibrant group of students and collaborates with industry partners including VMware, IBM, and Intel. His lab focuses on advancing system reliability through innovative tools and methodologies.
Sam Westrick is an Assistant Professor in the Courant Institute of Mathematical Sciences at New York University . Previously, he was a postdoctoral researcher at Carnegie Mellon University , where he also earned his PhD in 2022 . Research Focus : Provably efficient implementations of high-level parallel programming languages, with key contributions in parallel garbage collection , automatic granularity control , and functional language design Teaching : Currently teaching CSCI-GA.3033-121: Programming Parallel Algorithms at NYU; was a TA for CMU courses 15-210 and 15-122 His work includes the development of MaPLe (MPL) , an open-source parallel functional language with performance comparable to C/C++. Notable awards include the SIGPLAN Reynolds Doctoral Dissertation Award (2023) and best/distinguished paper recognitions at QCE'24, POPL'24, and others. Selected Publications explore topics like quantum circuit simulation , cache coherence specialization , and separation logic for disentanglement . Active in conference service as ML Family Workshop chair and PLDI/SPAA committee member. Mentoring : Advises PhD students, master's and undergraduate researchers at NYU and CMU Collaborators : Umut Acar, Guy Blelloch, Stephanie Balzer, and 20+ others
Swarnendu Biswas is an Assistant Professor in the Department of Computer Science and Engineering at the Indian Institute of Technology Kanpur. He teaches courses including Programming for Performance (CS 610), Analysis of Concurrent Programs (CS 636), and Compiler Design (CS 335), demonstrating his expertise across multiple areas of computer systems. His research interests center on Programming Languages, Compilers, Runtime Systems, and Parallel Software Systems. He leads the PROSPAR (Programming Languages and PARallel Systems) research group, which focuses on developing techniques to build efficient and correct parallel software through program analysis, compiler optimizations, and runtime systems. His recent publications reveal a strong trend in addressing fundamental challenges in parallel computing, with work spanning cache coherence, false sharing detection, data race analysis for GPUs, verification of neural networks, and thermal-aware management of heterogeneous systems. His research bridges theory and practice with significant contributions to both hardware and software aspects of parallel systems. His scientific achievements have been recognized through multiple prestigious awards: Google India Research Award 2021 Google Explore CSR 2022 Research Grant from Intel Corporation SERB Start-up Research Grant 2019 Google Cloud Platform Research Credits (2019, 2020) IITK Initiation Grant 2019 As an advisor, he mentors several PhD and MTech students working on cutting-edge research in parallel systems. His PROSPAR group has secured significant funding from industry and government sources, supporting innovative research in programming languages and parallel systems. The group actively collaborates with industry partners including Google and Intel, addressing real-world challenges in parallel computing. He leads the PROSPAR research group at IIT Kanpur, which brings together faculty, PhD students, and MTech researchers to tackle challenging problems at the intersection of programming languages, compilers, and parallel systems. The group maintains strong industry connections and focuses on practical solutions that can be deployed in real systems.
Kamkin Alexander Sergeevich is an Associate Professor at the National Research University Higher School of Economics (HSE) and the Institute for System Programming named after V.P. Ivannikov of the Russian Academy of Sciences (ISP RAS). Affiliated with the Faculty of Computer Science and the Moscow Institute of Electronics and Mathematics, he specializes in software and computer engineering with a focus on formal methods for program and microprocessor verification. Education: Candidate of Physical and Mathematical Sciences (2009), Moscow State University (2003) in Applied Mathematics and Computer Science Research Areas: Formal methods, program verification, microprocessor verification, model-based testing, static analysis His recent publications highlight the application of formal specifications in test program generation for architectures like RISC-V and ARMv8, emphasizing simulation modeling and ISA specification maintenance. Key trends include the integration of constraint-based testing, formal modeling, and automated verification tools. Kamkin supervises students in software engineering and collaborates with colleagues such as Tatarnikov A.D., Protsenko A.S., and Chupilko M.M. At HSE, he has taught courses including Software Verification (Master's, 09.04.04 Software Engineering) and High-Level and Simulation Modeling of Digital Systems (Bachelor's, 09.03.01 Computer Science and Engineering). His work is associated with the MicroTESK framework, which automates test generation for microprocessors.
Håkan Grahn is a Professor of Computer Engineering at the Department of Computer Science, School of Computing, Blekinge Institute of Technology (BTH) in Sweden. He has been a faculty member since 1996, becoming a full professor in 2007. His academic leadership includes serving as Head of Department (1999-2002) and Dean of Research (2011-2013) at BTH. He leads multiple significant research projects including GPAI (General Purpose AI Computing) and Green Clouds, with funding from ELLIIT, the Knowledge Foundation, and Vinnova. His educational background includes: M.Sc. in Computer Science and Engineering (1990) from Lund University Ph.D. in Computer Engineering (1995) from Lund University Håkan's research spans several interconnected domains in computer science and engineering, with a strong emphasis on practical applications. His work in computer architecture focuses on optimizing system performance through innovative cache coherence protocols and memory management techniques. In the realm of parallel computing , he investigates multicore systems, GPU computing, and thread-level speculation to enhance computational efficiency. His research in AI and machine learning addresses energy efficiency, data stream mining, and practical applications in areas like district heating systems and airborne networks. The integration of image processing with machine learning forms another significant strand of his work, particularly in historical document analysis and medical imaging applications. These research areas converge in his leadership of major initiatives like BigData@BTH and GPAI, where he bridges theoretical advances with real-world implementation challenges. Analysis of Håkan's recent publications reveals a clear trajectory toward increasingly applied research with strong industry connections. While maintaining foundational work in computer architecture, his output increasingly focuses on practical AI applications, energy efficiency in computing, and domain-specific implementations in sectors like telecommunications, energy systems, and defense. The interdisciplinary nature of his work is evident in collaborations spanning computer science, engineering, and domain-specific applications, with a growing emphasis on sustainability and resource optimization in computing systems. Håkan has successfully supervised numerous doctoral students, with ten graduates and six current Ph.D. candidates. His research has been supported by substantial funding from: The Knowledge Foundation (BigData@BTH, HINTS, Green Clouds) ELLIIT (GPAI project) Vinnova (FANET-MCA, Directed COM & EW) Industry partners including Ericsson, Saab, Telenor, and Fortnox He is actively involved in multiple research groups including DISL (Distributed and Intelligent Systems Lab), CCS-Lab (Communication and Computer Systems Research Lab), and previously PAARTS (Parallel Architectures and Applications for Real-Time Systems). His leadership extends to organizing academic events like the Nordic workshop on Multi-Core Computing and the Swedish Artificial Intelligence Society workshop.
Oyekunle Olukotun is a Professor at Stanford University, internationally recognized for transformative contributions to computer architecture and parallel systems. His pioneering work established foundational principles for modern processor design that bridge academic research and industrial implementation. His research centers on parallel computing systems with emphasis on multicore and multithreaded processor architectures. Key innovations include chip multiprocessor (CMP) technology that became the industry standard for modern CPUs, fine-grained multithreading techniques for CPU efficiency optimization, and the Transactional Coherence and Consistency (TCC) framework for simplifying parallel programming. These contributions address critical challenges in performance scaling and energy efficiency for contemporary computing systems. Olukotun's publications reveal a consistent focus on hardware-software co-design for parallel systems, with significant impact across computer architecture and high-performance computing domains. His work demonstrates evolutionary progression from theoretical frameworks to industry adoption, particularly in server processor design. Scientific awards include: ACM-IEEE CS Eckert-Mauchly Award (2023) for contributions to parallel systems development ACM Fellow (2006) for multiprocessor and multithreaded processor design ASPLOS Most Influential Paper Award (2011) for the 1996 landmark paper ISCA Most Influential Paper Award (2019) for the 2004 transactional memory paper While the provided text lacks specific details about student advising or grant funding, Olukotun's entrepreneurial impact is evident through Afara WebSystems, which advanced server technology prior to its acquisition by Sun Microsystems. His research directly enabled Oracle's Niagara chip family used in SPARC-based servers. Industrial collaboration represents a critical dimension of his work, with designs transitioning from academic concepts to commercial implementations that shaped server processor evolution. The TCC framework co-developed with Christos Kozyrakis remains influential in parallel programming research.
Sarita Adve is the Richard T. Cheng Professor in the Department of Computer Science at the University of Illinois at Urbana-Champaign, recognized for transformative contributions to memory consistency models and leadership in computing communities. Her research spans the hardware/software interface with core expertise in memory models for programming languages (C++/Java), cache coherence, hardware reliability, and power management. Current work focuses on scalable system specialization and resiliency, including groundbreaking DRFrlx semantics for relaxed atomics in heterogeneous systems. She challenges conventional wisdom by demonstrating data-race-free models' superiority across diverse computing environments. Adve's major awards include: ACM-IEEE CS Ken Kennedy Award (2018) for memory model leadership and exceptional mentoring ACM Fellow (2010) for contributions to hardware/language memory models and resilient systems IEEE Fellow (2012) and Anita Borg Institute Woman of Vision award SIGARCH Maurice Wilkes Award (2008) She provides exceptional mentorship with three of her PhD students' theses nominated for the ACM Doctoral Dissertation Award within five years. As SIGARCH chair, she revolutionized community engagement through CARES (harassment support initiative), diversity programs, and DARPA ISAT participation, while previously serving on NSF CISE and Computing Research Association boards.
Susan Eggers is a Professor at the University of Washington's Paul G. Allen School of Computer Science & Engineering, renowned as one of the field's leading computer architects and the first woman to receive the Eckert-Mauchly Award in its 39-year history. Her educational journey includes: BA in Economics (1965) PhD from University of California, Berkeley, Department of Electrical Engineering and Computer Sciences (1989) Professor Eggers' research revolutionized computer architecture through foundational work in simultaneous multithreaded (SMT) processor design and cache coherency protocols . Her mid-1990s research demonstrated how SMT converts thread-level parallelism into instruction-level parallelism, enabling significant CPU performance gains that circumvented Moore's Law limitations. This work directly enabled commercial implementations by Intel (Hyper-Threading) and IBM, with technology transfer to Fujitsu, MemoryLogix, and Sun Microsystems. Her major honors include: ACM-IEEE CS Eckert-Mauchly Award (2018) for contributions to SMT architectures and multiprocessor coherency ACM Athena Lecturer Award (2009) ACM Fellowship (2002) for multithreaded processor and compiler technology research Eggers began her faculty career at age 47 after 18 years in economics-related fields, publishing landmark papers at ISCA conferences (1995-2003) that established SMT as essential to modern processor design. Her early work included the first data-driven study of data sharing in shared-memory multiprocessors, resolving critical cache coherency challenges where multiple processor caches maintain data uniformity.
