Susan Eggers

Susan Eggers is a Professor at the University of Washington's Paul G. Allen School of Computer Science & Engineering, renowned as one of the field's leading computer architects and the first woman to receive the Eckert-Mauchly Award in its 39-year history.

Her educational journey includes:

• BA in Economics (1965)
• PhD from University of California, Berkeley, Department of Electrical Engineering and Computer Sciences (1989)

Professor Eggers' research revolutionized computer architecture through foundational work in simultaneous multithreaded (SMT) processor design and cache coherency protocols. Her mid-1990s research demonstrated how SMT converts thread-level parallelism into instruction-level parallelism, enabling significant CPU performance gains that circumvented Moore's Law limitations. This work directly enabled commercial implementations by Intel (Hyper-Threading) and IBM, with technology transfer to Fujitsu, MemoryLogix, and Sun Microsystems.

Her major honors include:

• ACM-IEEE CS Eckert-Mauchly Award (2018) for contributions to SMT architectures and multiprocessor coherency
• ACM Athena Lecturer Award (2009)
• ACM Fellowship (2002) for multithreaded processor and compiler technology research

Eggers began her faculty career at age 47 after 18 years in economics-related fields, publishing landmark papers at ISCA conferences (1995-2003) that established SMT as essential to modern processor design. Her early work included the first data-driven study of data sharing in shared-memory multiprocessors, resolving critical cache coherency challenges where multiple processor caches maintain data uniformity.