Dan Hammerstrom is a Professor in the Electrical and Computer Engineering Department at Portland State University with a joint appointment at Halmstad University's IDE Department in Sweden. A Life Fellow of the IEEE, he has served as Editor for IEEE Transactions on Nanotechnology and Associate Editor for IEEE Transactions on Neural Networks, Journal of the International Neural Network Society, and related publications. His research spans neural networks, nanotechnology, and computer architecture with foundational work in VLSI design for neural networks, pattern recognition, and image processing. Recent contributions focus on memristive computing and Bayesian inference architectures, emphasizing energy efficiency and scalability in neuromorphic systems. Publication trends reveal progression from 1990s-era neural network hardware and image processing algorithms toward contemporary nanoelectronics and memristive systems. Key thematic threads include brain-inspired computing paradigms and hardware-software co-design for cognitive tasks. His scientific recognition includes: IEEE Life Fellow No information is available regarding student advising or grant funding in the provided text. Similarly, specific laboratory structures or research teams are not described beyond institutional affiliations.










