جست‌وجوی استاد و پژوهشگر

• Fault-Tolerant Distributed Algorithms
• Digital Integrated Circuits
• Topology
• +۷ مورد دیگر

Ulrich Schmid is a Full Professor and Head of the Research Unit for Embedded Computing Systems at TU Wien. He holds a position in the Faculty of Informatics and leads the department of Embedded Computing Systems (E191-02). His roles include Curriculum Coordinator for the Bachelor and Master programs in Computer Engineering, as well as the Excellence Program Bachelor with Honors. He is also the Chair of the Curriculum Commission for Computer Engineering and a Substitute Member of the Informatics Commission. His research focuses on fault-tolerant distributed algorithms, digital integrated circuits, and topology-based approaches to distributed systems. He coordinates major projects such as the FWF-funded DMAC (2019–2024) and ByzDEL (2020–2025), which integrate topological semantics and hybrid delay models for robust hardware design and distributed system analysis. Schmid has contributed to groundbreaking work in Byzantine fault tolerance, epistemic logic for system recovery, and real-time scheduling through collaborations with researchers like Chatterjee, Függer, and Rajsbaum. Notable awards include the 2018 Edsger W. Dijkstra Prize and the 2021 Principles of Distributed Computing Doctoral Dissertation Award. His research also bridges formal verification techniques with physical hardware implementations, exemplified by projects like HEX (a Byzantine-tolerant clock distribution system) and the Involution tool for timing analysis. Schmid actively contributes to academic governance, advancing rigorous education and research standards in computer engineering. His advising and grant work involve mentoring on fault-tolerant architectures and securing funding from agencies like FWF and the European Commission. Labs and teams under his leadership include the Embedded Computing Systems group, specializing in hardware-software co-design for dependable systems-on-chip, and collaborations with institutions like GSI Helmholtzzentrum and the University of Amsterdam.

• Distributed Systems
• Fault-Tolerant Computing
• Asynchronous Algorithms
• +۳ مورد دیگر

Prof. Ulrich Schmid is a full professor at TU Wien, affiliated with the Forschungsbereich Embedded Computing Systems. His research focuses on distributed systems, fault-tolerant computing, and asynchronous algorithms. He leads projects like 'Asynchronous Distributed Algorithms in the Theta-Model' and 'Gracefully Degrading Agreement in Directed Dynamic Networks.' Prof. Schmid has received honors at TU Wien and actively supervises numerous students in PhD and Master's programs. His academic work spans theoretical foundations (e.g., epistemic logic in Byzantine systems) and practical applications (e.g., digital circuit delay modeling). Key contributions include hybrid delay models for integrated circuits and formal verification frameworks for timed circuits. Collaborations involve institutions like the Institut für Technische Informatik and the E191-02 research group. Notable research areas: Byzantine fault tolerance, consensus protocols, and embedded systems Leadership in 4 major projects addressing distributed computing challenges Recipient of TU Wien honors (2021) Prof. Schmid's lab emphasizes bridging theoretical computer science with hardware-software co-design, producing over 220 publications and 10+ supervised theses since 2000.

• Hardware Acceleration
• High-Level Synthesis
• Asynchronous Circuit Design
• +۲ مورد دیگر

Sebastian Michael Wiedemann is a PreDoc Researcher at the Vienna University of Technology, affiliated with the Embedded Computing Systems group. His research focuses on hardware acceleration, asynchronous circuit design, and software-hardware integration techniques. He holds a Diplom-Ingenieur (Dipl.-Ing.) degree and a BSc in Electrical Engineering. His recent work includes publications at the Austrochip Workshop on Microelectronics and a diploma thesis on high-level synthesis tools for asynchronous circuits. His research interests span hardware modeling, GPU computing, and FPGA optimization. Publications highlight advancements in vendor-agnostic preemption mechanisms and asynchronous circuit synthesis methodologies. As a PreDoc Researcher, he contributes to academic projects and teaches courses such as Hardware Modeling and HW/SW Codesign .

• Computer Engineering
• Fault-Tolerant Computing
• Asynchronous Logic
• +۷ مورد دیگر

Andreas Steininger is an Associate Professor in the Department of Embedded Computing Systems at TU Wien. His primary research focuses on fault-tolerant computing, asynchronous logic, and dependable systems. He leads the Embedded Computing Systems group and serves as Director of the Curriculum Commission for Computer Engineering. His work emphasizes resilient hardware architectures, radiation effects in microelectronics, and timing domain interfacing. He has contributed to numerous projects with industry partners like Intel and TTTech Auto AG, addressing challenges in trustworthy autonomous systems and robust distributed algorithms. Key research interests include asynchronous circuits, clockless processors, and error detection mechanisms. He has over 50 publications in top-tier conferences and journals, including IEEE Transactions and ASYNC. Notable contributions include methodologies for mitigating single-event transients in QDI logic and fault-tolerant clock generation schemes. He teaches advanced courses in digital design, computer engineering, and scientific research methods. His projects span radiation-hardened ASIC design, metastability analysis in FPGAs, and secure IoT architectures. He actively collaborates with automotive and aerospace industries to develop solutions for embedded systems reliability. Recent work explores fault resilience in neural networks and energy-efficient asynchronous microprocessors.

• Asynchronous Logic
• Real-Time Systems
• VLSI Design
• +۳ مورد دیگر

Markus Ferringer is a Lecturer in the Department of Computer Engineering at Vienna University of Technology. He specializes in asynchronous logic, real-time systems, and fault-tolerant hardware design, with a focus on VLSI implementation and distributed systems. Research Interests: His work explores the integration of asynchronous circuits into real-time systems, emphasizing fault tolerance and reliability. Key areas include self-timed logic, time-triggered protocols, and distributed clock generation. Publications: Markus has published extensively on asynchronous hardware design, interfacing techniques, and process variation impacts. His research spans conferences and workshops such as DSN-W, DDECS, EUROCON, and Austrochip. Projects: He contributed to the ARTS project (2007–2011) supported by the Austrian Research Promotion Agency (FFG) and the THETA project (2004–2008).

Esparza Javierمشاهده پروفایل

استاد

• Algorithms and tools for the design and verification of reactive and distributed systems
• Verification of systems with infinitely many states
• Software Model Checking
• +۷ مورد دیگر

Javier Esparza is a Professor at the Technische Universität München, holding the Chair of Foundations of Software Reliability and Theoretical Computer Science since 2007. Prior to this, he held chairs at the University of Stuttgart (2003-2007) and the University of Edinburgh (2001-2003), along with academic positions dating back to 1990. Education: M.S. in Theoretical Physics (1987, University of Zaragoza), Ph.D. in Computer Science (1990, University of Zaragoza), and Habilitation in Computer Science (1994, University of Hildesheim). His research focuses on formal verification, distributed systems, and software reliability, particularly through algorithms for software model checking, logic and automata theory, and analysis of probabilistic systems. His work has been supported by numerous grants from the German Research Council (DFG), British Engineering and Physical Sciences Research Council (EPSRC), and the Humboldt Foundation. Scientific Awards: Doctor honoris causa from Masaryk University (2009), TeachInf Awards for best Bachelor and Master courses (2009, 2010), TU München Diploma for excellent teaching (2011), Member of Academia Europaea (2011), and Dissertation Prize from the University of Zaragoza (1990). Esparza has supervised over 15 PhD students, including Dr. Stefan Schwoon, Dr. Claus Schröter, and Dr. Michael Luttenberger, and collaborated on research projects with institutions across Europe and the UK.

Matthias Függerمشاهده پروفایل

استاد

• Computer Architecture
• Embedded Systems
• Digital Circuits
• +۳ مورد دیگر

Matthias Függer is a Professor at the Department of Technical Computer Science within TU Wien's Institute for Technical Informatics. His research focuses on digital circuit design, fault-tolerant systems, and distributed computing. He has contributed to advancements in metastability containment, clock synchronization, and consensus algorithms in dynamic networks. His work bridges theoretical computer science with practical applications in embedded systems and VLSI design. Education details are not explicitly provided, but his academic role suggests a doctoral background. Notable projects include the development of the Involution Tool for timing analysis and collaboration on resilient circuit models under adversarial conditions. His research has been published in prestigious conferences and journals, emphasizing interdisciplinary approaches to solving challenges in asynchronous systems and fault tolerance. Labs/Teams: Network Lab at TU Wien. Advising: Advised Markus Hofstätter on his thesis involving FPGA-based Byzantine fault tolerance.

Jordi Cortadellaمشاهده پروفایل

استاد

• Electronic Design Automation (EDA)
• Concurrency Theory
• Asynchronous Circuits
• +۶ مورد دیگر

Jordi Cortadella is a Full Professor in the Department of Software at the Universitat Politècnica de Catalunya (UPC), Spain. His academic journey spans decades, with a Ph.D. in Computer Science from UPC (1987) and visiting roles at institutions like UC Berkeley and Intel Corporation. A Fellow of the IEEE (2015) and member of Academia Europaea (2013), he specializes in formal methods, concurrency theory, and asynchronous circuit design. His work bridges theoretical and applied research in EDA tools and VLSI systems. Education M.S. in Computer Science, UPC (1985) Ph.D. in Computer Science, UPC (1987) Research Interests : Cortadella's research focuses on algorithms for electronic design automation, asynchronous circuits, and formal methods. Recent publications explore Petri net decomposition, dataflow circuit verification, and ethical frameworks for research governance. His work impacts both theoretical concurrency models and practical applications like FPGA optimization and energy-efficient design. Scientific Awards : Fellow of the IEEE (2015) Member of Academia Europaea (2013) Distinction for University Research Promotion (Catalan Government, 2003) Descartes Prize Finalist (2002) Best Ph.D. Thesis at UPC (1992) National Award for Best Computer Science Student (1986)

• Fault-Tolerant Computing
• Asynchronous Circuits
• Digital System Design
• +۳ مورد دیگر

Florian Ferdinand Huemer is a PostDoc Researcher at the Embedded Computing Systems department (E191-02 Faculty Council Substitute Member) within the Faculty of Informatics at Vienna University of Technology. His work focuses on fault-tolerant asynchronous circuits, delay-insensitive communication protocols, and FPGA reliability analysis. BSc , Vienna University of Technology Dipl.-Ing. , Vienna University of Technology Dr.techn. , Vienna University of Technology Key research areas include: Fault-Tolerant Computing : Designing systems resilient to transient faults and radiation effects. Asynchronous Circuits : Developing quasi-delay-insensitive logic and Muller pipelines. Embedded Metrology : Applying polarization cameras and time-to-digital converters for industrial measurements. Recent publications address: 2024 : Polarization camera-based inline thickness measurement and FPGA ring oscillator synchronization. 2023 : Mitigating single-event transients in QDI logic. 2021 : Automated fault-injection frameworks and QDI pipeline sensitivity analysis. Projects funded by the Austrian Science Fund (FWF) during 2013-2018 explored self-stabilizing Byzantine fault-tolerant algorithms. Supervisions include: Haschke (2024): QDI adder comparison Spitzer (2024): Automated fault-injection framework Schwendinger (2022): Asynchronous circuit testing tools Pircher (2022): Smart SoC testing via IJTAG Behal (2021): QDI design template fault sensitivity

• Fault-Tolerant Computing
• Digital Circuit Design
• Embedded Systems
• +۳ مورد دیگر

Jakob Lechner is an External Lecturer in the Computer Engineering department at Vienna University of Technology. His work focuses on fault-tolerant digital circuit design, asynchronous systems, and robust hardware architectures. Education : PhD in Computer Engineering (2014), Diploma in Computer Engineering (2008) Research interests include: Fault-tolerant computing Asynchronous circuit design Transient error mitigation in FPGAs Triple Modular Redundancy (TMR) Metastability containment Single Event Transients (SET) resilience His publications (2006–2018) emphasize fault injection techniques, robust GALS circuits, and asynchronous communication protocols. Key projects include Intel CARS (2017–2019) on delay-insensitive codes. Supervision : Guided K. D. Pados' thesis on AXI4 bus systems (2013).