Dr. Chengmo Yang is a Professor in the Department of Electrical and Computer Engineering at the University of Delaware, with a joint appointment. She received her PhD and MSc in Computer Science from the University of California, San Diego, and a BSc in Microelectronics from Peking University, China. PhD, University of California, San Diego MSc, University of California, San Diego BSc, Peking University, China Her research focuses on enhancing security, reliability, non-volatility, and energy efficiency in embedded systems, cyber-physical systems (CPS), and Internet-of-Things (IoT). She leads the Computer Architecture, Reliability, and Security (CARES) group and has authored over 70 peer-reviewed publications. Recent publications emphasize neural network accelerators, non-volatile memory (NVM) optimization, and security frameworks for embedded systems. Her work explores fault tolerance, wear leveling, and side-channel attack mitigation in NVM-based FPGAs, STT-RAM, and SSDs. National Science Foundation Career Award (2013) University of Delaware Mid-Career Faculty Excellence in Scholarship Award (2020) Best paper award at ICESS (2019) Three best paper nominations at DAC, DATE, and GLSVLSI (2019) Dr. Yang serves as Associate Editor for IEEE TCAD and ACM TODAES. She is the Diversity & Inclusion Representative for IEEE CEDA and has organized numerous conferences including Technical Program Chair for CODES-ISSS 2022. Her lab has hosted current and former students like Fanruo Meng (PhD candidate), Fateme Hosseini (Qualcomm), and Patrick Cronin (Intel), focusing on graduate-level research in hardware security and reliability.
Tianqi Chen is an Assistant Professor at the Machine Learning Department and Computer Science Department of Carnegie Mellon University (CMU), with a courtesy appointment as a Professor in the Electrical and Computer Engineering Department within the College of Engineering. His research focuses on scalable machine learning systems, compiler optimization, and efficient deep learning frameworks. He holds a PhD from the Paul G. Allen School of Computer Science & Engineering at the University of Washington. Key contributions include the creation of XGBoost, Apache TVM, and MLC-LLM—widely adopted systems for machine learning and large language models. His work bridges algorithmic innovation with high-performance computing, emphasizing efficient deployment, quantization, and edge computing. Recent publications highlight advancements in LLM serving (e.g., WebLLM, Flashinfer), compiler-driven optimizations (e.g., TVM, Relax), and low-latency inference techniques (e.g., Magicdec, Tilus). These efforts address scalability, energy efficiency, and cross-platform compatibility in modern AI systems. Chen’s research has been applied to diverse domains, including music AI, browser-based inference, and microservice architectures for LLMs. His work underscores the importance of system-level thinking in advancing AI capabilities.
Brandon M. Lucia is the Kavčić-Moura Professor of Electrical and Computer Engineering at Carnegie Mellon University and CEO/co-founder of Efficient Computer Company. He leads the Abstract research group and focuses his work on the intersection of computer architecture, systems, and programming languages. Education: Ph.D. in Computer Science and Engineering, University of Washington (2013) — advised by Luis Ceze Research Focus: Brandon's research is broadly centered on intermittent computing , edge computing , and energy-efficient architectures . Two major thrusts define his current work: Intermittent Computing: Making battery-free, energy-harvesting devices programmable and reliable despite frequent power failures. Applications include medical implants, space systems, and large-scale sensing. Orbital Edge Computing: Designing nanosatellite constellations that perform on-orbit data processing, enabling low-latency, high-resolution sensing in space-constrained environments. Scientific Awards: NSF CAREER Award (2017) IEEE TCCA Young Computer Architect Award (2019) Sloan Foundation Fellowship (2021) ASPLOS 2020 Best Paper Award OOPSLA 2015 Distinguished Paper & Artifact Awards IEEE Micro Top Picks (2016, 2018 Honorable Mention) Advising & Grants: Brandon actively advises a strong cohort of Ph.D. students including Zhuo Cheng, Bradley Denby, Souradip Ghosh, Harsh Desai, Kiwan Maeng, Emily Ruppel, and others. His group is funded by the NSF (CAREER and SHF grants), the Sloan Foundation, and industry partnerships. Labs & Teams: He directs the Abstract research group at CMU ECE, which hosts interdisciplinary projects spanning hardware design, compiler construction, and system software for ultra-low-power and space-borne computing platforms.
Michael Carbin is the Jamieson Career Development Assistant Professor of Electrical Engineering and Computer Science at the Massachusetts Institute of Technology (MIT) and leads the MIT Programming Systems Group. His research focuses on programming systems that address system uncertainty to enhance performance, energy efficiency, and resilience, particularly in environments involving neural networks , approximate computing , and unreliable hardware . His work spans probabilistic programming , quantum computing , and machine learning systems . Articles highlight contributions in pruning neural networks , quantum data structures , and compiler optimization , reflecting trends in deep learning , formal verification , and language-driven systems . Scientific Awards : MIT Frank E. Perkins Award (2020) Sloan Research Fellowship (2020) Facebook Research Award (2019) NSF CAREER Award (2018) Best Paper Awards at OOPSLA (2013, 2014) He has advised numerous graduate students and postdocs including Eric Atkinson, Cambridge Yang, and Charles Yuan, and served on program committees for conferences like POPL, OOPSLA, and ICLR. His group collaborates with institutions such as MIT CSAIL and explores applications in quantum algorithms and probabilistic inference .
Greg Durrett is an Associate Professor in the Department of Computer Science at University of Texas at Austin, leading the TAUR Lab (Text Analysis, Understanding, and Reasoning ). His research focuses on advancing Large Language Models (LLMs) for knowledge-intensive tasks in medical information processing scientific discovery legal reasoning . He received his B.S. in Computer Science and Mathematics from MIT (2010) and Ph.D. in Computer Science from UC Berkeley (2016). His work develops techniques to train LLMs with new capabilities augment models for reliability assess model outputs improve reasoning frameworks . His 15 most recent publications (2021-2025) span knowledge propagation in LLMs chain-of-thought reasoning code generation benchmarks multi-modal reasoning fact verification discourse analysis . Scientific honors include NSF CAREER Award (2024) NSF grants (2018, 2024) Bloomberg Data Science Grant (2017) Facebook Fellowship (2014) Best Paper Finalist (EMNLP 2013) . Teaching: CS388: Natural Language Processing (graduate) CS371N: NLP (undergraduate) High school NLP module .
Hyesoon Kim is a Professor at the Georgia Institute of Technology , affiliated with the College of Computing and leading the HPArch research group . She co-directs the Center for Research into Novel Computing Hierarchies (CRNCH) . Her research focuses on Computer Architecture , GPU , Compilers and Runtime Systems , and Hardware Security , particularly for heterogeneous systems. Contact : hyesoon@cc.gatech.edu Location : 266 Ferst Drive, KACB 2344, Atlanta, GA Research Trends Her recent work spans RISC-V extensions for security, CUDA optimization on softcore GPUs, memory safety techniques, and energy-efficient deep learning architectures. Articles emphasize heterogeneous computing , GPU performance scaling, and IoT -oriented neural network methods. Open Source Projects She leads development of Macsim (heterogeneous architecture simulator) and Vortex (open-source GPU platform).
Priyanka Raina is an Assistant Professor of Electrical Engineering at Stanford University, with a courtesy appointment in Computer Science. She leads the Stanford Accelerate research group, focusing on domain-specific hardware architectures and agile hardware-software co-design. Her work emphasizes high-performance, energy-efficient accelerators for emerging technologies. Education: B.Tech. from IIT Delhi (2011), M.S. and Ph.D. from MIT (2013/2018). Postdoctoral experience includes NVIDIA Research (2018) and Amazon Visiting Academic (2023–present). Awards include the Sloan Research Fellowship (2024), NSF CAREER Award (2023), and Terman Faculty Fellowship (2018). Research Interests: Domain-specific architectures, near-memory computing, design productivity, and machine learning acceleration. Her group develops frameworks like AHA (Agile Hardware) for efficient accelerator design and compilers. Awards: Over 10 major awards, including best paper recognitions at VLSI, MICRO, and JSSC. Active roles as Associate Editor for IEEE JSSC and Program Chair for IEEE Hot Chips (2020). Advising & Teaching: Supervises multiple PhD and MS students in hardware design, CGRAs, and ML accelerators. Teaches VLSI design courses (EE271/272/372) and oversees independent studies in embedded systems and chip design. Labs & Collaborations: Affiliated with Stanford PORTAL Center, AHA Center, and SystemX Alliance. Projects include MINOTAUR (edge AI accelerator), Amber (CGRA-based SoC), and EMBER (RRAM macros).
Benjamin Carrison-Schafer is an Associate Professor and Assistant Dean for Graduate Student Success at the Department of Electrical and Computer Engineering, Erik Jonsson School of Engineering and Computer Science, University of Texas at Dallas. He leads the Design Automation and Reconfigurable Computing Laboratory (DARClab), focusing on systems, high-level design, and programming methodologies for VLSI computing systems and FPGAs. Education: MBA from McGill University, Canada (2012) PhD in Electrical and Electronic Engineering from University of Birmingham, UK (2003) Research Interests: His work spans modeling, analysis, synthesis, optimization, and implementation of VLSI systems. Current projects include: Approximate Computing, High-Level Synthesis Design Space Exploration, Hardware Security, Behavioral MPSoC Optimization, and Automatic Fault-Tolerant System Generation. His research blends theory and practice, using analytical and experimental techniques to solve real-world problems. Publication Trends: Recent publications demonstrate strong focus on hardware security, FPGA optimization, and automated design methodologies. Key themes include High-Level Synthesis innovations, hardware acceleration techniques, and cross-disciplinary applications of reconfigurable computing. His work frequently addresses challenges in hardware trustworthiness, energy efficiency, and design automation scalability. Professional Activities: Associate Editor: IEEE Transactions on Sustainable Computing (2022-present) Conference Chair: ICCD 2024, DCAS 2024 Program Committee: ASP-DAC, DATE, FCCM, GLSVLSI Advising & Labs: Supervises multiple PhD and Master's students at DARClab. Current research includes domain-specific architecture design, hardware security, sustainable computing, and ML for VLSI design. The lab collaborates with industry partners like Renesas Electronics and develops commercial tools through spin-off company highX Technologies.
Xupeng Miao is a Visiting Assistant Professor in the Department of Computer Science at Purdue University, holding the Kevin C. and Suzanne L. Kahn New Frontiers Assistant Professorship. Previously, he was a Postdoctoral Fellow at Carnegie Mellon University's Catalyst Group under Professors Zhihao Jia and Tianqi Chen. He earned his Ph.D. in Computer Science from Peking University (2022) and a Bachelor’s degree from Northeastern University. His research focuses on machine learning systems, distributed computing, and data management, with notable contributions to systems like Hetu (a distributed deep learning framework) and innovations in large language model (LLM) serving (e.g., SpotServe, SpecInfer). He has received awards including the 2024 WAIC Yunfan Award and an Outstanding Paper Award at ACL 2024. Current projects emphasize efficient systems for generative AI, including optimizing LLM training and inference on heterogeneous hardware, fault-tolerant distributed training, and scalable graph-based machine learning. He teaches CS 59200-MLS: Machine Learning Systems at Purdue and actively mentors students in PhD/MS programs and internships. Key achievements include NVIDIA Academic Awards, IEEE Micro Top Picks recognition, and leadership in international conference roles (e.g., Artifact Evaluation Co-Chair for KDD 2025 and MLSys 2025). His work bridges system design, algorithmic innovation, and hardware-aware optimizations to advance scalable AI infrastructure.
Dr. Arkaprava Basu is an Associate Professor at the Indian Institute of Science (IISc), Bangalore. He received the ACM India Early Career Researcher (ECR) Award 2024 for his innovative contributions to efficient memory management in GPUs and CPUs through cross-stack software-hardware research. Affiliation: Indian Institute of Science (2018–present) Prior Roles: Full-time Research Staff at AMD Research (Austin, USA, 2014–2018) Education: PhD in Computer Science from University of Wisconsin-Madison (2013) His research focuses on optimizing AI hardware systems by integrating compiler, runtime, and OS design with hardware architecture. Collaborations include long-term consultancy with tech giants, emphasizing practical implementations of his theoretical work. Recognitions: ACM India ECR Award (2024) for "creative and impactful contributions toward efficient memory management for GPUs and CPUs"
Nate Foster is a Professor of Computer Science at Cornell University and currently serves as the Associate Dean for Research in the Ann S. Bowers College of Computing and Information Science. He is also a Visiting Researcher at Jane Street and served as a Visiting Professor at École Polytechnique Fédérale de Lausanne during the 2023-24 academic year. His research uses ideas from programming languages to solve problems in networking, databases, and security. BA in Computer Science, Williams College (2001) MPhil in History and Philosophy of Science, University of Cambridge (2008, all work completed in 2003) PhD in Computer and Information Science, University of Pennsylvania (2009) Foster's research focuses on developing languages and tools that make it easy for programmers to build secure and reliable systems. His current work centers on the design and implementation of languages and tools for programmable networks, particularly using the P4 language. His past work includes bidirectional languages (also known as 'lenses'), database query languages, data provenance, type systems, mechanized proof, and formal semantics. His research group at Cornell has made significant contributions to network verification, software-defined networking, and formal foundations for programmable data planes. Analysis of Foster's recent publications reveals a strong focus on network verification and programming language foundations for networking. His work consistently applies formal methods to practical networking problems, with a particular emphasis on the NetKAT and P4 languages. Over the past five years, his research has evolved toward more complex network verification techniques, including infinite state verification, active learning of network models, and dependently-typed approaches to network programming. His work bridges theoretical computer science with practical networking systems, making formal methods accessible to network engineers. ACM Fellow (2025) ACM SIGPLAN Robin Milner Award (2023) ACM SIGCOMM Rising Star Award (2018) NSF CAREER Award (2013) Alfred P. Sloan Fellowship (2012) Multiple distinguished paper awards across top conferences including POPL, PLDI, and SIGCOMM Foster has advised numerous PhD and Master's students who have gone on to prominent positions in both industry and academia, with many continuing work in programming languages and networking. He has led multiple significant research grants including an NSF CAREER Award and has been involved in the P4 Language Consortium, serving as Chair of the P4 Language Governing Board. His work has been supported by various organizations including NSF, DARPA, and industry partners like Intel and Jane Street. Foster is also active in the programming languages research community, serving on numerous program committees and as Vice Chair of DARPA's Information Science and Technology (ISAT) study group. Foster leads a vibrant research group at Cornell focused on programming languages for networks, with collaborators from academia and industry. His group has developed several influential tools and frameworks including NetKAT, Petr4, and KATch. They maintain strong connections with the P4 community and work closely with industry partners to ensure their research has practical impact on real-world networking systems.
Michael O'Boyle is a Professor at the University of Edinburgh's School of Informatics, where he serves as Director of the ARM Research Centre of Excellence and the EPSRC Centre for Doctoral Training in Pervasive Parallelism. Holding an EPSRC Established Career Research Fellowship, he leads pioneering work in compiler technology for heterogeneous architectures, bridging theoretical advances with practical high-performance computing applications. Professor O'Boyle's research spans multiple cutting-edge areas including heterogeneous code discovery and optimization, neural machine translation for program synthesis, deep neural network system stack optimization, software-defined hardware, and compiler/architecture co-design. His approach integrates constraint analysis, program synthesis, and machine learning to address complex challenges in high-performance computing across diverse hardware platforms. His recent publications reveal a strong trend toward integrating machine learning with traditional compiler techniques, particularly in neural program synthesis, tensor optimization, and architecture-aware compilation. This work represents a paradigm shift in compiler design, moving from rule-based systems to learning-based approaches that can automatically adapt to diverse hardware targets. IEEE/ACM CGO 2025 Distinguished Paper Award for 'Tensorize: Fast Synthesis of Tensor Programs from Legacy Code' IEEE/ACM CGO 2024 Test of Time Award ACM GPCE 2023 Best Paper Award for 'C2TACO: Lifting Tensor Code to TACOM' ACM ASPLOS 2021 Distinguished Paper Award IEEE HPCA 2021 Best Paper Award for 'Prodigy: Improving the Memory Latency of Data-Indirect Irregular Workloads' Professor O'Boyle has successfully mentored numerous PhD students who have secured prominent positions in academia (including at Cambridge, Edinburgh, Leeds, and McGill) and industry (including Meta, NVIDIA, Qualcomm, Huawei, and Microsoft). His research is supported by significant funding from EPSRC, ARM, and European projects including Bonseyes and Transmuter, demonstrating strong international recognition and industry impact. He leads the influential Compiler and Architecture Design (CArD) Group at the University of Edinburgh and is a founder of the HiPEAC Network of Excellence, which has grown into a major European initiative connecting researchers and practitioners in high-performance and embedded computing.
Jian Huang is an Associate Professor of Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign (UIUC), holding a 100% appointment since August 2024. He is also an affiliated Associate Professor in Computer Science and serves as the Y. T. Lo Faculty Fellow in ECE. Huang leads the Systems Platform Research Group and received his Ph.D. in Computer Science from Georgia Institute of Technology in August 2017, where his dissertation earned the College of Computing Dissertation Award. His research focuses on Computer Architecture, Memory and Storage Systems, AI Infrastructure, Distributed Systems, and Systems Security . Huang has pioneered work in sustainable AI infrastructures, modular data centers, neural processing unit virtualization, and ransomware-aware storage systems. His research has been featured in top-tier conferences including ISCA, MICRO, ASPLOS, OSDI, SOSP, and USENIX ATC, with over 50 publications and multiple patents issued worldwide. Huang's research has significant industry impact, with some work transferred into products and featured in popular media outlets including ACM CACM, TechXplore, and Science Daily. His work on non-volatile memory and storage systems has received extensive coverage, with some projects generating over 50 media reports. Among his notable achievements are the ACM SIGMICRO Early Career Award, NSF CAREER Award, IEEE Micro Top Picks (three times), USENIX Best Paper Award, and the MICRO Best Paper Runner Up in 2024. He has secured over $4.01M in grants ($11.12M with collaborators) from NSF, DARPA, Army Research Office, and industry partners. ACM SIGMICRO Early Career Award NSF CAREER Award IEEE Micro Top Picks (three times) USENIX Best Paper Award MICRO Best Paper Runner Up (2024) Google Faculty Research Award NetApp Faculty Fellowship Award Huang actively contributes to the academic community as program co-chair of NVMW'23 and organizer of HotInfra'23. He currently advises 12 Ph.D. students, 1 master student, and multiple undergraduates. His teaching innovations include developing ECE522: Emerging Memory/Storage System and revising ECE511: Computer Architecture with cutting-edge content.
Andrew Childs is a Professor at the University of Maryland, affiliated with the Department of Computer Science and the Institute for Advanced Computer Studies (UMIACS). He serves as Director of the NSF Quantum Leap Challenge Institute for Robust Quantum Simulation (RQS) and is a Fellow at the Joint Center for Quantum Information and Computer Science (QuICS). His research focuses on quantum algorithms for simulating physical systems, algebraic problems, and quantum walk protocols, with applications in quantum computing and computational complexity. University of Maryland Institute for Advanced Computer Studies (UMIACS) Joint Center for Quantum Information and Computer Science (QuICS) NSF Quantum Leap Challenge Institute for Robust Quantum Simulation Childs' research spans quantum simulation, quantum Fourier transform, phase estimation, and Hamiltonian dynamics. He has developed techniques to reduce quantum computational resources for simulating quantum systems and explored limitations of quantum computers through hidden subgroup problems and non-unitary dynamics. His publications cover diverse areas including quantum walk optimization, Hamiltonian simulation methods, and applications to cryptography and condensed matter physics. Recent works address spatial search algorithms, product formulas for commutators, and quantum routing protocols. As an educator, Childs has taught courses on quantum algorithms and information processing at both the University of Maryland and University of Waterloo, with lecture notes and materials spanning multiple years. Contact: amchilds@umd.edu | Office: ATL 3359 | Affiliated with University of Maryland's quantum research institutes.
Dr. Liang Cheng is the Department Chair and Professor in the Department of Electrical Engineering and Computer Science at the University of Toledo. He leads a department with ~700 students across CS, CSE, and EE programs. His research focuses on Cyber-Physical Systems (CPS), IoT, AI/ML, and intelligent infrastructure, supported by over $30M in funding from NSF, DOE, DOT, and industry. Notable projects include CPS Breakthrough initiatives and underground sensing systems. He co-edited a multidisciplinary book on Underground Sensing and contributed to smart grid cybersecurity. Dr. Cheng has held leadership roles at Lehigh University, shaping faculty governance and equity policies. His 100+ publications span networking, real-time systems, and sensor networks. He advises on funded projects totaling $30M+ and has pioneered pedagogical approaches in computer science education. Research Interests: Cyber-Physical Systems (CPS): Focuses on autonomous drones, energy systems, and real-time infrastructure Networking: Expertise in TSN, DTN, and wireless protocols Cybersecurity: SCADA systems, PLC attack detection, and blockchain energy modeling Underground Sensing: Geo-sensing via wireless signals and subsurface tomography Grants & Projects: Over 20 sponsored projects including NSF CPS Breakthrough (2018-2023), ABB smart grid projects, and DARPA-funded EDIFY systems. Key contributions include reconfigurable wireless architectures and network calculus tools for real-time systems. Teaching: Courses span senior design, compiler design, parallel computing, and wireless sensor networks. Developed pedagogical patterns for non-CS programming education. Awards: Recognized for leadership in academic governance and interdisciplinary research collaboration.
