جستجوی استاد راهنمای دانشگاهی

Brandon Reagenمشاهده پروفایل

استادیار

• Computer Architecture
• Hardware Acceleration
• Machine Learning
• +۳ مورد دیگر

Brandon Reagen is an Assistant Professor in the Department of Electrical and Computer Engineering at New York University's Tandon School of Engineering, with affiliations in Computer Science, the Center for Advanced Technology in Telecommunications (CATT), and the NYU Center for Cybersecurity (CCS). He holds a PhD in Computer Science from Harvard (2018) and undergraduate degrees in Computer Systems Engineering and Applied Mathematics from the University of Massachusetts, Amherst (2012). His research focuses on computer architecture, hardware acceleration for deep learning and privacy-preserving computation, and VLSI design. He pioneered efficient deep learning accelerator designs through unsafe optimizations and contributed to benchmarking frameworks like Aladdin and MachSuite. His work spans privacy-preserving machine learning, secure computing systems, and hardware-software co-design for cryptographic protocols. Key achievements include the NSF CAREER Award (2024) and Siebel Scholar recognition (2018). His research centers on advancing secure computing through innovations like zero-knowledge proof accelerators (e.g., zkSpeed), fully homomorphic encryption frameworks (Orion), and entropy-guided privacy techniques for large language models. He leads interdisciplinary efforts at CATT and CCS to bridge hardware design and cybersecurity challenges. Reagen's contributions include over 50 publications in top-tier conferences (e.g., ISCA, ASPLOS, MLSys) and industry collaborations at Facebook AI. His work emphasizes practical solutions for encrypted computation efficiency, privacy-preserving inference, and scalable secure systems.

• Neuromorphic Computing
• Hardware Accelerators
• VLSI Circuits
• +۵ مورد دیگر

Prof. Dr. Tobias Gemmeke is a University Professor at RWTH Aachen University's Faculty of Electrical Engineering and Information Technology, leading the Chair of Integrated Digital Systems and Circuit Design. His work focuses on neuromorphic computing, hardware accelerators, and energy-efficient electronics. He has pioneered advancements in FPGA-based computational neuroscience simulators, neuromorphic processor architectures, and sensor integration for industrial and medical applications. Research interests include time-domain computing, ReRAM reliability, and co-optimization of neural networks with hardware. Notable contributions include the neuroAIx framework for accelerated neuroscience simulations and energy-efficient ASIC designs for post-quantum cryptography. He actively explores memristive devices and domain generalization techniques for edge computing. Recent publications highlight innovations in spiking neural networks, sensor systems for plain bearings, and time-domain compute-in-memory engines. His work bridges theoretical neuroscience with practical hardware implementations, emphasizing scalability and real-time performance.

• Medical Imaging
• Molecular Imaging
• Neuroscience
• +۳ مورد دیگر

Steven Meikle is a Professor of Medical Imaging Physics and Head of the Imaging Physics Laboratory at the Brain and Mind Centre, University of Sydney. He also serves as Deputy Director (Preclinical) of Sydney Imaging and Deputy Director of the National Imaging Facility's Sydney node. His expertise spans advanced imaging technologies, with a focus on PET/SPECT instrumentation and molecular imaging. He holds a B.App.Sc.(Hons) from the University of Technology Sydney and a PhD from the University of New South Wales. Research focuses include developing novel PET systems like Open-field PET (for freely moving rodents) and Total Body PET, which enhance imaging sensitivity and enable real-time behavioral studies alongside brain function analysis. Collaborations include Tsinghua University (China) and UC Davis (USA). He leads projects on motion correction, quantitative imaging, and AI-driven analysis. Key achievements include over 180 peer-reviewed publications, editorial roles in Physics in Medicine and Biology , and leadership in professional societies. Awards include IEEE Senior Membership and Australian Institute of Physics Fellowship. Current student projects explore Total Body PET applications, motion correction, and radiopharmaceutical evaluation. Teaching roles include medical physics courses in diagnostic radiography and medical physics programs. He advises on imaging ethics, facility implementation, and translational research bridging basic science and clinical applications.

Ameer Abdelhadiمشاهده پروفایل

استادیار

• Hardware Acceleration
• Neurotechnology
• Reconfigurable Computing
• +۴ مورد دیگر

Dr. Ameer Abdelhadi is an Assistant Professor in the Department of Electrical and Computer Engineering at McMaster University. His research focuses on application-specific custom-tailored computer architectures, hardware-efficient deep learning, neurotechnology, and reconfigurable computing. He holds a PhD from the University of British Columbia and has held academic positions at the University of Toronto, Imperial College London, and Simon Fraser University, alongside industry experience in semiconductor design. Education: PhD in Computer Engineering (University of British Columbia, 2016). Research Interests: Hardware acceleration for machine learning and neurotechnology Reconfigurable computing and FPGAs/ASICs Asynchronous circuits and synchronization protocols VLSI physical design and CAD algorithms Publications span high-impact venues such as IEEE Journal of Solid-State Circuits, IEEE Hot Chips, and IEEE Micro. Notable achievements include the 2017 Best Paper Award at ASYNC for work on synchronization FIFOs. Teaching includes COMPENG 4DV4 (VLSI System Design) and ELECENG 4OI6B (Engineering Design). His lab focuses on advancing hardware systems for next-generation applications in AI and biomedical engineering.

Lisa Willsمشاهده پروفایل

استادیار

• Computer Architecture
• Hardware Acceleration
• Hardware-Software Co-Design
• +۵ مورد دیگر

Lisa Wills serves as Assistant Professor of Computer Science at Duke University's Trinity College of Arts & Sciences and holds a joint appointment in Electrical and Computer Engineering at the Pratt School of Engineering since 2019. Her research bridges computer architecture and domain-specific applications, with a focus on hardware acceleration for computationally intensive fields. Dr. Wills earned her Ph.D. from Columbia University in 2014. Her academic journey reflects a deep commitment to advancing hardware-software co-design methodologies for real-world computational challenges. Her research centers on developing efficient hardware accelerators for big data analytics, particularly in genomics, graph processing, and database systems. She pioneers frameworks that simplify accelerator deployment while tackling critical bottlenecks in genomic data analysis, protein structure prediction, and privacy-preserving computing. Current work focuses on hardware-aware machine learning systems and energy-efficient architectures for emerging AI applications. Analysis of her publication record reveals a clear trajectory: from foundational work in database processing units (2014-2016) to specialized genomic accelerators (2019-2021), then evolving toward ML-enhanced design automation (2022-2023) and cutting-edge architectural abstractions (2024-2025). Her research consistently targets the intersection of hardware efficiency and domain-specific computational demands, with increasing emphasis on AI/ML workloads. Google ML and Systems Junior Faculty Award (2025) Dr. Wills actively mentors doctoral students including Chris Kjellqvist (lead architect of Beethoven accelerator framework), Mason Ma (PyTFHE FHE framework), and Mansi Choudhary (COCOSSim accelerator simulator). Her research is supported by significant grants including the NSF AI Institute: Athena ($20M, 2021-2027), Meta-funded ProSE accelerator project (2023-2026), and NSF CAREER award (2021-2026), totaling over $25M in active funding. She directs the APEX Lab (Application-driven Programmable Efficient Accelerated Systems), which develops open-source frameworks like Beethoven for FPGA/ASIC accelerator deployment and focuses on lowering barriers for non-hardware researchers to leverage custom acceleration in genomics, AI, and big data applications.

Jeff Zhangمشاهده پروفایل

استادیار

• Deep learning
• Computer architecture
• Embedded systems
• +۵ مورد دیگر

Jeff Zhang is an Assistant Professor in the School of Electrical, Computer and Energy Engineering at Arizona State University. He joined ASU in January 2023 after completing a postdoctoral fellowship at Harvard University. His research spans deep learning, computer architecture, embedded systems, and EDA, with particular emphasis on energy-efficient and fault-tolerant design for AI/ML systems and hardware accelerators. Education: Ph.D., New York University M.Eng., B.Eng., Hunan University Dr. Zhang's research bridges theoretical machine learning with practical hardware implementation, developing novel architectures that optimize performance, power consumption, and reliability. He has pioneered approaches for hardware acceleration of large language models, efficient sparse matrix operations, and novel memory technologies for AI workloads. His work has received multiple awards including IEEE Top Picks in Test and Reliability (2023) and IEEE Micro Best Paper Award (2022). His recent publications demonstrate a strong trend toward heterogeneous computing, with significant work in chiplet-based AI accelerators, photonic computing for AI, and 2.5D/3D integration techniques. The research spans from high-level compiler frameworks to circuit-level innovations, with a consistent theme of co-designing algorithms and hardware for optimal AI performance. His work on the SODA toolchain has been particularly influential in bridging Python to silicon. Scientific Awards: IEEE Top Picks in Test and Reliability, IEEE ITC, 2023 Best Paper Award, IEEE Micro, 2022 Best Paper Award Candidate, IEEE DATE, 2022 Best Presentation Award Nomination, ACM SIGDA DATE PhD Forum, 2020 Best Paper Award Nomination, IEEE VLSI Test Symposium, 2018 Ernst Weber Ph.D. Fellowship, New York University, 2015, 2016 Dr. Zhang actively mentors a diverse group of graduate and undergraduate students, with several alumni now working at leading technology companies including Apple, TSMC, and Ansys. His research is supported by prestigious grants from NSF, Sandia National Labs, and industry partners. He serves on technical program committees of numerous top conferences and has organized special sessions on emerging topics like Gen AI for Chip Design and LLM-Aided Design. Dr. Zhang leads a vibrant research group that collaborates extensively with industry partners and national laboratories. Current projects focus on next-generation AI hardware, including chiplet-based systems, photonic accelerators, and novel memory technologies for large language models. His group has developed several open-source tools and frameworks, including the SODA toolchain for bridging Python to silicon.

Papadimitriou Kyprianosمشاهده پروفایل

پژوهشگر

• Reconfigurable Systems
• Hardware Design
• Digital Systems
• +۷ مورد دیگر

Kyprianos Papadimitriou is a Researcher at the Microprocessor and Hardware Laboratory within the School of Electrical and Computer Engineering at the Technical University of Crete . He holds a PhD in Electronic and Computer Engineering (2012) and has been involved in teaching laboratory courses such as Logic Design , Computer Architecture , and VLSI/ASIC Circuit Design . Research Areas : His work spans Reconfigurable Systems , Hardware Design , Computer Architecture , RFID Systems , and Real-Time Systems . He has developed innovative approaches in FPGA-based dynamic reconfiguration, MPSoC security, and 3D stereo vision for surveillance. Key Trends : Runtime reconfiguration for FPGAs Security frameworks for NoC-based MPSoCs Low-cost embedded vision systems Optimization of reconfiguration overhead Hardware task scheduling methodologies Genetic algorithm implementations on FPGAs Scientific Contributions : 1 USA patent (2005) Co-author of VLSI-SoC 2013 paper nominated for 1st Prize Active member of scientific committees (FPL, ReConFig) Peer reviewer for IEEE, Elsevier, and Springer journals Session chair at IEEE CNS and HPCC conferences Grants & Projects : Participated in competitive European and national programs, serving as scientific manager, coordinator, and technical coordinator. Developed spin-off company (2003-2005) to commercialize master's thesis research. Laboratory & Teaching : Affiliated with the Microprocessor and Hardware Laboratory , focusing on practical training in digital systems, processor-based systems, and VLSI design.

Andreas Peter Burgمشاهده پروفایل

دانشیار

• Circuits and systems for telecommunications
• Silicon implementation of communication technologies
• Communication algorithms optimization
• +۵ مورد دیگر

Andreas Peter Burg is a Tenured Associate Professor at the École Polytechnique Fédérale de Lausanne (EPFL), where he leads the Telecommunications Circuits Laboratory (TCL) within the School of Engineering. He holds multiple academic and administrative roles at EPFL including Associate Professor in Teaching (SEL, EDMI, EDEE), Director of SEL Management, and Member of the Doctoral Program Committee for Electrical Engineering. Dr. Burg received his Dipl.-Ing. degree in 2000 and Dr. sc. techn. degree in 2006 from ETH Zurich. His academic career includes positions as SNF Assistant Professor at ETH Zurich (2009-2011) before joining EPFL in January 2011 as a Tenure Track Assistant Professor, where he was promoted to Tenured Associate Professor in June 2018. His research focuses on circuits and systems for telecommunications , with particular expertise in silicon implementation of communication technologies, communication algorithms optimization for hardware, low-power VLSI signal processing, and digital integrated circuits. His work bridges theoretical communication concepts with practical circuit implementations, addressing challenges in wireless and wired communication systems. His recent publications (2024-2025) demonstrate a strong focus on next-generation communication technologies including 6G systems, advanced error correction coding, wireless sensing applications, and ultra-low power circuit design. These works span multiple subfields from LDPC and polar code decoding to RF signal processing and machine learning applications in wireless systems. Willi Studer Award (2000) ETH Medal for diploma thesis (2000) ETH Medal for Ph.D. dissertation (2006) Swiss National Science Foundation Assistant Professorship grant (2008) Dr. Burg has been involved in the development of more than 25 ASICs throughout his career and co-founded Celestrius, an ETH spinoff in MIMO wireless communication. His laboratory work focuses on practical implementations of communication algorithms with emphasis on power efficiency and hardware optimization. Current research directions include 6G technologies, wireless sensing applications, and novel error correction techniques for next-generation communication systems.

• Logic Synthesis
• Digital Circuit Design
• Machine Learning
• +۳ مورد دیگر

Andrea Costamagna is a researcher affiliated with the École Polytechnique Fédérale de Lausanne (EPFL), working within the School of Computer and Communication Sciences and the Department of Communication Systems. His research focuses on logic synthesis, digital circuit design, and the intersection of machine learning with hardware implementation. His work includes optimizing digital circuits using techniques like resynthesis, resubstitution, and decomposition, with applications in FPGA design and low-power systems. Recent publications explore symmetry-based synthesis, glitch-aware power minimization, and the use of resistive switching devices in machine learning hardware. His research also extends to quantum physics modeling with deep learning.

Thuy T. Leمشاهده پروفایل

استاد

• Digital System Design
• Computer Architecture
• Hardware Accelerators
• +۶ مورد دیگر

Thuy T. Le is a Professor of Electrical Engineering at San Jose State University's College of Engineering. With a distinguished career spanning several decades, he teaches graduate and undergraduate courses in digital system design, computer architecture, microprocessor systems, and related fields. His academic journey began with earning B.S., M.S., and Ph.D. degrees from the University of California, Berkeley. Professor Le's research interests encompass a broad spectrum of cutting-edge technological domains. His primary focus areas include System-on-Chip (SoC) and Embedded System Design, Hardware Accelerators for complex algorithms, Quantum Computing, implementation of Probability theory and Monte Carlo simulation, and radiation effects on electronic devices and systems. His work bridges traditional electrical engineering with emerging computational paradigms, demonstrating a consistent ability to adapt to evolving technological landscapes while maintaining strong foundations in core engineering principles. Analysis of Professor Le's publication record reveals a consistent trajectory from nuclear reactor physics and computational methods toward modern hardware acceleration and quantum computing. His early work focused on nuclear reactor simulation and radiation shielding, then evolved to parallel computing and distributed systems, and has recently centered on hardware acceleration for complex algorithms, quantum computing applications, and AI hardware. This progression demonstrates his ability to transition between major technological paradigms while maintaining expertise in computational methods and hardware implementation. Professor Le has demonstrated significant leadership in professional service, having served as keynote speaker, general chair, technical program chair, session chair, reviewer, and committee member for numerous international conferences. His service extends beyond academia through his role as Co-Founder and Advisor of the Vietnamese Strategic Ventures Network and Chairman of the Board of the United States–Vietnam Foundation. In his educational role, Professor Le has made substantial contributions to engineering curriculum development and assessment. He has taught a wide range of courses including EE271 (Advanced Digital System Design), EE210, EE250, and various project/thesis courses. His research advising spans digital system design, ASIC, SOC, and hardware accelerators. He has also collaborated with local companies on projects related to high-performance system architectures, parallel algorithms, digital arithmetic, and System-on-Chip verification.

Ahmet Bindalمشاهده پروفایل

استاد

• Nano-scale Electron Devices
• Silicon Nanowire Transistors
• VLSI Architecture
• +۴ مورد دیگر

Professor Ahmet Bindal is a faculty member in the Department of Computer Engineering at San José State University . He earned his B.S. in Electrical Engineering from Bogazici University, Turkey, followed by M.S. and Ph.D. degrees from the University of California, Los Angeles. Industry Experience : 20 years at IBM, Intel, Philips, and Cadence Design Systems. Current Research : Nano-scale electron devices, silicon nanowire transistors, robotics, and VLSI architecture. Research Trends : His work focuses on silicon nanowire transistors for VLSI, FPGA, and robotics. Key themes include low-power/high-speed integrated circuits , dynamic logic design , neuromorphic engineering , and advanced semiconductor processing . Patents and Publications : He holds four U.S. patents (three with IBM, one with Intel). His 30+ journal and conference publications span nanowire transistors, FPGA architecture, robotics, and semiconductor process modeling. Teaching Contributions : Developed an undergraduate System-on-Chip (SoC) course and a MOSFET design laboratory at SJSU. Books Authored : Fundamentals of Computer Architecture and Design (Springer, 2017). Electronics for Embedded Systems (Springer, 2017). Silicon Nanowire Transistors (Springer, 2017).

Farshad Moradiمشاهده پروفایل

استاد

• Neuromorphic Computing
• Spintronics
• Biomedical Engineering
• +۵ مورد دیگر

Farshad Moradi is a Professor at the Department of Electrical and Computer Engineering at Aarhus University, specializing in neuromorphic engineering, spintronics, and biomedical device design. His work focuses on integrating advanced materials and circuits for applications in neural interfaces, energy-efficient computing, and wireless biomedical systems. Research Interests include: Spintronic-based neuromorphic computing architectures Ultra-low power analog/mixed-signal integrated circuits Ultrasonically powered implantable medical devices Neural signal processing and seizure detection systems Wireless energy transfer and structural health monitoring Key Projects (2016-2026): SPICE: Spintronic-Photonic Integrated Circuit Platform PHOTON-NeuroCom: Photonic-assisted Neuromorphic Computing Neuro-Sense: Flexible bioinspired neuroprostheses CorroSense: Self-powered corrosion monitoring HERMES: Hybrid Enhanced Regenerative Medicine Systems Recent innovations include: Ultrasonically powered optogenetic implants Low-power neural amplifiers for deep-brain interfaces Spin-torque nano-oscillator-based neuromorphic hardware Energy harvesting systems for structural monitoring

Kia Bazarganمشاهده پروفایل

دانشیار

• VLSI-CAD
• FPGA Physical Design
• Reconfigurable Computing
• +۴ مورد دیگر

Kia Bazargan is an Associate Professor and the Leroy and Ruth Fingerson Co-op Professor at the University of Minnesota, College of Science and Engineering. He currently serves as Director of the Co-op Program and focuses on VLSI-CAD, FPGA physical design, and hybrid binary-unary computing. University: University of Minnesota School: College of Science and Engineering Department: Electrical and Computer Engineering His research emphasizes stochastic computing and unary computing, where numbers are encoded as streams of bits. He explores techniques to reduce hardware costs while maintaining efficiency, particularly for edge computing and neural network applications. Recent publications highlight his work on hybrid binary-unary computing, FPGA-based inference acceleration, and lossless compression of lookup tables. Grants from Cisco Systems and the National Science Foundation support his projects. Scientific Awards: PFI-TT Grant (2020-2024): Commercializing hybrid computing for modern applications Uniqomp NSF Grant (2020-2021) EAGER Grant (2015): Studying complex dynamical systems His lab (4-162 EE/CSci) investigates scalable computing paradigms to bridge the gap between ASICs and FPGAs in performance and energy efficiency.

Marc Reichenbachمشاهده پروفایل

استاد

• Integrated Circuits
• Embedded Systems
• VLSI Design
• +۷ مورد دیگر

Prof. Dr.-Ing. Marc Reichenbach serves as the Chair of Integrated Systems at the Institute for Applied Microelectronics and Data Technology at the University of Rostock. His office is located at Albert-Einstein-Straße 26, 18059 Rostock, Room 102 (1st floor), with contact information including telephone (0381) 498 7270 and email marc.reichenbach@uni-rostock.de. Professor Reichenbach's research focuses on the intersection of hardware design and artificial intelligence, with particular expertise in memory technologies and computing architectures. His work spans several key areas: Development of specialized computer architectures for deep learning applications Advanced VLSI design and CPU architecture Emerging memory technologies, particularly RRAM (Resistive Random-Access Memory) FPGA-based acceleration systems Hardware implementations for neural networks and AI applications Analysis of Professor Reichenbach's recent publications (2023-2025) reveals a strong focus on memory computing technologies, particularly RRAM-based systems. His work demonstrates expertise across multiple dimensions of computer architecture including ASIC design, FPGA acceleration, and novel memory systems. The publications show a clear trajectory toward implementing AI and machine learning capabilities directly in hardware, with applications ranging from edge computing to satellite systems. A significant portion of his recent work addresses the challenges of implementing neural networks using emerging memory technologies, focusing on efficiency, reliability, and performance optimization. Professor Reichenbach teaches several advanced courses including: Computer architectures for deep learning applications Project seminar Embedded Systems Advanced VLSI Design (Advanced CPU Design) His research group appears to be actively engaged in several cutting-edge projects related to hardware acceleration for AI applications, memory computing, and embedded systems design. The group collaborates on projects involving digital twins for hardware systems, real-time operating systems for heterogeneous architectures, and specialized computing systems for various applications from medical devices to drone technology.

Glenn Gulakمشاهده پروفایل

استاد

• Homomorphic Encryption
• Quantum Cryptography
• CMOS Biosensors
• +۴ مورد دیگر

Glenn Gulak is a Professor in the Department of Electrical and Computer Engineering at the University of Toronto's Faculty of Applied Science and Engineering. He holds the Canada Research Chair in Signal Processing Microsystems and the Edward S. Rogers Sr. Chair in Engineering. A Senior IEEE Member and Professional Engineer in Ontario, he received his Ph.D. from the University of Manitoba. His research spans: Digital Communication Systems: VLSI implementations of MIMO detectors, lattice reduction algorithms, and homomorphic encryption accelerators Lab-on-Chip Microsystems: CMOS biosensors for rapid pathogen detection and integrated fluorescence imaging Recent publications (2019-2025) demonstrate a dominant focus on privacy-enhancing technologies, with 73% concentrated in cryptographic hardware and homomorphic encryption. This reflects industry-aligned work on confidential computing and secure data processing. Awards & Honors: IEEE Millennium Medal (2001) Canada Research Chair in Signal Processing Systems (Tier 1, 2005-2012) Edward S. Rogers Sr. Chair (2005-2010) RBC Research Prize L. Lau Chair (1999-2004) Teaching Award (1999) He has supervised 44+ graduate students (PhD/MASc) with thesis topics spanning VLSI communication systems, CMOS biosensors, and cryptographic accelerators. Notable industry collaboration includes serving as CTO of a semiconductor startup (2001-2003). His lab develops hardware for quantum cryptography and secure medical computation.