جستجوی استاد راهنمای دانشگاهی

Prof. Dr. Tobias Gemmeke is a University Professor at RWTH Aachen University's Faculty of Electrical Engineering and Information Technology, leading the Chair of Integrated Digital Systems and Circuit Design. His work focuses on neuromorphic computing, hardware accelerators, and energy-efficient electronics. He has pioneered advancements in FPGA-based computational neuroscience simulators, neuromorphic processor architectures, and sensor integration for industrial and medical applications. Research interests include time-domain computing, ReRAM reliability, and co-optimization of neural networks with hardware. Notable contributions include the neuroAIx framework for accelerated neuroscience simulations and energy-efficient ASIC designs for post-quantum cryptography. He actively explores memristive devices and domain generalization techniques for edge computing. Recent publications highlight innovations in spiking neural networks, sensor systems for plain bearings, and time-domain compute-in-memory engines. His work bridges theoretical neuroscience with practical hardware implementations, emphasizing scalability and real-time performance.

• Neuromorphic Computing
• Hardware Accelerators
• VLSI Circuits
• +۵ مورد دیگر

Prof. Dr.-Ing. Marc Reichenbach serves as the Chair of Integrated Systems at the Institute for Applied Microelectronics and Data Technology at the University of Rostock. His office is located at Albert-Einstein-Straße 26, 18059 Rostock, Room 102 (1st floor), with contact information including telephone (0381) 498 7270 and email marc.reichenbach@uni-rostock.de. Professor Reichenbach's research focuses on the intersection of hardware design and artificial intelligence, with particular expertise in memory technologies and computing architectures. His work spans several key areas: Development of specialized computer architectures for deep learning applications Advanced VLSI design and CPU architecture Emerging memory technologies, particularly RRAM (Resistive Random-Access Memory) FPGA-based acceleration systems Hardware implementations for neural networks and AI applications Analysis of Professor Reichenbach's recent publications (2023-2025) reveals a strong focus on memory computing technologies, particularly RRAM-based systems. His work demonstrates expertise across multiple dimensions of computer architecture including ASIC design, FPGA acceleration, and novel memory systems. The publications show a clear trajectory toward implementing AI and machine learning capabilities directly in hardware, with applications ranging from edge computing to satellite systems. A significant portion of his recent work addresses the challenges of implementing neural networks using emerging memory technologies, focusing on efficiency, reliability, and performance optimization. Professor Reichenbach teaches several advanced courses including: Computer architectures for deep learning applications Project seminar Embedded Systems Advanced VLSI Design (Advanced CPU Design) His research group appears to be actively engaged in several cutting-edge projects related to hardware acceleration for AI applications, memory computing, and embedded systems design. The group collaborates on projects involving digital twins for hardware systems, real-time operating systems for heterogeneous architectures, and specialized computing systems for various applications from medical devices to drone technology.

• Integrated Circuits
• Embedded Systems
• VLSI Design
• +۷ مورد دیگر

Xin Wang is a Professor at Fudan University's School of Computer Science, specifically within the Department of Communication Science and Engineering and affiliated with the State Key Laboratory of ASIC and System in Shanghai, China. With 185 publications spanning two decades (2003-2025), Wang maintains an exceptionally active research profile, particularly evident in recent high-output years including 22 publications in 2019, 19 in 2021, and 13 in 2024. The research portfolio demonstrates deep collaboration networks, most notably with Yang Chen (45 co-authored papers), Yangfan Zhou, and Qingyuan Gong. Wang's research spans multiple critical areas in computer science, with significant contributions to networking systems (particularly CDN optimization, HTTP/3 implementation, and IPv6 infrastructure), software engineering (focusing on work rhythms, testing methodologies, and GUI analysis), mobile applications (including healthcare implementations and accessibility features), and security (especially account security and fraud detection in e-commerce). The interdisciplinary nature of the work is evident through applications in healthcare, e-commerce, campus safety, and IoT systems. Analysis of recent publications (2023-2025) reveals a strong trend toward practical system implementations addressing real-world challenges. The research demonstrates a consistent pattern of moving from theoretical foundations to deployable solutions, with particular emphasis on optimizing performance in networking systems, enhancing security in digital platforms, and improving user experience across diverse application domains. The work frequently incorporates machine learning techniques to solve complex system problems while maintaining practical applicability. While specific grant information isn't detailed in the publication records, the extensive collaboration network spanning multiple institutions in China and internationally suggests substantial research funding support. The consistent publication output across top venues including IEEE/ACM Transactions, INFOCOM, SIGCOMM, and ICSE indicates sustained research productivity and impact.

• Computer Science
• Networking Systems
• Software Engineering
• +۵ مورد دیگر

Prof. Dr.-Ing. Holger Blume serves as Vice President for Research and Transfer at Leibniz University Hannover while maintaining his academic position as Professor in the Architectures and Systems Section within the Faculty of Electrical Engineering and Computer Science. He holds multiple leadership positions including Chairperson of the Research Commission and Central Ethics Committee, Executive Board member of eNIFE (Leibniz Research Initiative for Neurosciences), and membership in both the Laboratory of Nano and Quantum Engineering and L3S Research Centre. His research interests span computer architecture, hardware design, signal processing, AI accelerators, hearing aid technology, and biomedical engineering. His work bridges theoretical computer science with practical applications in automotive systems, medical devices, and quantum engineering. Professor Blume's research demonstrates strong interdisciplinary connections between electrical engineering, computer science, and biomedical applications, with particular emphasis on hardware-oriented solutions for real-world problems. Analysis of his recent publications (2023-2025) reveals a strong focus on hardware acceleration for AI and signal processing applications, particularly in automotive radar/LiDAR systems and hearing aid technology. His work shows consistent innovation in RISC-V processor design, specialized hardware for mathematical functions, and biomedical applications of engineering principles. The research demonstrates a clear trajectory toward energy-efficient, specialized computing architectures for specific application domains. As Vice President for Research and Transfer, Professor Blume oversees significant research initiatives at Leibniz University Hannover, which hosts multiple Clusters of Excellence including PhoenixD (Photonics, Optics, and Engineering), QuantumFrontiers, and Hearing4all. The university participates in numerous collaborative research centers and junior research groups funded by DFG, BMBF, and EU programs. Professor Blume is actively involved in multiple research facilities including the Laboratory of Nano and Quantum Engineering and the L3S Research Centre. His work connects with Leibniz University's research focuses on optical technologies, quantum optics and gravitational physics, and biomedical research and technology. His leadership positions indicate strong involvement in shaping the research strategy and ethical framework of the university's scientific endeavors.

• Computer Architecture
• Hardware Design
• Signal Processing
• +۷ مورد دیگر

Prof. Dr.-Ing. Guillermo Payá Vayá leads the Chair for Chip Design for Embedded Computing at Technical University of Braunschweig's Faculty of Electrical Engineering, Information Technology, and Physics. His research focuses on processor architecture design, FPGA/ASIC implementations, and optimization techniques for embedded systems, particularly in high-performance, low-power, and radiation-hardened computing domains. Primary research interests include: Application-Specific Instruction Set Processors (ASIPs) and compiler co-design Radiation effects characterization and fault-tolerant hardware Ultra-low-power processor architectures for embedded AI Hardware acceleration of neural networks and computer vision algorithms Memory subsystem optimization and parallel computing techniques Recent publications demonstrate strong emphasis on radiation-hardened electronics (35% of recent works), AI accelerator design (27%), and ultra-low-power systems (20%), with growing interest in biomedical applications. Experimental validation through FPGA prototyping and semiconductor testing is a consistent methodology across research domains. Leads research team investigating: Radiation-tolerant FPGA architectures (Trumann, Weide-Zaage) Vector processor optimization (Gesper, Thieu) Nano-scale controller design (Weißbrich) AI-hardware co-design (Kautz, Beyer)

• Embedded Systems
• Processor Architecture
• FPGA Design
• +۵ مورد دیگر

Jean-Baptiste Bégueret is a researcher with extensive contributions to integrated circuits , RF design , and low-power electronics . His work spans analog , digital , and mixed-signal systems.

• Integrated Circuits
• RF Circuit Design
• Low-Power Electronics
• +۳ مورد دیگر

Dr. Oliver Mischke is an academic researcher focusing on hardware security and cryptographic implementations. He was affiliated with the Chair for Embedded Security at the Horst Görtz Institute for IT Security, Ruhr-University Bochum. His research emphasizes side-channel cryptanalysis, efficient cryptographic algorithms, and secure hardware design. Mischke completed his PhD in Security in Information Technology at Ruhr-University Bochum (2011–2013), with a year abroad at Purdue University (2007–2008). He has held roles as a Security Engineer (ESCRYPT GmbH) and an intern at Qualcomm's Product Security Group. His research interests include FPGA-based cryptographic implementations, fault analysis, and countermeasures against side-channel attacks. Notable contributions involve dynamic logic reconfiguration for FPGA security, glitch-resistant masking schemes, and evaluation of AES countermeasures. Mischke's publications span conferences like HOST, CHES, and IEEE venues, focusing on cryptographic hardware security, timing attacks, and secure embedded systems. His work bridges theoretical cryptography with practical hardware implementations, addressing vulnerabilities in reconfigurable and embedded systems. He has contributed to projects such as the MicroACP crypto-processor and IPSec core designs. His collaborations include prominent institutions and industry partners, reflecting a strong emphasis on applied security solutions.

• Side-Channel Cryptanalysis
• Efficient Cryptographic Implementation
• Hardware Security
• +۳ مورد دیگر

Sergei Savitsky is a Professor at Wedel University of Applied Sciences, where he serves as Head of the Bachelor of Computer Science program and Senate Chairman. He has been a university lecturer at the institution since October 2008, following professional experience at NXP Semiconductors (2006-2008) and Philips Research Europe (2001-2006). His educational background includes: Doctorate in Engineering (Dr.-Ing.) from Technical University of Dresden (2002) with distinction "summa cum laude" Habilitation (Dr.-Ing. habil.) from Technical University of Dresden (2024) with teaching authorization in "Technical Computer Science" Diplom-Informatiker (equivalent to MSc) in Computer Science from Technical University of Dresden (1998) Savitsky's research focuses on reconfigurable computing systems , with particular expertise in FPGA design, hardware acceleration, and error correction coding. His work bridges theoretical computer science with practical hardware implementation, resulting in numerous patents and publications in top venues. He has made significant contributions to the development of adaptive hardware architectures for forward error correction, which are critical for modern communication and storage systems. His recent publications demonstrate a strong trajectory in optimizing hardware design processes, with particular focus on applying machine learning techniques like self-organizing maps and gradient descent algorithms to improve FPGA placement efficiency. His research spans both theoretical foundations and practical applications, with patents filed in collaboration with industry partners like NXP Semiconductors and ST-Ericsson. Among his recognitions is the Best Paper Award at CENICS 2019 for his work on accelerating FPGA placement algorithms. As an educator, Savitsky teaches courses related to digital system design, including "Computer-aided design of digital systems," where he emphasizes algorithmic aspects of Electronic Design Automation beyond basic digital technology concepts.

• Reconfigurable Computing
• Digital Signal Processing
• Hardware Architectures
• +۳ مورد دیگر

Patrick Karl is a Researcher at the Chair of Security in Information Technology (Technische Universität München). He holds an M.Sc. degree and focuses on efficient hardware implementations for post-quantum cryptography , particularly hardware acceleration of digital signature algorithms on RISC-V platforms for embedded systems. His work addresses performance optimization, power/energy efficiency, and countermeasures against physical attacks such as side-channel and fault attacks . His research spans both FPGA prototyping and ASIC design , including tape-outs for security applications. He contributed to NIST submissions like CROSS , LESS , and FuLeeca , and has published extensively on topics including lattice-based cryptography, masked accelerators, and hardware API overhead for lightweight cryptography. Patrick has taught Lab Course ASIC Design of Hardware Accelerators for RISC-V since WS22/23 and Lab Course Crypto Implementation in SS22. His publications (15 most recent) highlight trends in post-quantum cryptographic hardware , RISC-V security , and physical attack countermeasures . He has presented at venues like RISC-V Summit Europe, COSADE, and FDTC.

• Post-Quantum Cryptography
• Hardware Implementation
• Embedded Systems Security
• +۷ مورد دیگر

M.Sc. Jonas Schupp is a researcher at the Chair of Information Security at the Technical University of Munich , working under Prof. Georg Sigl. His research focuses on side-channel attacks and countermeasures for post-quantum cryptography (PQC), with emphasis on hardware/software implementations, ASIC design, and formal verification of secure systems. Specializes in Post-Quantum Cryptography (e.g., lattice-based algorithms, SPHINCS+ signatures) Investigates Side-Channel Attacks on PQC algorithms and develops countermeasures Explores Hardware Acceleration and ASIC Implementation for PQC efficiency Works with RISC-V architecture for secure embedded systems Engages in Formal Verification of cryptographic implementations His publications analyze hardware acceleration trade-offs for PQC hash primitives, tapeouts for security applications, and compiler-induced side-channel vulnerabilities. He co-teaches courses on Circuit Design for Security and Introduction to IT Security at TUM and TUM Asia Singapore.

• Side-Channel Attacks
• Post-Quantum Cryptography
• Hardware Implementation
• +۴ مورد دیگر

Kun Qin is a Doctoral Candidate and Research Associate at the Technical University of Munich , affiliated with the IH02 Chair of Computer Architecture and Operating Systems (CAOS) and the I10 Chair of Computer Architecture and Parallel Systems (CAPS). His work focuses on Hardware/Software Codesign , RISC-V Architecture , and Quantum Computing . Current affiliation: Department of Computer Engineering, School of Computation, Information and Technology Research areas: FPGA/ASIC design, quantum-based systems, open-source hardware Teaching: Courses on HDL, Computer Architecture, and Operating Systems (WS23/24–WS24/25) Kun actively participates in academic service as Web Co-Chair for the ACM International Conference on Computing Frontiers (CF'24, CF'25). His research includes FPGA acceleration for RTL verification and quantum control processors. Key scientific achievement: Best Poster Award at SERESSA (2023) . Publications span topics like RISC-V verification frameworks, FPGA-based timing systems, and quantum control processors for superconducting qubits.

• Hardware/Software Codesign
• RISC-V Architecture
• Open-Source Hardware
• +۳ مورد دیگر

Fabian Ihle is a Researcher & PhD Student at the Chair of Communication Networks , Department of Computer Science , University of Tübingen . He works on Software-Defined Networking (SDN) , P4 Programming Language , and MPLS Network Actions , focusing on Time-Sensitive Networking and Network Resilience . His research includes data plane programming , network protocol development , and high-speed switching using hardware like Intel Tofino. He has contributed to IETF Internet Drafts and presented at workshops including ReNeSys 2025 and IETF MPLS WG meetings. Academic Background : B.Sc. and M.Sc. in Computer Science from University of Tübingen (2021-2023) His publications address MPLS extensions , BIER-TE , and P4-based tools for traffic generation and runtime control. He actively participates in KuVS workshops and serves as a reviewer for journals like IEEE Transactions on Cognitive Communications .

• Software-Defined Networking (SDN)
• P4 Programming Language
• Time-Sensitive Networking (TSN)
• +۳ مورد دیگر

Christian Heidorn is a Researcher at the Chair of Computer Science 12 (Hardware-Software Co-Design) within the Department of Computer Science at Friedrich-Alexander University Erlangen-Nürnberg (FAU), Germany. He has held this position since 2018 and teaches "Fundamentals of Computer Engineering" regularly across multiple semesters. His educational background includes an M.Sc. in Medical Engineering (2015-2018) and a B.Sc. in Medical Engineering (2012-2016), both from FAU. Born in 1989 in Dachau, Germany, he maintains an office in Room 02.128 at Cauerstr. 11, Erlangen. Dr. Heidorn's research focuses on the Application of Deep Learning on Tightly Coupled Processor Arrays and Invasive Computing . His work bridges medical engineering with computer architecture, particularly emphasizing neural network deployment on specialized hardware. His research projects include OpTC and KISS Invasive Computing, which optimize neural networks for embedded systems and processor arrays. His recent publications demonstrate a strong trend toward efficient neural network deployment on embedded systems, with emphasis on automotive applications (AURIX microcontrollers), hardware-aware neural network pruning, and processor array optimization. His work spans both theoretical neural architecture search and practical implementations for real-world applications. His notable scientific contributions include: Development of the OpTC toolchain for neural network deployment on automotive microcontrollers Hardware-aware evolutionary filter pruning techniques for CNNs ALPACA: An accelerator chip design for nested loop programs Efficient mapping of CNNs onto tightly coupled processor arrays Dr. Heidorn has supervised numerous Master's and Bachelor's theses on topics ranging from neural network compression to robotic hand control using EMG data and processor array optimization. His advising reflects his dual expertise in medical engineering and computer architecture, with many projects focusing on practical embedded applications of deep learning. He is actively involved in research projects related to invasive computing and tightly coupled processor arrays, with a particular focus on making deep learning more accessible on resource-constrained devices for automotive and medical applications.

• Deep Learning
• Hardware-Software Co-Design
• Neural Networks
• +۵ مورد دیگر

Tim Fritzmann is a researcher at the Department of Security in Information Technology (Technische Universität München). His work focuses on post-quantum cryptography, lattice-based algorithms, and secure hardware/software co-design for constrained environments like automotive systems and embedded devices. Post-Quantum Cryptography Lattice-Based Cryptography Hardware/Software Co-Design Error-Correcting Codes RISC-V Architecture ASIC Design His recent publications (2018–2022) highlight advancements in fault attacks, side-channel countermeasures, and efficient implementations of lattice-based protocols for IoT, automotive systems, and FPGA-SoC platforms. Key themes include parameter optimization for decryption reliability, masked accelerators, and instruction-set extensions for quantum-resistant algorithms. Research projects involve collaborations with institutions like the University of Leuven and TU München, emphasizing post-quantum security integration into real-world hardware architectures. No explicit awards or student advisement details are listed publicly.

• Post-Quantum Cryptography
• Lattice-Based Cryptography
• Hardware/Software Co-Design
• +۱۰ مورد دیگر

Prof. Dr. habil. Reinhard Rauscher is a retired professor at the Osnabrück University of Applied Sciences, affiliated with the Faculty of Management, Culture and Technology. He holds a Diplom in Informatics from the Christian-Albrechts-Universität Kiel (1982), a PhD in Computer Science from the University of Hamburg (1987), and a habilitation in Computer Science focusing on 'Design and Methodology of Application-Specific Digital Systems' (1998). His teaching responsibilities include courses such as Algorithms, Programming, and Databases. Research Interests: His work spans digital system design, VLSI architecture, CAD tools for hardware design, microprogramming optimization, and real-time image processing ASICs. Notable contributions include methodologies for microcode transformation verification, CAD systems for digital circuit design, and research on numerical stability in systolic arrays. Publications: Over 30 peer-reviewed papers in conferences like EUROMICRO, CONPAR, and journals such as Microprocessing and Microprogramming. His research emphasizes practical applications of theoretical computer science in hardware-software co-design. Grants & Labs: Involved in projects like CAMILOD (correctness-proven hardware design), BOSSDIS (automated hardware description transformation), and collaborations on ASIC development for image processing and SCHEME coprocessors. His work integrates algorithmic theory with embedded system implementation challenges.

• Computer Science
• Digital Systems Design
• VLSI Design
• +۳ مورد دیگر