Shuang Liu

Shuang Liu is a Researcher at the Institute of Computer Architecture and Computer Engineering, University of Stuttgart. Their work focuses on embedded systems, networks-on-chip (NoC), and chip design methodologies. They specialize in deadlock-free routing, fault-tolerant computing, and application-specific system synthesis using advanced techniques like integer linear programming.

Research interests include optimizing NoC architectures for chiplet-based systems, co-design of floorplanning and routing topologies, and energy-efficient signal processing in medical electronics. Their recent work emphasizes formal verification methods and performance optimization in hardware-software co-design.

Publications span topics such as deadlock prevention in NoC, ILP-based routing synthesis, and trade-offs in hearing aid ASIP design. Office hours are Monday 2–3 p.m. in Room 1.001, Pfaffenwaldring 5b, Stuttgart.