Salvatore Pontarelli

Salvatore Pontarelli is a Researcher at CNIT (Italian National Inter-University Consortium for Telecommunications), affiliated with the University of Rome Tor Vergata. He holds a Master's in Electronic Engineering from the University of Bologna (2000) and a PhD in Microelectronics and Telecommunications from the University of Rome Tor Vergata (2003). His work focuses on hardware design for network devices, fault tolerance, error correction codes, and high-speed packet processing. He contributed to EU-funded projects and received a CISCO Research Award (2011) for work on Bloom filters and Ternary CAM.

Research interests include hash-based structures (e.g., Bloom filters, hash tables), stateful programmable data planes, and FPGA-based network intrusion detection systems. He led the Defect and Fault Tolerance Group (DFTGroup) under Prof. Adelio Salsano and has extensive experience in collaborative projects with academic and industry partners.

Publications highlight innovations in flow monitoring, data plane optimization, and efficient memory management. His work often bridges theoretical algorithms (e.g., cuckoo hashing) with practical hardware implementations, emphasizing real-world applications in networking and telecommunications.