Moucheng Yang

Moucheng Yang is an active faculty member in the College of Engineering, specializing in computer science and technology. His research focuses on reconfigurable computing, FPGA architecture design, and digital circuit optimization.

His recent work includes the development of DSLUT and R-LUT architectures, which improve logic cell scalability and efficiency for domain-specific benchmarks. Earlier studies explored CPU-FPGA hybrid systems for bioinformatics and data-parallel acceleration.

Key trends in his publications emphasize hardware resource allocation, parallelized technology mapping, and latency reduction through adaptive circuit partitioning. His collaborations span institutions like Xilinx Zynq and Intel Stratix-10.