Maxime Pelcat

Maxime Pelcat is a Full Professor at INSA Rennes, France, affiliated with the Department of Electronics, Computer Science and Systems within the College of Engineering. His research is conducted in the VAADER team at IETR, a CNRS research unit (UMR 6164), where he leads advanced work in sustainable, secure, and open embedded systems.

• PhD in Signal Processing, INSA Rennes, 2010
• Habilitation (HDR), Université Clermont Auvergne, 2017
• Researcher at Fraunhofer IIS, Germany
• Contractor at France Telecom R&D
• Faculty at INSA Rennes since 2011

Maxime Pelcat's research focuses on sustainable electronics, open hardware (especially RISC-V), hardware security against side-channel attacks, and machine learning at the edge. He emphasizes energy efficiency, system sovereignty, and end-of-life sustainability in electronic design. His work integrates models of computation, heterogeneous architectures, and reconfigurable hardware to improve system efficiency and design productivity in embedded signal processing and telecommunications.

His publications and projects reflect a strong trend in sustainable computing, embedded AI, and secure system design. The work spans FPGA-based acceleration, MPSoC optimization, deep learning integration, and dataflow programming models, particularly applied to vision systems and signal processing.

Scientific Awards and Honors:

• Best PhD Award 2016 (Fondation Rennes 1) - for advisee Erwan Nogues
• Chaire d’Excellence France-Nokia 2024

Maxime Pelcat has co-advised 11 PhD students in areas including deep learning on FPGAs, intrusion detection, eavesdropping exploitation, multi-view vision systems, and reconfigurable architectures. He has participated in major research projects including 1 H2020 ICT, 1 H2020 ITN, 1 NSF, 1 FUI, and 2 ANR projects. He leads the French PIA4 CMA project ESOS (Electronics: Sustainable, Open, Sovereign), funded by France2030. He has authored over 80 peer-reviewed publications and a Springer book on multi-core prototyping.

He is a key member of the VAADER research team at IETR and leads the Sustainable Computing Workshop. He has held leadership roles in major conferences, including Program Chair of SAMOS-IC 2019 and General Chair of IEEE SiPS 2022 and GDR SOC2 2020. He was an elected member of CNRS CoNRS Section 07 (Information Science) from 2018 to 2021.