Linda S Milor

Linda S Milor is a Professor in the School of Electrical and Computer Engineering at the Georgia Institute of Technology. She specializes in reliability modeling of semiconductor circuits, analog and mixed-signal testing, and yield optimization. Dr. Milor holds an IEEE Fellow distinction and has received multiple awards, including 8 best paper awards and the NSF Career Grant (1995). She has advised 18 Ph.D. students and contributed over 200 publications on semiconductor reliability and testing.

Education: B.S. in Engineering Physics from UC Berkeley (undergraduate details unspecified) and a Ph.D. in Electrical Engineering from UC Berkeley (1992), focusing on analog/mixed-signal circuit testing.

Research Interests

• Reliability modeling for semiconductor circuits
• Circuit performance prediction under manufacturing variations
• Analog and mixed-signal testing methodologies
• Statistical process modeling for yield enhancement

Key Contributions

Her work emphasizes aging analysis in SRAM, FinFET technology, and dielectric breakdown mechanisms. She pioneered techniques for on-line testing of memory systems and developed frameworks for accelerated life testing.

Awards & Recognition

• IEEE Fellow (2014)
• 2004 Best Paper in IEEE Transactions on Semiconductor Manufacturing
• NSF Career Award (1995)

Advising & Grants

Advised 18 Ph.D. students and secured grants including the NSF Career Grant. Her research has been applied in industrial contexts through consulting roles for semiconductor manufacturers.

Labs & Collaborations

Her work integrates semiconductor reliability research with industry partnerships, focusing on practical applications of aging prediction and wearout mitigation.