Laurent Segers

Laurent Segers is a Postdoctoral Researcher at the Vrije Universiteit Brussel, affiliated with the Electronics and Informatics (ETRO) department within the Faculty of Engineering Technology. His research focuses on FPGA-based systems, acoustic engineering, IoT security, and environmental monitoring. He has contributed to projects such as the AMIVU Acoustic Map Imaging Dataset and developed novel techniques for secure edge computing, acoustic super-resolution, and LED lighting's ecological impact.

Key research areas include FPGA architecture optimization, hardware-assisted security mechanisms, and acoustic signal processing for localization systems. Segers has presented at conferences including ARC 2024 and IEEE events, and his work spans 24 publications with notable contributions in Sensors and Future Internet.

• Publications: 24 research outputs (2014–2025) with 193 citations and an h-index of 8
• Collaborations: International partnerships in acoustic imaging, IoT security, and environmental engineering

His recent work emphasizes secure TinyML on edge devices and trustworthy environmental monitoring systems, addressing challenges in hardware-software co-design and real-time processing.